LTC4352 Low Voltage Ideal Diode Controller with Monitoring FEATURES DESCRIPTION APPLICATIONS TYPICAL APPLICATION

Transcription

1 Low Voltage Ideal Diode Controller with Monitoring FEATURES n Low Loss Replacement for Power Diode n Controls N-Channel MOSFET n V to 18V Supply ORing or Holdup n.μs Turn-On and Turn-Off Time n Undervoltage and Overvoltage Protection n Open MOSFET Detect n Status and Fault Outputs n Hot Swappable n Reverse Current Enable Input n 12-Pin MSOP and DFN (3mm 3mm) Packages APPLICATIONS n Redundant Power Supplies n Supply Holdup n Telecom Infrastructure n Computer Systems and Servers DESCRIPTION The LTC 432 creates a near-ideal diode using an external N-channel MOSFET. It replaces a high power Schottky diode and the associated heat sink, saving power and board area. The ideal diode function permits low loss power ORing and supply holdup applications. The regulates the forward voltage drop across the MOSFET to ensure smooth current transfer in diode-or applications. A fast turn-on reduces the load voltage droop during supply switch-over. If the input supply fails or is shorted, a fast turn-off minimizes reverse currents. The controller operates with supplies from 2.9V to 18V. For lower voltages, an external supply is needed at the pin. Power passage is disabled during undervoltage or overvoltage conditions. The controller also features an open MOSFET detect circuit that fl ags excessive voltage drop across the pass transistor in the on state. A REV pin enables reverse current, overriding the diode behavior when desired., LT, LTC and LTM are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. TYPICAL APPLICATION 2.9V TO 18V.1μF REV *OPTIONAL 2.9V to 18V Ideal Diode.1μF* SOURCE V IN OUT 432 TA1 MOSFET ON POWER DISSIPATION (W) Power Dissipation vs Load Current DIODE (SBG12L) MOSFET () POWER SAVED LOAD CURRENT (A) 432 TA1b 1 1

2 ABSOLUTE MAXIMUM RATINGS (Notes 1, 2) V IN, SOURCE Voltages....3V to 24V Voltage....3V to 7V OUT Voltage... 2V to 24V, Voltages (Note 3)....3V to 3V D.C. Current...1mA,, REV Voltages....3V to 24V, Voltages....3V to 24V, Currents...mA Operating Ambient Temperature Range C... C to 7 C I... 4 C to 8 C Storage Temperature Range... C to 1 C Lead Temperature (Soldering, 1 sec) MS Package... 3 C PIN CONFIGURATION TOP VIEW V IN 1 12 SOURCE OUT REV DD PACKAGE 12-PIN (3mm 3mm) PLASTIC DFN T JMAX = 12 C, θ JA = 43 C/W EXPOSED PAD (PIN 13) PCB CONNECTION OPTIONAL V IN TOP VIEW MS PACKAGE 12-LEAD PLASTIC MSOP T JMAX = 12 C, θ JA = 14 C/W SOURCE OUT REV ORDER INFORMATION LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE CDD#PBF CDD#TRPBF LDPJ 12-Pin (3mm 3mm) Plastic DFN C to 7 C IDD#PBF IDD#TRPBF LDPJ 12-Pin (3mm 3mm) Plastic DFN 4 C to 8 C CMS#PBF CMS#TRPBF Lead Plastic MSOP C to 7 C IMS#PBF IMS#TRPBF Lead Plastic MSOP 4 C to 8 C Consult LTC Marketing for parts specifi ed with wider operating temperature ranges. *The temperature grade is identifi ed by a label on the shipping container. Consult LTC Marketing for information on non-standard lead based fi nish parts. For more information on lead free part marking, go to: For more information on tape and reel specifi cations, go to: 2

3 ELECTRICAL CHARACTERISTICS The l denotes the specifi cations which apply over the full operating temperature range, otherwise specifi cations are at T A = 2 C. V IN = 12V, V SOURCE = V IN, V OUT = V IN, Open, unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS Supplies V IN Input Operating Range l V With External 2.9V to 4.7V Supply With External 4.7V to V Supply l l 18 V V (EXT) External Supply Range l 2.9 V (INT) Internal Regulator Voltage l V I IN V IN Supply Current l ma V IN = V, = V, V OUT = 18V l 1 13 μa I CC External Supply Current = V, V IN = V l ma (LO) Undervoltage Lockout Threshold Rising l V Δ(HYST) Undervoltage Lockout Hysteresis l 7 9 mv Ideal Diode Control V FWD(REG) Forward Regulation Voltage (V IN V OUT ) l mv ΔV MOSFET Gate Drive (V V SOURCE ) V FWD =.1V, I = and 1μA l.1 7. V t ON() Turn-On Delay C = 1nF, V FWD =.2V l.2. μs t OFF() Turn-Off Delay C = 1nF, V FWD =.2V l.2. μs Input/Output Pins V,(TH), Threshold Voltage V Falling, V Rising l 49 1 mv ΔV,(HYST), Threshold Hysteresis l mv V REV(TH) REV Threshold Voltage l V I,, Current V =.V l ±1 μa I REV REV Current V REV = 1V l μa I OUT OUT Current V OUT = V, 12V l 13 2 μa I SOURCE SOURCE Current V SOURCE = V l 8 13 μa I (UP) Pull-Up Current V = V IN = 2.9V V = V IN = 18V I Fast Pull-Up Current Fast Pull-Down Current Off Pull-Down Current l l V FWD =.2V, ΔV = V, V = 17V V FWD =.2V, ΔV = V V = V, ΔV = 2.V l I FLT,STAT(IN), Leakage Current V = 18V l ±1 μa I FLT,STAT(UP), Pull-Up Current V = V l μa V OL, Output Low Voltage I = 1.2mA l.2.4 V V OH, Output High Voltage I = 1μA l 1. V ΔV (ST) MOSFET On Detect Threshold Pulls Low, V FWD = mv l V V FWD(FLT) Open MOSFET Threshold (V IN V OUT ) Pulls Low l mv Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating for extended periods may affect device reliability and lifetime. Note 2: All currents into device pins are positive; all currents out of device pins are negative. All voltages are referenced to unless otherwise specified. Note 3: Internal clamps limit the and pins to a minimum of V above, and a diode below SOURCE. Driving these pins to voltages beyond the clamp may damage the device. μa μa A A μa 3

4 TYPICAL PERFORMANCE CHARACTERISTICS Open, unless otherwise noted. T A = 2 C, V IN = 12V, V SOURCE = V IN, V OUT = V IN, 1. V IN Current vs Voltage 3 V IN Current vs Voltage with External = V Current vs Voltage 1. V IN = V I IN (ma).8 I IN (μa) 1 1 I CC (ma) V IN (V) G V IN (V) 432 G (V) 432 G3 I OUT (μa) OUT Current vs Voltage Voltage vs Current Voltage vs Current V V SOURCE (V) 7 V IN = 18V 4 V IN = 2.9V V V SOURCE (V) 7 V OUT = V IN.1V V IN = 18V 4 V IN = 2.9V V OUT (V) G I (μa) G I (μa) G 12 1, Output Low Voltage vs Current 4., Output High Voltage vs Current V OL (V)..4 V OH (V) CURRENT (ma) 432 G CURRENT (μa) G8 4

5 PIN FUNCTIONS V IN (Pin 1): Voltage Sense and Supply Input. Connect this pin to the power input side of the MOSFET. The low voltage supply is generated from V IN. The voltage sensed at this pin is used to control the MOSFET gate. (Pin 2): Low Voltage Supply. Connect a.1μf capacitor from this pin to ground. When V IN 2.9V, this pin provides decoupling for an internal regulator that generates a 4.1V supply. For applications where V IN < 2.9V, connect an external supply voltage in the range 2.9V to V to this pin. (Pin 3): Undervoltage Comparator Input. Connect this pin to an external resistive divider from V IN. If the voltage at this pin falls below.v, an undervoltage fault is detected and the MOSFET is turned off. The comparator has a built-in hysteresis of mv. Tie to if unused. (Pin 4): Overvoltage Comparator Input. Connect this pin to an external resistive divider from V IN. If the voltage at this pin rises above.v, an overvoltage fault is detected and the MOSFET is turned off. The comparator has a built-in hysteresis of mv. Tie to if unused. (Pin ): MOSFET Status Output. This pin is pulled low by an open-drain output when the external MOSFET is on. An internal 1μA current source pulls this pin up to a diode below. It may be pulled above using an external pull-up. Tie to or leave open if unused. (Pin ): Fault Output. This pin is pulled low by an open-drain output when a fault occurs. This fault could either be an undervoltage fault, an overvoltage fault, or an open MOSFET fault. An internal 1μA current source pulls this pin up to a diode below. It may be pulled above using an external pull-up. Tie to or leave open if unused. REV (Pin 7): Reverse Current Enable Input. Connect this pin to for normal diode operation that blocks reverse current. Driving this pin above 1V fully turns on the MOSFET gate to allow reverse current. An internal 1μA current source pulls this pin to. OUT (Pin 8): Output Voltage Sense Input. Connect this pin to the output side of the MOSFET. The voltage sensed at this pin is used to control the MOSFET gate. (Pin 9): Device Ground. (Pin 1): Charge Pump Output. Connect a capacitor from this pin to the SOURCE pin. The value of this capacitor is approximately 1x the gate capacitance (C ISS ) of the MOSFET switch. The charge stored on this capacitor is used to pull-up the gate during a fast turn-on. Leave this pin open if fast turn-on is not needed. (Pin 11): MOSFET Gate Drive Output. Connect this pin to the gate of the external N-channel MOSFET switch. An internal clamp limits the gate voltage to.1v above, and a diode below SOURCE. During fast turn-on a 1.A pull-up charges to. During fast turn-off a 1.A pull-down discharges to SOURCE. SOURCE (Pin 12): MOSFET Gate Drive Return. Connect this pin to the source of the external N-channel MOSFET switch. EXPOSED PAD (Pin 13, DD Package Only): Exposed Pad may be left open or connected to device ground.

6 FUNCTIONAL DIAGRAM V IN LDO 4.1V CHARGE PUMP 1μA OFF AMP 11 V IN CP4 DISABLE LDO ENABLE REVERSE CURRENT 2mV SOURCE OUT REV 2.7V CP3 LOW CP.7V 1V CP 1μA 1μA 3 SOURCE M1 CP2.V 1μA OPEN MOSFET DETECT 4 CP1 Z M2 *DD PACKAGE ONLY 9 13 EXPOSED PAD* 432 FD

7 OPERATION The controls either single or back-to-back N-channel MOSFETs in order to emulate an ideal diode. Dual MOSFETs eliminate current flow from the input to the output in an input undervoltage or overvoltage condition. When enabled, an amplifi er (AMP) monitors the voltage between the V IN and OUT pins, and drives the pin. The amplifi er controls the gate of the external MOSFET to servo its forward voltage drop (V IN OUT) to 2mV. The gate voltage rises to enhance the MOSFET if the load current causes more than 2mV of drop. For large output currents the MOSFET gate is driven fully on and the voltage drop is equal to I LOAD R DS(ON). In the case of an input supply short-circuit, when the MOSFET is conducting, a large reverse current starts flowing from the load towards the input. The AMP detects this failure condition as soon as it appears, and turns off the MOSFET by pulling down the pin. The REV pin can be used to allow reverse current, overriding the diode behavior. The AMP quickly pulls-up the pin whenever it senses a large forward voltage drop. An external capacitor between the and SOURCE pins is needed for fast gate pull-up. This capacitor is charged up, at device power-up, by the internal charge-pump. This stored charge is used for the fast gate pull-up. The pin sources current from the pin, and sinks current to the SOURCE and pins. Internal clamps limit the to SOURCE voltage to.1v, and the to SOURCE voltage to.7v. The same clamps also limit the and pins to a diode voltage below the SOURCE pin.,, and comparators, CP1 to CP3, control power passage. The MOSFET is held off whenever the pin is above.v, the pin is below.v, or the pin is below 2.7V. There is a 4μs delay from all three conditions becoming good to being allowed to turn on. Overvoltage causes a fast turn-off, while undervoltage activates a 1μA pull-down on after a 7μs delay. Open-drain pull-down, M1, pulls the pin low when the to SOURCE voltage exceeds.7v, to indicate that power is passing through the MOSFET. The output, M2, pulls low during an undervoltage or overvoltage fault condition. It also pulls low when is fully on and the forward voltage drop exceeds 2mV, indicating the MOSFET has too much current or has failed open circuit. LDO is a low dropout regulator that generates a 4.1V supply at the pin from the V IN input. When a supply below 2.9V is being ORed, an external supply in the 2.9V to V range is required at the pin. Comparator CP4 will disable LDO when V IN is below. 7

8 APPLICATIONS INFORMATION High availability systems often employ parallel-connected power supplies or battery feeds to achieve redundancy and enhance system reliability. ORing diodes have been a popular means of connecting these supplies at the point of load. Diodes with storage capacitors also hold up supply voltages when an input voltage sags or has a brownout. The disadvantage of these approaches is the diode s signifi cant forward voltage drop and the resulting power loss. Additionally, diodes provide no information concerning the status of the sourcing supply. Separate control must therefore be added to ensure that a supply that is out of range is not allowed to affect the load. The solves these problems by using an external N-channel MOSFET as the pass element (see Figure 1). The MOSFET is turned on when power is being passed, allowing for a low voltage drop from the supply to the load. When the input source voltage drops below the output common supply voltage it turns off the MOSFET, thereby matching the function and performance of an ideal diode. Power Supply Configuration The can operate with supplies down to V. This requires powering the pin with an always present external supply in the 2.9V to V range. If not always present, a series 47Ω resistor or Schottky diode limits device power dissipation and backfeeding of low supply when V IN is high. For a 2.9V to 4.7V supply, V IN should be lower than. A.1μF bypass capacitor should also be connected between the and pins, close to the device. Figure 2 illustrates this. If V IN operates above 2.9V then the external supply at is not needed. The.1μF capacitor is still required for bypassing. 12V C1.1μF C2.1μF Q1 SOURCE V IN OUT REV 432 F1 R4 2.7k D1 MOSFET ON D2 R 2.7k D1: GREEN LED LN131C D2: RED LED LN121CAL Figure 1. 12V Ideal Diode with Status and Fault Indicators 2.9V TO 18V V TO V TO 18V V IN OUT 2.9V TO 4.7V V IN OUT 4.7V TO V V IN OUT.1μF.1μF.1μF 432 F2 Figure 2. Power Supply Confi gurations 8

9 APPLICATIONS INFORMATION and Start-Up In single MOSFET applications, is initially pulled up to a diode below the SOURCE pin (Figure 3). In back-toback MOSFET applications, starts off at V, since SOURCE is near ground (Figure 4). starts ramping up 1μs after clears its undervoltage lockout level. Another 4μs later, will also start ramping up with if, and V IN OUT conditions allow it to. The ramp rate is decided by the pull-up current into the combined and pin capacitances. An internal clamp limits the voltage to.7v above SOURCE, while the final voltage is determined by the forward drop servo amplifi er. MOSFET Selection The drives N-channel MOSFETs to conduct the load current. The important features of the MOSFET are its threshold voltage, the maximum drain-source voltage BV DSS, and the on-resistance R DS(ON). The gate drive for the MOSFET is guaranteed to be between V and 7.V. This allows the use of logic level threshold N-channel MOSFETs. The maximum allowable drainsource voltage, BV DSS, must be higher than the supply voltages as the full supply voltage can appear across the MOSFET when the input falls to V. The pin pulls low to signal an open MOSFET fault whenever the forward voltage drop across the enhanced MOSFET exceeds 2mV. The R DS(ON) should be small enough to conduct the maximum load current while not triggering such a fault (when using ), and to stay within the MOSFET s power rating at the maximum load current. Capacitor Selection The recommended value of the capacitor between the and SOURCE pins is approximately 1x the input capacitance, C ISS, of the MOSFET. A larger capacitor takes a correspondingly longer time to charge up by the internal charge pump. A smaller capacitor suffers more voltage drop during a fast gate turn-on event as it shares charge with the MOSFET gate capacitance. V IN = V C2 =.1μF V IN = V C2 =.1μF VOLTAGE (V/DIV) OUT V IN, SOURCE VOLTAGE (V/DIV) OUT V IN VCC VCC TIME (2.ms/DIV) 432 FO3 TIME (2.ms/DIV) 432 FO4 Figure 3. Start-up Waveform for Single MOSFET Application Figure 4. Start-up Waveform for Back-to-Back MOSFET Application 9

10 APPLICATIONS INFORMATION Undervoltage and Overvoltage Protection Unlike a regular diode, the can prevent out of range input voltages from affecting the load voltage. This requires back-to-back MOSFETs, and resistive dividers from the input to the and pins. For an example, see Figure. MOSFET Q2 is required to block conduction through the body diode of Q1 when its gate is held off. The resistive dividers set up the input voltage range where the ideal diode control is allowed to operate. Outside this range, the gate is held off and the pin pulls low. When using a capacitor in circuit with back-to-back MOSFETs, there will be a large inrush current to the load capacitance due to the fast gate turn-on after, levels are met. Without the capacitor, the inrush will depend on the pull-up current charging up the gate capacitance. Inrush Control The can be used for inrush control in applications where the input supply is hot-plugged. See Figure. The capacitor is omitted, since fast turn-on with stored charge is not desired here. Undervoltage holds the gate off till the short pin makes contact. 4μs after the level is satisfi ed, the MOSFET gate ramps up due to the pull-up current. A RC network on the gate further slows down the output dv/dt, while allowing fast turn-off during reverse current or overvoltage conditions. Resistor RG prevents high frequency oscillations in Q2. A dedicated hot swap controller may be needed if overcurrent protection is also desired. 12V Q2 Q1 V Q2 Q1 Z1 R 1k RG 1Ω 31.k 1% 1k 1% 3.9k 1% R3 R2 R1 V IN SOURCE OUT.1μF C2 REV C1.1 μf BACKPLANE CONNECTORS 1k R3.11k R2 V IN CG.1μF SOURCE OUT PLUG-IN CARD 432 F N/C Z1: DIODES INC. SMAJ12A 432 F Figure. V Ideal Diode with and Protection Figure. Inrush and Ideal Diode Control on a Hot Swap Card 1

11 APPLICATIONS INFORMATION External Supply The internal charge pump takes milliseconds to charge up the pin capacitor especially during device power up. This time can be shortened by connecting an external supply to the pin. A series resistor is needed to limit the current into the internal clamp between the and SOURCE pins. The supply should also be higher than the main input supply to meet the gate drive requirements of the MOSFET. Figure 7 shows such a V ideal diode application, where a 12V supply is connected to the pin through a 1k resistor. The 1k limits the current into the pin to.3ma, when the SOURCE pin is grounded. Input Transient Protection When the capacitances at the input and output are very small, rapid changes in current can cause transients that exceed the 24V Absolute Maximum Rating of the V IN and OUT pins. In ORing applications using a single MOSFET, one surge suppressor connected from OUT to ground clamps all the inputs. In the absence of a surge suppressor, an output capacitance of 1μF is suffi cient in most applications to prevent the transient from exceeding 24V. Back-to-back MOSFET applications, depending on voltage levels, may require a surge suppressor on each supply input. Design Example The following design example demonstrates the calculations involved for selecting components in a 12V system with 1A maximum load current (see Figure 1). First, calculate the R DS(ON) of the MOSFET to achieve the desired forward drop at full load. Assuming a V FWD of mv (which is comfortably below the 2mV minimum open MOSFET fault threshold): R DS ( ON ) V FWD = mv I LOAD 1A =mω The offers a good solution, in a SO-8 sized package, with a maximum R DS(ON) of 4mΩ and BV DSS of 3V. The maximum power dissipation in the MOSFET is: P = I 2 LOAD R DS(ON) = (1A) 2 4mΩ =.4W With a maximum steady-state thermal resistance, θ JA, of C/W,.4W causes a modest 2 C rise in junction temperature of the above the ambient. The input capacitance, C ISS, of the is about pf. Slightly exceeding the 1x recommendation, a.1μf capacitor is selected for C2. V Q1 R7 1k 12V C2.1μF V IN OUT SOURCE 432 F7 Figure 7. V Ideal Diode with External 12V Powering for Faster Start-up and Refresh 11

12 APPLICATIONS INFORMATION LEDs, D1 and D2, require around 3mA for good luminous intensity. Accounting for a 2V diode drop and.v V OL, R1 and R2 are set to 2.7k. PCB Layout Considerations Connect the V IN and OUT pin traces as close as possible to the MOSFET s terminals. Keep the traces to the MOSFET wide and short to minimize resistive losses. The PCB traces associated with the power path through the MOSFET should have low resistance. See Figure 8. It is also important to put C1, the bypass capacitor for the pin, as close as possible between and. Also place C2 near the and SOURCE pins. Surge suppressors, when used, should be mounted close to the using short lead lengths. CURRENT FLOW Q1 SO-8 CURRENT FLOW S D FROM INPUT SUPPLY W S S D D W G D TRACK WIDTH W:.3 PER AMPERE ON 1OZ CU FOIL VIA TO GROUND PLANE SOURCE OUT MSOP-12 VIN C1 VIA TO GROUND PLANE 432 F8 DRAWING IS NOT TO SCALE! Figure 8. Recommended PCB Layout for Power MOSFET 12

13 TYPICAL APPLICATIONS Plug-in Card Supply Holdup Using Ideal Diode at Input 12V Q1 HOT SWAP CONTROLLER SOURCE V IN OUT C HOLDUP BACKPLANE CONNECTORS PLUG-IN CARD 432 TA2 13

14 PACKAGE DESCRIPTION DD Package 12-Lead Plastic DFN (3mm 3mm) (Reference LTC DWG # Rev A).7 ±. R =.11 TYP ±.1 3. ±. 2.1 ±..2 ± ±. 1. ±. 2.2 REF.4 BSC PACKAGE OUTLINE RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED PIN 1 TOP MARK (SEE NOTE ).2 REF 3. ±.1 (4 SIDES).7 ± ±.1 BOTTOM VIEW EXPOSED PAD NOTE: 1. DRAWING IS NOT A JEDEC PACKAGE OUTLINE 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED.1mm ON ANY SIDE. EXPOSED PAD AND TIE BARS SHALL BE SOLDER PLATED. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE 2.38 ± REF PIN 1 NOTCH R =.2 OR.2 4 CHAMFER 1.23 ±..4 BSC (DD12) DFN 1 REV A 14

15 PACKAGE DESCRIPTION MS Package 12-Lead Plastic MSOP (Reference LTC DWG # Rev Ø).889 ±.127 (.3 ±.) 4.39 ±.12 (.19 ±.4) (NOTE 3) ±.7 (.1 ±.3) REF.23 (.2) MIN (.12.13).24 (.1) DETAIL A TYP 4.9 ±.12 (.193 ±.) 3. ±.12 (.118 ±.4) (NOTE 4) GAUGE PLANE.42 ±.38 (.1 ±.1) TYP. (.2) BSC RECOMMENDED SOLDER PAD LAYOUT.18 (.7) DETAIL A.3 ±.12 (.21 ±.) SEATING PLANE 1.1 (.43) MAX (.34) REF (.9.1) TYP NOTE: 1. DIMENSIONS IN MILLIMETER/(INCH) 2. DRAWING NOT TO SCALE 3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR BURRS.. (.2) BSC MOLD FLASH, PROTRUSIONS OR BURRS SHALL NOT EXCEED.12mm (.") PER SIDE 4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED.12mm (.") PER SIDE. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE.12mm (.4") MAX.11 ±.8 (.4 ±.2) MSOP (MS12) 117 REV Ø Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 1

16 TYPICAL APPLICATION V to 18V Ideal Diode-OR V IN1 V TO 18V.1μF V SOURCE V IN OUT.1μF REV V IN2 V TO 18V.1μF V SOURCE V IN OUT.1μF REV 432 TA3 RELATED PARTS PART NUMBER DESCRIPTION COMMENTS LTC1473/LTC1473L Dual PowerPath Switch Driver N-Channel, 4.7V to 3V/3.3V to 1V, SSOP-1 LTC1479 PowerPath Controller for Dual Battery Systems Three N-Channel Drivers, V to 28V, SSOP-3 LTC43 Hot Swappable Load Share Controller N-Channel, 1.V to 12V, Share Bus, SSOP-1 LT 431 MOSFET Diode-OR Controller N-Channel, 1.2V to 18V,,, MSOP-1 LTC434 Negative Voltage Diode-OR Controller and Monitor Dual N-Channel, 4.V to 8V, SO-8, DFN-8 LTC43 Positive High Voltage Ideal Diode-OR and Monitor Dual N-Channel, 9V to 8V, SO-1, DFN-14 LTC437 Positive High Voltage Ideal Diode Controller N-Channel, 9V to 8V, MSOP-8, DFN- LTC438 A Ideal Diode Internal N-Ch., 9V to 2.V, TSSOP-1, DFN-14 LTC A Low Loss Ideal Diode in ThinSOT Internal P-Ch., 2.V to.v, 4μA I Q, SOT-23 LTC4412/LTC4412HV Low Loss PowerPath Controller in ThinSOT P-Channel, 2.V to 28V/3V, 11μA I Q, TSOT-23 LTC4413/LTC Dual 2.A, 2.V to.v, Ideal Diodes in DFN-1 Dual Internal P-Channel, 2.V to.v, DFN-1 LTC4414 3V Low Loss PowerPath Contoller for Large PFETs P-Channel, 3V to 3V, 3μA I Q, MSOP-8 LTC441/LTC V Low Loss Dual PowerPath Contoller for Large PFETs Dual P-Channel, 3.V to 3V, 7μA I Q, MSOP-1 ThinSOT and PowerPath are trademarks of Linear Technology Corporation. 1 LT 78 PRINTED IN USA Linear Technology Corporation 13 McCarthy Blvd., Milpitas, CA (48) FAX: (48) LINEAR TECHNOLOGY CORPORATION 28