A Study on EMI Noise Reduction in Boost-Type PFC Circuit

Transcription

1 IPS03 Analog and Power April 28, 2018 (Wed) A Study on EMI Noise Reduction in Boost-Type PFC Circuit Noriyuki Oiwa, Shotaro Sakurai, Nobukazu Tsukiji, Yasunori Kobori, Haruo Kobayashi Division of Electronics and Informatics Gunma University Gunma Univ. Kobayashi Lab

2 Outline Background and Purpose Conventional PFC Power Supply Proposed PFC Power Supply -Using frequency modulation Diode recovery current reduction Conclusion 2/31

3 Outline Background and Purpose Conventional PFC Power Supply Proposed PFC Power Supply -Using frequency modulation Diode recovery current reduction Conclusion 3/31

4 What is Power Supply Circuit? Commercial power supply circuits Convert AC into DC voltages DC-DC AC-DC Input Voltage (50/60Hz 100V) Power Supply Output Voltage (ex. DC 300V) 4/31 4

5 Research Purpose AC-DC converter improvement EMI noise reduction in PFC circuit Using noise spectrum spread with frequency modulation Efficiency improvement in high speed operation Diode recovery current reduction with SiC SBD PFC: Power Factor Correction SBD: Schottky Barrier Diode 5/31

6 EMI Noise EMI noise generation by current flow Conduction noise Radiation noise EMI: Electro-Magnetic Interference Large scale analog filter for EMI noise removal 6/31

7 Amplitude Amplitude Noise Spectrum Spread Reducing peaks of higher harmonics of clock frequency Spreading noise energy by frequency modulation Frequency Frequency Without spreading With spreading 7/31

8 Voltage[v] Voltage[v] Problem (High Speed Clock) Clock frequency increase Fast response, Small L, C Large noise, energy loss Low clock freq. [t] High clock freq. [t] 8/31

9 Outline Background and Purpose Conventional PFC Power Supply Proposed PFC Power Supply -Using frequency modulation Diode recovery current reduction Conclusion 9/31

10 Role of PFC Circuit PFC shapes input current waveform L C C Without PFC With PFC 10/31

11 PFC Operation PFC Circuit Input current, input voltage: same waveforms Harmonics reduction Loss reduction eactive power Active power PFC= Effective power Apparent power = V ሶ Idt ሶ തV I ത Apparent power eactive power( ) Active power ( ) PFC: Power Factor Correction Apparent power(=) 11/31

12 Conventional PFC Circuit EMI Filter L Boost Converter C PFC Error Amp1 Gate driver Error Amp2 Comp1 Fixed Frequency Integration Circuit 12/31

13 Outline Background and Purpose Conventional PFC Power Supply Proposed PFC Power Supply - Using frequency modulation Diode recovery current reduction Conclusion 13/31

14 Proposed PFC Circuit EMI Filter L C Gate driver Error Amp2 Error Amp1 FM Clock Integration Circuit Comp1 14/31

15 Frequency Modulation Frequency modulation fluctuates clock freq. linearly by time Clock noise spectrum is spread [V] VCO Modulation clock Triangle wave [V] [t] VCO: Voltage Controlled Oscillator [t] 15/31

16 PFC Circuit for Simulation EMI Filter 2.2mH =400V AC 100V 50Hz 330μF Gate driver Clock Signal (100kHz) Integration Circuit 16/31

17 Simulation Results of Conventional PFC PWM spectrum Spectrum(PWM0) / V Amplitude[V] V 1 100m 10m 1m Clock Signal Error Amp2 Frequency/kHertz Integration Circuit Frequency[kHz] PWM Comp1 Gate driver 100kHertz/div Measuring point of Fourier transform 17/31

18 Amplitude[V] Simulation Results of Proposed PFC 10 PWM spectrum 100kHz point Spectrum(PWM0) / V 1 100m 10m 1m Frequency/kHertz 100kHertz/div 1 100m 10m 3.1V ( f=±1khz) 9.7dB lower than using fixed freq. 1.0V ( f=±10khz) 1m Frequency[kHz] 18/31

19 Amplitude[V] Simulation Results of Proposed PFC 10 PWM spectrum 100kHz point Spectrum(PWM0) / V 1 100m 10m 1m Frequency/kHertz 1 100m 10m Frequency[kHz] 100kHertz/div 1m V ( f=±1khz) 9.7dB lower than using fixed freq. 1.0V ( f=±10khz) 19.6dB lower than using fixed freq. 19/31

20 Voltage[V] Voltage[V] Output Voltage Ripple Clock frequency changes Output voltage ripple does not change much time/msecs 100kHz ±1.0kHz Time[ms] 5mSecs/div time/msecs 5mSecs/div 200kHz ±1.0kHz Time[ms] 20/31

21 Outline Background and Purpose Conventional PFC Power Supply Proposed PFC Power Supply -Using frequency modulation Diode recovery current reduction Conclusion 21/31

22 Diode Recovery Current Generated at turn off moment Loss enlarged by clock frequency increase + P N - 0 (t) Forward voltage - P Reverse Voltage N + Hole Electron OFF ON OFF (t) 22/31

23 Recovery Current Reduction Approach Schottky Barrier Diode(SBD) usage Potential[V] Potential[V] Electron transfer Electron transfer Metal Semiconductor Metal Semiconductor Breakdown voltage: Si (200V) < SiC (600V) SiC usage 23/31

24 SiC Features Comparison of SiC with Si Pro Con - High breakdown voltage - High speed operation - High cost Cost of SiC as a part is high. But a whole system using SiC may become lower. 24/31

25 Recovery Current Generation Location EMI Filter Error Amp2 Gate driver Error Amp1 Clock Signal Comp1 25/31

26 SBD Simulation Circuit Only diode simulation Observing a change in voltage, current and power at the same measurement point 10Ω Measurement point PN(20ETS12) SiC-SBD(SCS206AJHR) DC 20V SW 500kHz 26/31

27 Simulation Results Vd2 / V PN Id2 / A Power(D6) / W Time/uSecs -40A 280W Time[μs] 200nSecs/div Vd1 / V SiC-SBD Id1 / A Power(D2) / W Time/uSecs -16A 106W Time[μs] 200nSecs/div 27/31

28 Recovery Current Comparison PN Vd1 / V Power(D6) / W Id2 / A Vd2 / V A Time/uSecs 280W Recovery current reduction by 24A Time[μs] 200nSecs/div SiC-SBD Id1 / A Power(D2) / W A 106W Time/uSecs Time[μs] 200nSecs/div 28/31

29 Switching Loss Comparison PN Vd1 / V Power(D6) / W Id2 / A Vd2 / V Time/uSecs -40A 280W Switching loss reduction by 37.9 % Time[μs] 200nSecs/div Id1 / A SiC-SBD Power(D2) / W Time/uSecs -16A 106W Time[μs] 200nSecs/div 29/31

30 Outline Background and Purpose Conventional PFC Power Supply Proposed PFC Power Supply -Using frequency modulation Diode recovery current reduction Conclusion 30/31

31 Conclusion Proposal for PFC power supply in high speed PFC with frequency modulation Fixed frequency Frequency modulation EMI noise reduction Diode recovery current reduction SiC-SBD employment Comparison with switching loss of PN diodes and SiC-SBD Efficiency improvement 31/31

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33 質問事項 リカバリー電流の過渡応答時間は? 次の機会までに調べます Simplisシミュレーション結果 SiC 使用 : 0.2 [ps] Si 使用 : 1.3 [ps] 33/31