NJW4830. Single High Side Switch

Transcription

1 NJW483 Single igh Side Switch GENERAL DESCRIPTION The NJW483 is the single high-side switch that can supply.5a. The active clamp circuit, overcurrent and thermal shutdown are built-in with Pch MOS FET. It can be controlled by a logic signal (3V/5V) directly. Therefore, it is suitable for Car accessory, Industrial Equipments and other applications. PACKAGE OUTLINE NJW483U2 FEATURES Drain-Source Voltage 45V Drain Current.5A Corresponding with Logic Voltage Operation: 3V/5V Low On-Resistance.35Ω (typ.) Low Consumption Current µa (typ.) Active Clamp Circuit Over Current Protection Thermal Shutdown Package Outline SOT89-5 PIN CONFIGURATION IN 2. GND 3. FLT OUT BLOCK DIAGRAM FLT Over Current Protection FLT DELAY Level Shift IN Thermal Shut Down Active Clamp GND OUT Ver

2 NJW483 ABSOLUTE MAXIMUM RATINGS (Ta=25 C) PARAMETER SYNBOL RATINGS UNIT REMARK Drain-Source Voltage V DS +45 V OUT Pin Supply Voltage V DD +45 V GND Pin Input Voltage V IN.3 to +6 V IN GND Pin FLT Pin Voltage V FLT.3 to +6 V FLT GND Pin Power Dissipation P D 625 (*) 2,4 (*2) mw Active Clamp Tolerance (Single Pulse) E AS mj Active Clamp Current I AP.5 A Junction Temperature T j 4 to +5 C Operating Temperature T opr 4 to +85 C Storage Temperature T stg 5 to +5 C (*): Mounted on glass epoxy board. ( mm:based on EIA/JDEC standard size, 2Layers, Cu area mm 2 ) (*2): Mounted on glass epoxy board. ( mm:based on EIA/JDEC standard, 4Layers) (For 4Layers: Applying mm inner Cu area and a thermal via hall to a board based on JEDEC standard JESD5-5) RECOMMENDED OPERATING CONDITIONS PARAMETER SYMBOL MIN. TYP. MAX. UNIT REMARK Drain Source Voltage V DS 4 V OUT Pin Supply Voltage V DD V GND Pin Output Current I O.5 A OUT Pin Input Pin Voltage V IN 5.5 V IN GND Pin FLT Pin Voltage V FLT 5.5 V FLT GND Pin Ver.24--8

3 NJW483 ELECTRICAL CARACTERISTICS (Unless otherwise noted, V DS =3V, Ta=25 C) PARAMETER SYMBOL CONDITIONS MIN. TYP. MAX. UNIT Drain-Source Output Clamp Voltage V DSS_CL V IN =V, I O =ma, V DD =4V V DD -45 V igh Level Input Voltage V I I O =ma 2.64 V Low Level Input Voltage V IL I O =µa.9 V Protection Circuit Function Input Voltage Range V IN_opr V OUT Pin Leak Current at OFF State I OLEAKOUT V IN =V, V DD =4V µa Quiescent Current I DD V IN =V, V DD =4V µa Quiescent Current 2 I DD2 V IN =5V 5 µa Input Current I IN V IN =5V 5 9 µa On-state Resistance R DS_ON V IN =5V, I O =.5A.35.6 Ω Over Current Protection I LIMIT V IN =5V, V DS =5V A Over Current Protection2 I LIMIT2 V IN =5V, V DD =V DS =4V..4 A Turn-on Time t ON V IN = to 5V, I O =.5A 2 µs Turn-off Time t OFF V IN =5 to V, I O =.5A 2 µs OUT Voltage Difference V PDOV V IN =V, I OR =A.85.2 V FLT Pin Low Level Output Voltage V VFLT I FLT =5µA.25.5 V FLT Pin Leak Current at igh Level I OLEAKFLT V FLT =5.5V µa FLT Delay Time t DFLT V IN = to 5V, V DS =22V 5 ms TRUT TABLE Input Signal Operating Condition FLT Pin Output Status L OFF Normal L ON L OFF Over Current I LIMIT L I LIMIT L OFF Over Current I LIMIT2 L I LIMIT2 L OFF T j >5 C OFF Ver

4 NJW483 TIMING CRAT ON, OFF Switching Time (V IN = to 5V, V DD =3V, I O =.5A) IN 9% % 9% OUT % t ON t OFF FLT Delay Time (V IN = to 5V, V DD =V DS =22V) IN 5% 9% FLT t DFLT FLT Delay Time Measurement Circuit 5V NJW483 V + V DS 5V V IN OUT FLT GND Ver.24--8

5 NJW483 igh Input signal Low Over Current Protection ON OFF ON Thermal Protection OFF Output voltage V V DSS_CL Output current I LIMIT I LIMIT2 A Inductive load t DFLT igh Fault signal Low Normal Current limit Current limit2 Thermal shutdown Active clamp Ver

6 NJW483 OVER CURRENT PROTECTION CARACTERISTIC I O [A] I LIMIT I LIMIT2 V DS [V] FLT Terminal L TYPICAL APPLICATION Logic Voltage ex. 5V, 3V Micro Controller Drive Signal NJW483 V + IN OUT FAULT FLT GND R L Ver.24--8

7 NJW483 CARACTERISTICS Drain-Source Clamp Voltage [V] Drain-Source Clamp Voltage vs.ambient Temperature Quiescent Current2 [ma] Quiescent Current2 vs.ambient Temperature Input Current [ma] Input Current vs. Input Voltage Input Voltage [V] Input Current [ma] Input Current vs.ambient Temperature Ver

8 NJW483 CARACTERISTICS.6 ON-state Resistance vs. Supply Voltage ON-state Resistance vs. Ambient Temperature.6 ON-state Resistance [Ω] ON-state Resistance [Ω] Supply Voltage [V] Over Current Protection vs. Ambient Temperature.2 Over Current Protection2 vs. Ambient Temperature.2 Over Current Limit [A] Over Current Limit2 [A] Output Current vs.drain-source Voltage Output Current [A] Drain-Source Voltage [V] Ver.24--8

9 NJW483 CARACTERISTICS 3 Turn-on Time vs. Ambient Temperature 3 Turn-off Time vs. Ambient Temperature Turn-on Time [µs] 2 5 Turn-off Time [µs] FLT Pin Low Level Output Voltage vs. Ambient Temperature 7 FLT Delay Time vs. Ambient Temperature.25 6 FLT Pin Low Level Output Voltage [V] FLT Delay Time [ms] TSD Detect / Release Temperature [ºC] TSD Detect / Release Temperature vs. Input Voltage Detection Temperature Release Temperature Input Voltage [V] Ver

10 NJW483 Application Tips Regarding Active Clamp Capacity of igh/low side Switch Products Technical Information What is Active Clamp Capacity. The IC might suffer to damage by the inductive kickback at the transient time of ON state to OFF state, when an inductive load such as a solenoid or motor is used for the load of the high-side/low-side switch. The protection circuit for the inductive kickback is the active clamp circuit. The energy that can be tolerated by the active clamp circuit is called "Active Clamp Capacity (E AS )". When using an inductive load to the high-side/low-side switch, you should design so that the E SW does not exceed the active clamp capability. IC operation without an external protection parts (Fig ) Active Clamp Current I AP t A Active Clamp Period I D V DS I D Active Clamp Current I AP Drain-Source Clamp Voltage V V DD Time V DS V DSS_CL Drain-Source Clamp Voltage V DSS_CL V V IN V V DD 5V Time V IN V 5V t A Active Clamp Period t ON t ON Fig. Active Clamp Waveform (Left: Low-side Switch / Light igh-side Switch) At when the V IN turns off, the drain-source voltage (V DS ) increases rapidly by the behavior of the inductive load that is keeping current flowing. owever, it will be clamped at V DSS_CL by the active clamp circuit. At the same time, the drain current is flowed by adjusting the gate voltage of the output transistor, and the energy is dissipated at the output transistor. The energy: E SW is shown by the following formula. E SW t A = V ( t) I ( t) dt = DS D 2 LI 2 AP V V DSS _ CL DSS _ CL V DD The E SW is consumed inside IC as heat energy. owever, the thermal shutdown does not work when the V IN is V. Therefore in worst case the IC might break down. When using the active clamp, you should design E SW does not exceed the E AS. - - Ver.24--8

11 Application NJW483 Tips Technical Information Application int The simplest protection example is to add an external flywheel diode at the load to protect IC from an inductive kickback. (Fig.2) Flywheeling Diode I D VIN DRAIN VIN OUT V DS SOURCE V DS GND I D Flywheeling Diode Fig 2. Application Circuit of Inductance Load Driving (Left: Low-side Switch / Light igh-side Switch) [CAUTION] The specifications on this databook are only given for information, without any guarantee as regards either mistakes or omissions. The application circuits in this databook are described only to show representative usages of the product and not intended for the guarantee or permission of any right including the industrial rights. Ver