SYSTEM RESET IC WITH DELAY CIRCUIT

Transcription

1 SYSTEM RESET IC WITH DELAY CIRCUIT GENERAL DESCRIPTION The is a system reset IC with built-in delay circuit that monitors the status of a power line, and outputs a reset signal to the microcomputer. The outputs a reset signal when exceeds the detection voltage. Therefore it is possible to control the microcomputer by detecting a rising edge of a power line. Delay times are fixed internally and those are set in each of rising and falling. It is possible to monitor multiplex power line by combination of because output voltage OUT is kept High level when Pin is Low level by connecting with other. Detection voltage s default value is.. It can be adjusted to desired voltage by the resistor divider. In addition, a hysteresis voltage can be set arbitrarily by inserting a resistor between the pin and the pin. PACKAGE OUTLINE F FEATURES High Precision Detection oltage.% (Ta= C) Detection oltage. (default) and adjustable with external resistor Reset Output Logic Reset Low output when pin is detection voltage or more *If required reset low output when pin is detection voltage or below, see the NJU7296. Delay Circuit (Internal Fixed type) Rising / Falling independent setting Ultra Low Quiescent Current.7µA typ. Supply oltage Range.5 to 5.5 External Input Pin While inputting low signal, keep output High level Adjustable Hysteresis oltage Output Type CMOS output Package SOT PIN CONFIGURATION OUT Pin Function. :Input oltage Pin 2. :Ground Pin 3. :External Input Pin 4. :Supply oltage Pin 5. OUT :Output Pin 6. :External Resistor Pin for setting Hysteresis oltage er

2 BLOCK DIAGRAM Delay Circuit OUT PRODUCT CLASSFICATION Device Name ersion Delay Time(Typ.) Delay Time2(Typ.) Spec Guarantee F-A C (General Spec.) A. F-A-T -4 C to +5 C (T Spec.) F-B C (General Spec.) B F-B-T -4 C to +5 C (T Spec.) F-C C (General Spec.) C F-C-T -4 C to +5 C (T Spec.) F-D C (General Spec.) D µs F-D-T -4 C to +5 C (T Spec.) ABSOLUTE MAXIMUM RATINGS (Ta= C) PARAMETER SYMBOL RATINGS UNIT Supply oltage +7 Input oltage -.3 to +7 Output oltage OUT -.3 to +.3 Pin oltage -.3 to +.3 Pin Input oltage -.3 to +.3 Output Current I OUT 5 ma Pin Current I ma Power Dissipation P D SOT (*) 58(*2) mw Surge Current I IN_SRG ±2.5(*3) ma Operating Temperature T opr -4 to +5 C Storage Temperature T stg -4 to + C (*): Mounted on glass epoxy board. ( mm: based on EIA/JDEC standard, 2Layers) (*2): Mounted on glass epoxy board. ( mm:based on EIA/JDEC standard, 4Layers), internal Cu area: mm (*3): Permissible current range there is no logical error in OUT and no destruction er.--

3 ELECTRICAL CHARACTERISTICS Unless otherwise noted, =3.3, Ta= C PARAMETER SYMBOL TEST CONDITION MIN. TYP. MAX. UNIT Detection oltage DET -.%. +.% Ta=-4 C to 5 C -2.5% +2.5% Quiescent Current I SS No Signal No Signal,Ta=-4 C to 5 C µa Nch, DS = Output Current I OUT Nch, DS =.5, Ta=-4 C to 5 C - - Pch, DS = ma Pch, DS =.5, Ta=-4 C to 5 C Nch, DS = Pin Current I Nch, DS =.5, Ta=-4 C to 5 C Pch, DS = ma Pch, DS =.5, Ta=-4 C to5 C Average Temperature Coefficient of Detection oltage DET / Ta Ta= C to +85 C - - ppm/ C Pin.67 - High Level oltage _H Ta=-4 C to 5 C.7 - Pin Low Level oltage _L Ta=-4 C to 5 C Pin Resistance R IN - Ta=-4 C to 5 C MΩ Pin Resistance R.5. - Ta=-4 C to 5 C MΩ Operating oltage OPL Ta=-4 C to 5 C ELECTRICAL CHARACTERISTICS (Defined by each versions) Unless otherwise noted, =3.3, Ta= C PARAMETER SYMBOL TEST CONDITION MIN. TYP. MAX. UNIT F-A 7 4 F-A-T, Ta=-4 C to 5 C 6-4 Delay Time t d =L H F-B 6 24 F-B-T, Ta=-4 C to 5 C - F-C 7 4 F-C-T, Ta=-4 C to 5 C 6-4 F-D 7 4 F-D-T, Ta=-4 C to 5 C 6-4 F-A F-A-T, Ta=-4 C to 5 C. -.5 Delay Time 2 t d2 =H L F-B 7 4 F-B-T, Ta=-4 C to 5 C 6-4 F-C 7 4 F-C-T, Ta=-4 C to 5 C 6-4 F-D - F-D-T, Ta=-4 C to 5 C - - µs er

4 TEST CIRCUIT Quiescent Current Detection oltage A OUT R R3 R2 OUT Output Current Pin Current OUT A A OUT Pin Input oltage Delay Time OUT Minimum Operating oltage R R3 R2 OUT RL er.--

5 FUNCTION DESCRIPTION () Basic Operation Input oltage ( ) Detection oltage ( DET) Output oltage ( OUT) Release oltage * *In case of not setting the hysteresis voltage. () When input voltage is increased and exceed the detection voltage DET, after the delay time which is fixed for each version, the output voltage OUT is switched from High level to Low level. (2) In the state of is above the release voltage DET, the reset state is maintained. The default release voltage DET is same as detection voltage DET, although can be set the hysteresis by inserting a resistor between the pin and the pin. Delay Time (t d) Delay Time2 (t d2) (3) When falls and it reaches release voltage DET, after the delay time which is fixed for each version, OUT is switched from Low level to High level. er

6 TYPICAL APPLICATION R, R2: Adjust the detection voltage by resistor divider R3: Setting the hysteresis voltage CIN: To prevent malfunction due to noise (Recommend about pf to pf) : The input logic signals from other power line Adjusting of Detection oltage The Detection voltage of is fixed as. (typ.) internally, although it can be adjusted to a desired Detection oltage by connecting external resistor (R,R2) to a pin. When adjusting to a desired Detection oltage, it's necessary to consider pin resistance R IN. ( MΩ typ.) Setting of Hysteresis oltage The doesn't have the Hysteresis oltage between the Release oltage and Detecting oltage in default. It's able to set the Hysteresis oltage optionally by connecting dividing resistor between the - pin. Detection oltage DET R( R2 RIN RIN) DET R2 R DET R3 Hysteresis oltage = R DD R3 Release oltage = Detection oltage - Hysteresis oltage External input Pin If inputs the logic signal from other power line(e.g. other ) into the pin, it can be kept the status of the output "High level" and ignoring the status of detection voltage DET. When inputs a low level signal into the pin, OUT is kept high level. It is useful for priority setting of reset signal when monitoring multiplex power supply syste. If do not use the External input, the pin should be connected to or Open er.--

7 TYPICAL =3.3 Detection oltage vs Temperature Detection oltage : DET [] Quiescent Current :I SS [μa] C No Signal Quiescent Current vs Supply oltage Quiescent Current :I SS [μa] =3.3 No Signal Queiscent Current vs Temperature Supply oltage : [] Pin Resistance :R IN [MΩ] Pin Resistance vs Temperature Pin Resistance R [MΩ] Pin Resistance vs Temperature er

8 4 -A/C/D Delay Time vs Supply oltage 4 -A/C/D Delay Time vs Temperature C =L H =3.3 =L H Delay Time :t d [] Delay Time :t d [] Supply oltage : [] 6 Delay time :td [ms] C =L H -B Delay Time vs Supply oltage Supply oltage : [] Delay Time :t d [ms] =3.3 =L H -B Delay time vs C =H L -A Delay Time2 vs Supply =3.3 =H L -A Delay Time2 vs Temperature Delay time2 :t d2 [ms] Delay Time2 :t d2 [ms] Supply oltagge : [] er.--

9 4 C =H L -B/C Delay Time2 vs Supply oltage 4 =3.3 =H L -B/C Delay Time 2 vs Temperature Delay Time2 :t d2 [] Delay Time2 :t d2 [] Supply oltage : [] 6 C =H L -D Delay Time2 vs Supply oltage =3.3 =H L -D Delay Time2 vs Temperature Delay Time2 :t d2 [ S] 35 Delay Time2 :t d2 [ S] 35 Supply oltage : DS =.5 Nch Output Current vs DS =.5 Pch Output Current vs Temperature Nch Output Current :I OUT [ma] 5 Pch Output Current :I OUT [ma] 5 er

10 @: DS =.5 Nch Current vs DS =.5 Pch Current vs Temperature Nch Current :I [ma] 5 Pch Current :I [ma] 5 [CAUTION] The specifications on this databook are only given for information, without any guarantee as regards either mistakes or omissions. The application circuits in this databook are described only to show representative usages of the product and not intended for the guarantee or permission of any right including the industrial rights. - - er.--