Dual Half Bridge Driver with Boost Converter

Transcription

1 Dual Half Bridge Driver with Boost Converter GENERAL DESCRIPTION The NJW483 is a dual half bridge driver with boost converter IC. Output voltage boost from Li-ion battery and a 5V power supply and can drive a piezo device by two half bridge drivers. The NJW483 is able to stable startup by soft start function in boost SW.REG.. The dual half bridge driver improves control characteristics from a microcomputer in response to independent signal input in each channel. The input frequency operates to 3kHz and in the case of failure, it can output a fault flag. PACKAGE OUTLINE NJW483SE3 FEATURES Boost Converter Block Output Switch Voltage 4V max. Switching Current A min. PWM Control Operating Voltage Range 2.7 to 5.5V Oscillation Frequency Range 38k to 8kHz Soft Start Function 7ms typ. Protection Half Bridge Driver Block Under Voltage Lockout Built-in Thermal Shutdown Standby Function Package Outline Internal 2-Channnel Half Bridge Each Channel Operates Individually Output Switch Peak Current Operating Voltage Range Switching Frequency Output Shut Down Control Protection Fault Indicator Output NJW483SE3 : PCSP2-E3 +28 / -25mA typ. 8. to 35V 3kHz max. Ver

2 PIN CONFIGURATION PAD (*) PIN FUNCTION. VDD_SW 2. STBYb 3. SHDNb 4. IN 5. IN2 6. FLT 7. RT 8. GND 9. PGND.OUT2. VDD_HB 2. OUT 3. PGND 4. PGND 5. SW 6. SW 7. NC 8. RADJ 9. FB 2. IN < Top View> (*) The PAD is not connected to an IC chip electrically. NJW483SE3 BLOCK DIAGRAM Under Voltage Lock Out VDD_SW STBYb Standby ON/OFF RT FB IN- Error AMP Oscillator PWM Buffer SW RADJ Vref V Soft Start Thrmal Shut Dow n Protection FLT Under Voltage Lock Out High Side Gate Driver High Side Gate Driver VDD_HB Protection OUT OUT2 IN Control Logic Low Side Gate Driver Low Side Gate Driver IN2 Control Logic SHDNb GND PGND Ver.22--9

3 ABSOLUTE MAXIMUM RATINGS (Ta=25 C) PARAMETER SYMBOL MAXIMUM RATINGS UNIT Boost Converter Block Supply Voltage V DD_SW +6 V SW pin Voltage V SW +4 V RADJ pin Voltage V RADJ +6 (*2) V IN- pin Voltage V IN- -.3 to +6 (*2) V STBYb pin Voltage V STBYb -.3 to +6 (*2) V Half Bridge Driver Block Supply Voltage V DD_HB +4 V SHDNb pin Voltage V SHDNb -.3 to +6 (*2) V Input Voltage V IN V IN2 -.3 to +6 (*2) V FLT pin Voltage V FLT -.3 to +6 V Power Dissipation P D The back pad is mounted. 56 (*3) 98 (*4) The back pad is not mounted. mw 55 (*3) 85 (*4) Junction Temperature Range T j -4 to +5 C Operating Temperature Range T opr -4 to +85 C Storage Temperature Range T stg -4 to +5 C (*2): When Supply voltage is less than +6V, the absolute maximum voltage is equal to the Supply voltage. (*3): Mounted on glass epoxy board. ( mm:based on EIA/JDEC standard, 2Layers) (*4): Mounted on glass epoxy board. ( mm:based on EIA/JDEC standard, 4Layers), internal Cu area: mm This product may be damaged with electric static discharge (ESD). Please handle with care to avoid these damages. RECOMMENDED OPERATING CONDITIONS PARAMETER SYMBOL MIN. TYP. MAX. UNIT Boost Converter Block Supply Voltage V DD_SW V STBYb pin Voltage V STBYb V DD_SW V Timing Resistor R T kω Oscillating Frequency f OSC khz Half Bridge Driver Block Supply Voltage V DD_HB 8 35 V Output Switch DC Current I OM 2 ma SHDNb pin Voltage V SHDNb V DD_SW V Input Voltage V IN, V IN2 V DD_SW V FLT pin Voltage V FLT 5.5 V Ver

4 ELECTRICAL CHARACTERISTICS Boost Converter Block (Unless otherwise noted, V DD_SW =V STBYb =3.7V, R T =kω, Ta=25 C) PARAMETER SYMBOL TEST CONDITION MIN. TYP. MAX. UNIT Under Voltage Lockout Block UVLO Release Voltage V RUVLO_SW V UVLO Operate Voltage V DUVLO_SW V UVLO Hysteresis Voltage V UVLO_SW V RUVLO_SW - V DUVLO_SW.2 V Soft Start Block Soft Start Time T SS V B =.95V ms Oscillator Block Oscillation Frequency f OSC khz Oscillation Frequency deviation (Supply voltage) f DV V DD_SW =3. to 5.5V % Oscillation Frequency deviation (Temperature) f DT Ta= -4 to +85 C 3 % Error Amplifier Block Reference Voltage V B Short IN- and FB, Measuring IN- Pin -.%. +.% V Input Bias Current I B V B =.V µa Open Loop Gain A V 8 db Gain Bandwidth G B MHz Output Source Current I OM+ V FB =V, V IN- =.9V µa Output Sink Current I OM- V FB =V, V IN- =.V ma IN- pin Clamp Voltage V CLIN- V STBYb =V, V DD_SW =5.5V, I CLIN- =µa V RADJ pin FET ON Resistance R ON_RADJ I RADJ =.ma 2 28 Ω RADJ pin FET Leak Current I LEAK_RADJ V STBYb =V, V RADJ =3.3V µa PWM Comparate Block Maximum Duty Cycle M AX D UTY V IN- =.9V % Output Block Output ON Resistance R ON_SW I SW =ma.6.2 Ω Switching Current Limit I LMT_SW 2 A Switching Leak Current I LEAK_SW V STBYb =V, V SW =4V µa Ver.22--9

5 ELECTRICAL CHARACTERISTICS Half Bridge Driver Block (Unless otherwise noted, V DD_SW =3.7V, V DD_HB =25V, V STBYb =V SHDNb =3.7V, R T =kω, Ta=25 C) PARAMETER SYMBOL TEST CONDITION MIN. TYP. MAX. UNIT Under Voltage Lockout Block UVLO Release Voltage V RUVLO_HB V UVLO Operate Voltage V DUVLO_HB V UVLO Hysteresis Voltage V UVLO_HB V RUVLO_HB - V DUVLO_HB.6 V Enable Control Block High Side SW ON Resistance R DSH I OSOURCE =2mA Ω Low Side SW ON Resistance R DSL I OSINK =2mA Ω I DCTH High-Side ma Output Detection Current I DCTL Low-Side ma Current I RCVH High-Side ma Limit Release Current I RCVL Low-Side 5 2 ma Circuit Output Short I SHTH V OUT =V OUT2 =V 25 5 ma Current I SHTL V OUT =V OUT2 =V DD_HB 25 5 ma Output Rise Time tr V IN = to 3.3V 4 ns Output Fall Time tf V IN = to 3.3V 4 ns Rise Dead Time D tr V IN = to 3.3V 5 ns Fall Dead Time D tf V IN = to 3.3V 5 ns Rise Delay Time t d_on V IN = to 3.3V 25 ns Fall Delay Time t d_off V IN = to 3.3V 25 ns Rise Fall Delay Time Difference t d_on ± t d_off V IN = to 3.3V 2 ns Input Frequency f IN 3 khz High Side SW V SHDNb =V, V DD_HB =25V µa OFF Leak Current Low Side SW OFF Leak Current OUT pin VDD pin Potential Difference GND pin OUT pin Potential Difference I OLEAKOUTH I OLEAKOUTL V OUT =V OUT2 =V V SHDNb =V, V DD_HB =25V V OUT =V OUT2 =25V µa V PDOV V SHDNb =V, I ORH =2mA.7. V V PDGO V SHDNb =V, I ORL =2mA.7. V Shutdown Circuit Block SHDNb pin High Voltage (Operating Mode) SHDNb pin Low Voltage (Shutdown Mode) SHDNb pin Pull Down Resistance V IHSHDNb.6 V DD_SW V V ILSHDNb.6 V R PDSHDNb V SHDNb =3.3V kω Input Circuit Block IN, IN2 pin High Voltage V IHIN, V IHIN2.6 V DD_SW V IN, IN2 pin Low Voltage V ILIN, V ILIN2.6 V IN, IN2 pin Input Current I IIN, I IIN2 V IN =3.3V µa Ver

6 ELECTRICAL CHARACTERISTICS General Characteristics (Unless otherwise noted, V DD_SW =3.7V, V DD_HB =25V, V STBYb =V SHDNb =3.7V, R T =kω, Ta=25 C) PARAMETER SYMBOL TEST CONDITION MIN. TYP. MAX. UNIT STBYb pin High Voltage (Operating Mode) V IHSTBYb.6 V DD_SW V STBYb pin Low Voltage (Standby Mode) V ILSTBYb.6 V STBYb pin Pull Down Resistance R PDSTBYb V STBYb =3.3V kω FLT pin Low Level Output Voltage V LFLT I FLT =5µA.25.5 V FLT pin OFF Leak Current I OLEAKFLT V FLT =5.5V µa Quiescent Current (Switching Regulator Block) I QSW R T =kω, No Load ma Quiescent Current f I IN = f IN2 =khz (Half Bridge Driver Block) QHB antiphase 5% Duty Cycle.7. ma Quiescent Current V I DD_HB =V, (Standby) QSTBY V STBYb =V SHDNb =V.9.8 µa Ver.22--9

7 TYPICAL CHARACTERISTICS (Boost Converter Block) Oscillation Frequency f OSC (khz) Timing Resistor vs. Oscillation Frequency (V DD_SW =3.7V, Ta=25 C) Timing Resistor R T (kω) Oscillation Frequency fosc (khz) Oscillation Frequency vs. Temperature (V DD_SW =3.7V, R T =kω) Reference Voltage vs. Temperature (V DD_SW =3.7V).2 Output ON Resistance vs. Temperature (V DD_SW =3.7V, I SW =ma) Reference Voltage V B (V) Output ON Resistance R ON_SW (Ω) Switching Current Limit vs. Temperature (V DD_SW =3.7V) Switching Current Limit I LMT_SW (A) Ver

8 TYPICAL CHARACTERISTICS (Half Bridge Driver Block) 35 3 Output Current Limit Characteristics (High Side, V DD_HB =35V, Ta=25 C) Detection Current: I DCTH 35 3 Output Current Limit Characteristics (Low Side, V DD_HB =35V, Ta=25 C) Detection Current: I DCTL Output Current I O (ma) Release Current: I RCVH Output Short Current: I SHTH Output Current I O (ma) Release Current: I RCVL Output Short Current: I SHTL VDD_HB pin - OUT pin Voltage (V) OUT pin - GND pin Voltage (V) 35 3 Output Current Limit vs. Temperature (High Side, V DD_HB =35V) Detection Current: I DCTH 35 3 Output Current Limit vs. Temperature (Low Side, V DD_HB =35V) Detection Current: I DCTL Output Current I O (ma) Release Current: I RCVH Output Current I O (ma) Release Current: I RCVL 5 Output Short Current: I SHTH 5 Output Short Current: I SHTL Ver.22--9

9 TYPICAL CHARACTERISTICS (Half Bridge Driver Block) High Side SW ON Resistance R DSH (Ω) High Side SW ON Resistance vs. Temperature (V DD_HB =25V, I OSOURCE =2mA) Low Side SW ON Resistance R DSL (Ω) Low Side SW ON Resistance vs. Temperature (V DD_HB =25V, I OSINK =2mA) Output Rise Time vs. Temperature (V DD_HB =25V, V IN = to 3.3V) 6 Output Fall Time vs. Temperature (V DD_HB =25V, V IN = to 3.3V) Output Rise Time tr (ns) Output Fall Time tf (ns) Ver

10 TYPICAL CHARACTERISTICS (General Characteristics) 3 Quiescent Current vs. Supply Voltage (R T =kω, No Load, Ta=25 C) Switching Regulator Block 3 Quiescent Current vs. Temperature (V DD_SW =3.7V, R T =kω, No Load) Switching Regulator Block Quiescent Current I QSW (ma) Quiescent Current I QSW (ma) Supply Voltage V DD_SW (V) Quiescent Current vs. Supply Voltage (V DD_SW =3.7V, f IN =f IN2 =khz, Ta=25 C) Half Bridge Driver Block.9 Quiescent Current vs. Temperature (V DD_SW =3.7V, V DD_HB =25V, f IN =f IN2 =khz) Half Bridge Driver Block Quiescent Current I QSW (ma) Quiescent Current I QHB (ma) Supply Voltage V DD_SW (V) Quiecent Current I QHB (ma) Quiecent Current vs. Input Frequency (V DD_SW =3.7V, V DD_HB =25V, Ta=25 C) Half Bridge Driver Block Standby Current I QSTBY (µa) Standby Current vs. Temperature (V DD_SW =3.7V, V DD_HB =V, V STBYb =V SHDNb =V) Input Frequency f IN (khz) Ver.22--9

11 Switching Regulator Block Pin Operation Table INPUT OUTPUT STBYb VDD_SW FLT Feed back Power Mode Switch MOS FET L Hi-Z OFF OFF Stand-by H < V DUVLO_SW L OFF OFF UVLO H V RUVLO_SW Hi-Z ON ON Active INPUT OUTPUT Tj I SW FLT Feed back Power Mode Switch MOS FET >65 C L OFF OFF TSD (*4) I LMTSW L OFF OFF OCP (*5) (*4) After the TSD function operates, it returns by Tj < 25 C. (*5) Power MOSFET is controlled by a pulse-by-pulse after an OCP function. Switching Regulator Block Pin Operation Table INPUT OUTPUT IN IN2 OUT OUT2 L L L L L H L H H L H L H H H H INPUT OUTPUT Mode IN, IN2 STBYb SHDNb VDD_HB FLT OUT OUT2 SW.REG. Half Bridge Driver L or H L L Hi-Z Hi-Z Hi-Z Stand-by L or H L H Hi-Z Hi-Z Hi-Z Stand-by L or H H L < V DUVLO_HB L Hi-Z Hi-Z Active UVLO L or H H L V RUVLO_HB Hi-Z Hi-Z Hi-Z Active Shutdown L or H H H < V DUVLO_HB L Hi-Z Hi-Z Active UVLO L or H H H V RUVLO_HB Hi-Z L or H L or H Active INPUT OUTPUT Mode Tj I OUT I OUT2 FLT OUT OUT2 >65 C L Hi-Z Hi-Z TSD (*4) I DCTH, I Hi-Z SHTH, L or H CC (*6) I DCTL I SHTL I DCTH2, I Hi-Z L or H SHTH2, CC (*6) I DCTL2 I SHTL2 (*6) After CC(Constant Current) function, an output is controlled by constant current. Ver

12 Timing Chart t r t f IN IN2 % 9 % OUT OUT2 % 9 % 9 % % t d_on t d_off Fig.. Output Rise/Fall Time, Rise/Fall Delay Time I DSL I DSH I DCTL I DCTH I SHTL I RCVL I SHTH I RCVH V DD_HB V OUT, V OUT2 V DD_HB V OUT, V OUT2 (a) Low Side Power MOSFET (b) High Side Power MOSFET Fig. 2. Output Current Limit Circuit Power Dissipation vs. Ambient Temperature PCSP2-E3 Package Power Dissipation vs. Ambient Temperature PCSP2-E3 Package Power Dissipation vs. Ambient Temperature (The back pad is mounted., Tj= ~5 o C) (The back pad is not mounted., Tj= ~5 o C) Power Dissipation P D (mw) At on 2 layer PC Board At on 4 layer PC Board Power Dissipation P D (mw) At on 2 layer PC Board At on 4 layer PC Board Ambient Temperature Ta ( o C) Ambient Temperature Ta ( o C) Ver.22--9

13 APPLICATION EXAMPLE V IN =3.7V L 6.8µH SBD V OUT =24.53V C IN µf C P_SW.µF C OUT µf C nf R2 24kΩ VDD_SW SW R T kω RT NJW483 PGND IN- R kω Stand-by Shutdow n (Half-Bridge Driver) STBYb SHDNb Internal SW R ON_RADJ = 2Ω typ. FB RADJ R NF 2kΩ C NF nf IN IN VDD_HB IN2 IN2 OUT C P_HB.µF FAULT FLT OUT2 Pull-Up R PULL kω GND PGND R2 24k Ω VOUT = + VB = + V = R R + ON_ RADJ kω + 2Ω [ V] Ver

14 MEMO [CAUTION] The specifications on this databook are only given for information, without any guarantee as regards either mistakes or omissions. The application circuits in this databook are described only to show representative usages of the product and not intended for the guarantee or permission of any right including the industrial rights Ver.22--9