NJM2842U2. Very Low Output Low Dropout Regulator FEATURES PIN COFIGURATION

Transcription

1 Very Low Output Low Dropout Regulator GENERAL DESCRIPTION The NJM2842 is a very low output voltage, low drop out regulators. It delivers up to A output current with the output voltage from.8v to.8v. The use of an external bias voltage can improve the transient response and the ripple rejection characteristics while maintaining minimum input to output voltage. The NJM2842 suitable for constant-voltage source such as CPU, DSP and ASIC. PACKAGE OUTLINE NJM2842U2 NJM2842KH FEATURES Output Voltage Range.8V to.8v High Ripple Rejection 9 db typ.@v O =.2V Output Noise Voltage V NO =44 Vrms typ.@v O =.2V Output Current I O (min)=.a High Precision Output V O.% Dual input Voltage Type, (sequence free) High Stability for Load.2%/mA (max) Output Capacitor with 4.7 F ceramic capacitor Low Dropout Voltage.V O =6mA ON/OFF Control Built-in Thermal Overload Protection and Current Limit Protection Bipolar Technology Package Outline SOT-89-5,DFN6-H( ESON6-H), TO NJM2842DL3 PIN COFIGURATION CONTROL GND GND GND CONTROL NJM2842U2 NJM2842DL3 (Top View) GND 6 5 NC 3 4 CONTROL 4 NJM2842KH (Bottom View) 2 3 Exposed PAD on backside connected to GND. Ver

2 BLOCK DIAGRAM CONTROL Thermal Protection Bandgap Reference GND Over Current Protection OUTPUT VOLTAGE RANK LIST Device Name SOT-89-5 V O Device Name DFN6-H (ESON6-H) V O Device Name TO NJM2842U2-8.8V NJM2842KH-8.8V NJM2842DL3-.V NJM2842U2-.V NJM2842KH-.V NJM2842DL3-2.2V NJM2842U2-.V NJM2842KH-2.2V NJM2842U2-2.2V NJM2842KH-5.5V NJM2842U V NJM2842KH-8.8V NJM2842U2-5.5V NJM2842U2-8.8V V O ABSOLUTE MAXIMUM RATINGS (Ta=25 C) PARAMETER SYNBOL RATINGS UNIT Input Voltage +7 V Bias Voltage +7 V Control Voltage V CONT +7 V SOT (*) 24 (*2) Power Dissipation P D TO (*) 325(*2) mw DFN6-H (ESON6-H) 44 (*3) 2 (*4) Operating Temperature Topr C Storage Temperature Tstg C (*): Mounted on glass epoxy board. ( mm:based on EIA/JDEC standard size, 2Layers, Cu area mm 2 ) (*2): Mounted on glass epoxy board. ( mm:based on EIA/JDEC standard, 4Layers) (4Layers: Applying mm inner Cu area and a thermal via hole to a board based on JEDEC standard JESD5-5) (*3): Mounted on glass epoxy board based on EIA/JEDEC. (.5x 4.5x.6mm, 2Layers, Use the Exposed Pad) (*4): Mounted on glass epoxy board based on EIA/JEDEC. (.5x 4.5x.6mm, 4Layers, Use the Exposed Pad) (4Layers: Applying mm inner Cu area and a thermal via hole to a board based on JEDEC standard JESD5-5) BIAS VOLTAGE INPUT RANGE = +2.5V to +5.5V (V O <.5V) = V O +V to +5.5V (V O.5V) Ver.27--3

3 ELECTRICAL CHARACTERISTICS ( =2.5V(Vo.5V: =V O +V), =Vo+V, C BIAS =. F, C IN =4.7 F, C O =4.7 F, Ta=25 C) PARAMETER SYMBOL TEST CONDITION MIN. TYP. MAX. UNIT Output Voltage V O I O =3mA -.% - +.% V Unloaded Bias Current I BIAS I O =ma, except I CONT A Unloaded Input Current I IN I O =ma, except I CONT A Bias Current at Control OFF I BIAS(OFF) V CONT =V - - na Input Current at Control OFF I IN(OFF) V CONT =V - - na Output Current I O V O ma Line Regulation ( ) V O / =2.5V to +5.5V(V O<.5V) =V O+V to +5.5V(V O.5V) - -. %/V I O=3mA Line Regulation 2 ( ) V O / =V O+V to +5.5V, I O=3mA - -. %/V Load Regulation V O / I O I O =3mA to ma %/ma Dropout Voltage V I-O I O =6mA -..8 V =3.5V(V O <.5V) V Ripple Rejection Ratio ( ) RR( ) BIAS =3.8V(V O.5V) ebias=2mvrms, f=khz, I O =ma Refer to Table db Ripple Rejection Ratio 2 ( ) RR( ) ein=2mvrms, f=khz, I O =ma Refer to Table db Average Temperature Coefficient of Output Voltage V O / Ta Ta= to +85 C, I O =ma ppm/ C Output Noise Voltage V NO f=hz to 8kHz, I O =ma Refer to Table Vrms Control Current I CONT V CONT =.6V A Control Voltage for ON-state V CONT(ON) V Control Voltage for OFF-state V CONT(OFF) V Bias Voltage V Input Voltage V Table Voltage Ripple Rejection Ratio ( ) Ripple Rejection Ratio 2 ( ) Output Noise Voltage Rank MIN. TYP. MAX. UNIT MIN. TYP. MAX. UNIT MIN. TYP. MAX. UNIT.8V V V V db db Vrms.45V V V Ver

4 POWER DISSIPATION vs. AMBIENT TEMPERATURE 3 NJM2842U2 (SOT-89-5) Power Dissipation (Topr = -4ºC to +25ºC, Tj=5ºC) 35 NJM2842DL3 (TO-252-5) Power Dissipation (Topr = -4ºC to +25ºC, Tj=5ºC) on 4 layers board Power Dissipation: P D (mw) on 4 layers board on 2 layers board Power Dissipation: P D (mw) on 2 layers board Temperature: (ºC) Temperature: (ºC) Power Dissipation: P D (mw) NJM2842KH (DFN6-H) Power Dissipation (Topr = -4ºC to +25ºC, Tj=5ºC) on 4 layers board on 2 layers board Temperature: (ºC) Ver.27--3

5 TEST CIRCUIT A I BIAS A I IN. F NJM F A I CONT CONTROL V V CONT GND 4.7 F (Ceramic) I OUT V TYPICAL APPLICATION a) In case of where ON/OFF control is not required:. F NJM F R CONTROL GND 4.7 F b) In use of ON/OFF control:. F NJM F R CONTROL GND 4.7 F State of control pin: H output is enabled. L or open output is disabled. Ver

6 *In the case of using a resistance "R" between and control. If this resistor is inserted, it can reduce the control current when the control voltage is high. The applied voltage to control pin should set to consider voltage drop through the resistor R and the minimum control voltage for ON-state. The V CONT (ON) and I CONT have temperature dependence as shown in the "Control Current vs. Temperature" and " Control Voltage vs. Temperature" characteristics. Therefore, the resistance "R" should be selected to consider the temperature characteristics. * Bias Capacitance (C BIAS ) and an Input Capacitance (C IN ) C BIAS and C IN are required to prevent oscillation and reduce power supply ripple for applications when high power supply impedance or a long power supply line. Therefore, use the recommended C BIAS and C IN value (refer to conditions of ELECTRIC CHARACTERISTIC) or larger and should connect between -GND and -GND as shortest path as possible to avoid the problem. *Output Capacitor C O Output capacitor (C O ) will be required for a phase compensation of the internal error amplifier. The capacitance and the equivalent series resistance (ESR) influence to stable operation of the regulator. Use of a smaller C O may cause excess output noise or oscillation of the regulator due to lack of the phase compensation. On the other hand, Use of a larger C O reduces output noise and ripple output, and also improves output transient response when rapid load change. Therefore, use the recommended C O value (refer to conditions of ELECTRIC CHARACTERISTIC) or larger and should connect between GND and as shortest path as possible for stable operation In addition, you should consider varied characteristics of capacitor (a frequency characteristic, a temperature characteristic, a DC bias characteristic and so on) and unevenness peculiar to a capacitor supplier enough. When selecting C O, recommend that have withstand voltage margin against output voltage and superior temperature characteristic Ver.27--3

7 TYPICAL CHARACTERICTICS.5 Output Voltage vs. Input Voltage.5 Output Voltage vs. Bias Voltage.4.3 Io=A VBIAS=CNT=2.5V Cin= Cbias=.uF(Ceramic).2 Io=A..9.8 Io=5mA Io=8mA Io=mA Io=mA Input Voltage : (V).5 Cin= Cbias=.uF(Ceramic) Bias Voltage : (V).4.2 Output Voltage vs. Output Current.8 Ground Pin Current vs. Output Current CNT=Vbias=2.5V Cin= Cbias=.uF(Ceramic) Output Voltage :Vo (V) C 25 C -5 Vbias=Vcont=2.5V Cbias=.uF(Ceramic) Output Current:Io(mA) Output Current : Io(mA) 2 Control Current vs. Control Voltage.5 Output Voltage vs. Control Voltage 5 Cin= Cbias=.uF(Ceramic) Io=mA Rc= Rc= Rc=5k Rc=5k 5 Rc=k Control Voltage : Vcont(V).5 Rc=k Cin= Cbias=.uF(Ceramic) Io=mA Control Voltage : Vcont(V) Ver

8 Load Regulation vs. Output Current 3 Peak Output Current vs. Input Voltage Vin=2.2V Vbias=2.5V Cin= Cbias=uF(Ceramic) Output Current : Io(mA) 5 Cin= Cbias=.uF(Ceramic) Input Voltage : (V) Unloaded Input Current v.s. Input Voltage Unloaded Bias Current v.s. Bias Voltage 8 Vbias=CNT=2.5V Output is open. Cin= Cbias=.uF(Ceramic) 8 Vin=2.2V Vcnt=.6V Output is open. Cin= Cbias=.uF(Ceramic) Input Voltage : (V) Bias Voltage : (V) Dropout Voltage vs. Output Current Vbias=2.5V Cin= Cbias=uF(Ceramic) 8 Output Noise Voltage vs. Output Current VBIAS=CNT=2.5V Cin=Co=4.7uF Cbias=.uF Output Current:Io(mA)... Output Current : Io(mA) Ver.27--3

9 2 Ripple Rejection Ratio v.s. Frequency Ripple Rejection(Vbias-Vout) vs. Output Current 8 Io=mA Io=mA Io=mA Io=5mA Io=mA f=khz Cbias=.uF(Ceramic) VBIAS=3.5V ebias=2mvrms K K K Frequency : f (Hz) VBIAS=3.5V ebias=2mvrms Cin=.uF(Ceramic) Cbias=4.7uF(Ceramic) f=khz 2... Output Current : Io(mA) 9 8 Ripple Rejection(Vin-Vout) vs. Output Current f=khz Equivalent Serise Resistance vs. Output VIN=.3V-5.5V -5.5V 7 6 f=khz STABLE REGION ein=2mvrms Cbias=.uF(Ceramic) 2... Output Current : Io(mA)..... Output Current : Io(mA) 2 Control Voltage vs.temperature.25 Output Voltage vs.temperature Control Voltage:Vcont(off) Vbias=2.5V Io=3mA Cbias=.uF(Ceramic) Output Voltage Vo Vin=2.2V Io=3mA Cbias=.uF(Ceramic) Ver

10 3 Peak Output Current vs.temperature Peak Output Current:Imax(mA) Vin=2.2V Vbias=Vcont=2.5V Cbias=.uF(Ceramic) Line Regulation(VIN) vs.temperatture.2 Line Regulation(VBIAS) vs.temperatture Line Regulation:dVo/dIo(%/V). -. Vbias=Vcont=2.5V Io=3mA Cbias=.uF(Ceramic) Line Regulation:dVo/dIo(%/V) Vin=2.2V Vcont=2.5V Io=3mA Cbias=.uF(Ceramic). Load Regulation v s.temperatture Output Voltage vs.temperature Load Vbias=Vcont=2.5V Io=3-mA Cbias=.uF(Ceramic) Output Voltage Vo Vin=2.2V Io=3mA Cbias=.uF(Ceramic) Ver.27--3

11 2 NM2842_.2V Short Circuit Current vs.temperature 3.5 ON/OFF Transient Response Without Load 4 Control Voltage 3 2 Short Circuit Current:Isc(mA) 5 Vbias=Vcont=2.5V Cbias=.uF(Ceramic) Output Voltage:Vo(V) C Co=4.7uF -4 Io=mA.5-8 Output Voltage - -6 Control Voltage:Vcont(V) Time:t(s) 3.5 ON/OFF Transient Response 4.45 Load transient Response 5 Output Voltage:Vo(V) Control Voltage 3 2 C Co=4.7uF -4 Io=3mA Output Voltage Time:t(ms) Control Voltage:Vcont(V) Output Voltage:Vo(V) Output Current Time:t(μs) C.5 Output Voltage -5. Co=4.7uF Io=5-mA Output Current:Io(mA) Output Voltage:Vo(V).32.3 Input Voltage C.24 Vcont= Co=4.7uF Io=3mA.22 Output Voltage.2 Line transient Response(Vbias Fixed) Input Voltage:Vin(V) Output Voltage:Vo(V) Line transient Response(Vin Fixed).32 C.3 5 Co=4.7uF Io=3mA Bias Voltage Output Voltage Bias Voltage:Vbias(V) Time:t(ms) Time:t(ms) Ver

12 [CAUTION] The specifications on this databook are only given for information, without any guarantee as regards either mistakes or omissions. The application circuits in this databook are described only to show representative usages of the product and not intended for the guarantee or permission of any right including the industrial rights Ver.27--3