High Voltage Ultra low current consumption Io=100mA LDO. I O (min.)=100ma V O 1.0% DFN6-H1(ESON6-H1), SOT-23-5, SOT-89-3
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1 High Voltage Ultra low current consumption Io=1mA LDO GENERAL DESCRIPTION The NJW4182 is a 1mA output Low dropout regulator with high maximum input voltage, ultra-low current consumption and small package. Due to the low current consumption, the NJW4182 is suitable for light load and continuously running applications such as power management microprocessor, RTC, protection circuit, security system and so on. PACKAGE OUTLINE NJW4182KH1 NJW4182F FEATURES Wide Operation Voltage Range Low Current Consumption MLCC correspond Output Current High Precision Output Voltage Internal Thermal Overload Protection Internal Over Current Protection Package Outline 4. to 4V NJW4182U3 9μA (typ.) I O (min.)=1ma V O 1.% DFN6-H1(ESON6-H1), SOT-23-, SOT-89-3 PIN CONFIGRATION (Top View) Exposed Pad on backside connect to GND (Bottom View) 1. N.C. 2. GND 3. N.C 4. V IN. N.C 6. V OUT N.C. 2. GND 3. N.C 4. V OUT. V IN NJW4182KH1 NJW4182F NJW4182U3 1.V OUT 2.GND 3.V IN BLOCK DIAGRAM Ver
2 OUTPUT VOLTAGE RANK LIST DFN6-H1(ESON6-H1) SOT-23- SOT-89-3 Device Name V OUT Device Name V OUT Device Name V OUT NJW4182KH1-2 2.V NJW4182F2 2.V NJW4182U V NJW4182KH V NJW4182F33 3.3V NJW4182U3-.V NJW4182KH1-.V NJW4182F.V ABSOLUTE MAXIMUM RATINGS (Ta=2 C) PARAMETER SYNBOL RATINGS UNIT Input Voltage V IN -.3 to +4 V Output Voltage V OUT -.3 to V IN 17 V DFN6-H1 4 (*1) (ESON6-H1) 12 (*2) Power Dissipation P D SOT (*3) 6 (*4) mw SOT (*) 24(*6) Junction Temperature Tj -4 to +1 C Operating Temperature Topr -4 to +8 C Storage Temperature Tstg -4 to +1 C (*1): Mounted on glass epoxy board based on EIA/JEDEC STANDARD. ( mm: 2Layers with Exposed Pad FR-4) (*2): Mounted on glass epoxy board based on EIA/JEDEC STANDARD. ( mm: 4Layers FR-4) (4Layers inner foil: mm, Applying a thermal via hole to a board based on JEDEC standard JESD1-) (*3): Mounted on glass epoxy board based on EIA/JEDEC. ( mm: 2Layers FR-4) (*4): Mounted on glass epoxy board based on EIA/JEDEC. ( mm: 4Layers FR-4), internal Cu area: mm (*): Mounted on glass epoxy board. ( mm:based on EIA/JDEC standard size, 2Layers, Cu area 1mm 2 ) (*6): Mounted on glass epoxy board. ( mm:based on EIA/JDEC standard, 4Layers) (4Layers inner foil: mm, Applying a thermal via hole to a board based on JEDEC standard JESD1-) OPERATION VOLTAGE RANGE V IN = 4.V to 4V Ver
3 ELECTRICAL CHARACTERISTICS Unless otherwise specified, V O 3V :V IN =V O +1V, C IN =1.µF, C O =4.7µF, Ta=2 C V O 3V :V IN =4V, C IN =1.µF, C O =1µF, Ta=2 C PARAMETER SYMBOL TEST CONDITION MIN. TYP. MAX. UNIT Output Voltage V O I O =3mA -1.% - +1.% V Quiescent Current I Q I O =ma μa Output Current Io V O ma Line Regulation V O / V IN V IN = V O +1V to 4V, I O =3mA(V O 3V), V IN = 4V to 4V, I O =3mA(V O 3V) - -. %/V Load Regulation V O / I O I O =ma to 1mA %/ma Dropout Voltage(*7) V IO I O =6mA V Ripple Rejection Average Temperature Coefficient of Output Voltage RR V IN = V, ein = mvrms, f=1khz, Io=1mA V IN = V O +2V, ein = mvrms, f = 1kHz, Io = 1mA Vo=2.V Vo=3.3V Vo=.V V O / Ta Ta= to 8 C, I O =3mA - - ppm/ C (*7): The output voltage excludes under 3.8V. The above specification is a common specification for all output voltages. Therefore, it may be different from the individual specification for a specific output voltage. db Ver
4 POWER DISSIPATION vs. AMBIENT TEMPERATURE 2 NJW4182KH1 Pow erdissipation (Topr=-4~+8 C,Tj=1 C) on 4 layers board 8 4 on 2 layers board Temperature : Ta( C) Power Dissipation P D (mw) on 4 layers board on 2 layers board NJW4182F PowerDissipation (Topr=-4~+8 C,Tj=1 C) Temperature : Ta( C) Power Dissipation P D (mw) on 4 layers board on 2 layers board NJW4182U3 PowerDissipation (Topr= -4~+8 C,Tj=1 C) Temperature : Ta( C) Ver
5 TEST CIRCUIT A I IN V IN V OUT V IN 1. F (ceramic) NJW4182 (*8) 4.7 F I OUT V V OUT (ceramic) (*8) :Vo < 3.V version : Co=1 F(Ceramic) GND TYPICAL APPLICATION V IN V IN V OUT V OUT 1. F NJW4182 (*9) 4.7 F GND (*9) :Vo < 3.V version : Co=1 F Ver
6 *Input Capacitor C IN Input Capacitor C IN is required to prevent oscillation and reduce power supply ripple for applications when high power supply impedance or a long power supply line. Therefore, use the recommended C IN value (refer to conditions of ELECTRIC CHARACTERISTIC) or larger and should connect between GND and V IN as shortest path as possible to avoid the problem. *Output Capacitor C O Output capacitor (C O ) will be required for a phase compensation of the internal error amplifier. The capacitance and the equivalent series resistance (ESR) influence to stable operation of the regulator. Use of a smaller C O may cause excess output noise or oscillation of the regulator due to lack of the phase compensation. On the other hand, Use of a larger C O reduces output noise and ripple output, and also improves output transient response when rapid load change. Therefore, use the recommended C O value (refer to conditions of ELECTRIC CHARACTERISTIC) or larger and should connect between GND and V OUT as shortest path as possible for stable operation The recommended capacitance depends on the output voltage rank. Especially, low voltage regulator requires larger C O value. In addition, you should consider varied characteristics of capacitor (a frequency characteristic, a temperature characteristic, a DC bias characteristic and so on) and unevenness peculiar to a capacitor supplier enough. When selecting C O, recommend that have withstand voltage margin against output voltage and superior temperature characteristic though this product is designed stability works with wide range ESR of capacitor including low ESR products Ver
7 *Overshoot of Output Voltage Transient fluctuation of output voltage tends to be large compared to other typical regulators because the NJW4182 is designed with the concept of low current consumption characteristics. In general, overshoot or undershoot of output voltage is more likely to occur when the following cases. When input voltage or output current fluctuate sharply When output capacitance is small When output load is light When start up from the condition of narrow voltage difference between an Input and an output. The NJW4182 can reduce overshoot voltage compared to other low current consumption products by a built-in overshoot protection (OSP). However, very large overshoot may occur because of delay of the OSP circuit when the input voltage rises from between 2.V and 2.V. The value of overshoot varies with composite conditions, please refer the above and check the actual condition. In addition, the following measures will be mentioned as a method to reduce the overshoot value. a. By increasing the input and output capacitors to absorb overshoot value. b. Adjust the rising speed of the input voltage, to avoid rising from between 2.V and 2.V. Ver
8 TYPICAL CHARACTERISTICS Output Voltage : Vo (V) C IN =1.μF NJW4182_.V Output Voltage vs Input Voltage 4.. Input Voltage : V IN (V) Io=mA Io=3mA Io=1mA Output Voltage : Vo (V) IN =6.V C IN =1.μF NJW4182_.V Output Voltage vs Output Current Output Current : Io (ma) GND Pin Current : I GND (μa) V IN =6.V C IN =1.μF NJW4182_.V GND Pin Current vs Output Current Quiescent Current : I Q (μa) C IN =1.μF Output is open NJW4182_.V Quiescent Current vs Input Voltage Output Current : Io (ma) Input Voltage : V IN (V) Load Regulation : dvo/dio (mv) V IN =6.V Cin=1.μF NJW4182_.V Load Regulation vs Output Current 1 1 Output Current : Io (ma) Dropout Voltage : dv IO (V) C IN =1.μF NJW4182_.V Dropout Voltage vs Output Current 1 1 Output Current : Io (ma) Ver
9 4 NJW4182_.V Peak Output Current vs Input Voltage 4 NJW4182_.V Short Circuit Current vs Input Voltage Peak Output Current : Io PEAK (ma) C IN =1.μF Vo=4.V Short Circuit Current : I SC (ma) C IN =1.μF Vo=V Input Voltage : V IN (V) Input Voltage : V IN (V) 1 NJW4182_.V Ripple Rejection vs Frequency 1 NJW4182_.V Ripple Rejection vs Output Current 9 9 Ripple Rejection : RR(dB) Io=mA Io=1mA Io=1mA V IN =7.V C IN =1.μF ein=mvrms Frequency : f (khz) Ripple Rejection :RR(dB) V IN =7.V C IN =1.μF ein=mvrms f=1khz f=1khz Output Current :Io (ma) Equivalent Serise Resistance : ESR(Ω) NJW4182_.V Equivalent Serise Resistance vs Output IN =6.-4V C IN =1.μF Stable Region Output Current : Io (ma) Output Voltage:Vo (V) IN =6.V C IN =1.μF Io=mA Io=1mA Io=3mA Io=6mA Io=1mA NJW4182_.V Output Voltage vs Temperature Ver
10 NJW4182_.V Peak Output Current vs Temperature NJW4182_.V Short Circuit Current vs Temperature Peak Output Current : I OPEAK (ma) IN =1.μF Vo=4.V Vin=6V Vin=4V Short Circuit Current : I SC (ma) IN =1.μF Vo=V Vin=6V Vin=4V Line Regulation:dV O /dv IN (%/V) IN =6.-4V C IN =1.μF Io=3mA NJW4182_.V Line Regulation vs Temperature Load Regulation : dvo/dio IN =6.V C IN =1.μF Io=-1mA NJW4182_.V Load Regulation vs Temperature Temperature : Ta ( C) Output Voltage:Vo (V) IN =6.V C IN =1.μF NJW4182_.V Output Voltage vs Temperature Quiescent Current:IQ (μa) IN =6.V C IN =1.μF Output is open NJW4182_.V Quiescent Current vs Temperature Ver
11 Dropout Voltage:V IO IN =1.μF Io=6mA NJW4182_.V Dropout Voltage vs. Temperature Output current:io(ma) Load Transient Response Output Voltage Output current NJW4182_.V C IN =1.μF V IN =6.V Io=1-1mA Output Voltage:Vo(V) Time:t(ms) 1 NJW4182_.V Input Transient Response.3.2 Input Voltage:VIN (V) 7 6 Output Voltage Input Voltage C IN =1.uF Co=4.7uF V IN =6-7V Io=3mA Output Voltage:Vo(V) Time:t(ms) [CAUTION] The specifications on this databook are only given for information, without any guarantee as regards either mistakes or omissions. The application circuits in this databook are described only to show representative usages of the product and not intended for the guarantee or permission of any right including the industrial rights. Ver
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