Io=500mA LDO with Watchdog Timer

Transcription

1 NJW-T Io=mA LDO with Watchdog Timer GENEAL DESCIPTION The NJW is a ma output low dropout voltage regulator with watchdog timer(wdt). It has a detecting circuit to monitor output voltage and a watchdog timer function for clock monitor. Detecting voltage is adjustable with external resistor. Low consumption current characteristic contributes to reduce burden on automotive battery in full-time operating application. Because of operating wide temperature range from - C to + C, the NJW suits for high reliability application such as automotive application. PACKAGE OUTLINE NJWGM FEATUES Wide Operating oltage ange. to max. Low Current Consumption μa typ. High Precision Output oltage o.%(ta= C) o.%(ta=- C to C) High Precision Detection oltage DET.%(Ta= C) DET.%( Ta=- C to C) Output Current Io(min.)=mA Adjustable Detection oltage with external resistor Setting WDT Monitor Time, WDT eset Time and Output Delay Hold Time with external capacitor Watchdog Timer Enable Function Correspond to Low ES capacitor (MLCC) Thermal shutdown circuit Over Current Protection Package Outline HSOP PIN CONFIGUATION SADJ O Exposed PAD on backside connected to IN OUT. Clock Input Pin. SADJ External esistor Pin for Adjusting Detection oltage. External Capacitor Pin for Setting WDT Monitor Time/ Output delay hold Time. IN Input oltage Pin. OUT Output oltage Pin. Ground Pin. Watchdog Timer Disenable Pin. O eset Output Pin PODUCT CLASSFICATION Status Device Name ersion Output oltage Detection oltage. NJWGM-A-T M.P. A. NJWGM-A-T. PLAN NJWGM-B-T B.. er

2 NJW-T PIN DESCIPTIONS PIN NAME PIN NUMBE FUNCTION Clock Input pin. Monitor the clock from CPU. SADJ For Adjusting Detection oltage pin. It can optionally adjust Detection oltage by connecting resistor divider. If it is not required, this pin should be open. IN Power Supply pin. OUT Output oltage pin. pin. O Exposed PAD Connects Capacitor pin for setting WDT Monitor Time, WDT eset Time and Output Delay Hold time. It can optionally set time by external capacitor. Enable pin for WDT. When the High level is WDT active while Low level or OPEN is WDT inactive. eset Output pin. When output voltage is below the detection voltage, Output Low level signal. O pin pulls up to OUT internally with kω typ. - Connected to. BLOCK DIAGAM IN OUT Current Limit ref Thermal Protection SADJ EG O ref CW Control - - er.--

3 NJW-T ABSOLUTE MAXIMUM ATINGS (Ta= C) PAAMETE SYNBOL ATINGS UNIT Input oltage IN -. to + Output oltage O -. to IN + ESET Output oltage O -. to + Clock Input oltage -. to +. Input oltage -. to +. SADJ Pin Input oltage SADJ -. to +. Power Dissipation P D 9(*) (*) mw Junction Temperature Tj - to + C Operating Temperature Topr - to + C Storage Temperature Tstg - to + C (*): Mounted on glass epoxy board. (...mm:eia/jdec standard size, Layers) (*): Mounted on glass epoxy board. (...mm:eia/jdec standard size, Layers) (Layers inner foil:. x.mm applying a thermal via hole to a board based on JEDEC standard JESD-) INPUT OLTAGE ANGE IN =. to er

4 NJW-T ELECTICAL CHAACTEISTICS (General Characteristics) (Unless otherwise noted, IN = O +, C IN =.μf, C O =.μf, Ta= C) PAAMETE SYMBOL TEST CONDITION MIN. TYP. MAX. UNIT WDT Active - Operating Current I SS µa WDT Active, Ta= -ºC to +ºC - - (egulator Block) (Unless otherwise noted, IN = O +, C IN =.μf, C O =.μf, Ta= C) PAAMETE SYMBOL TEST CONDITION MIN. TYP. MAX. UNIT Output oltage O I O =ma -.% - +.% I O =ma, Ta= -ºC to +ºC -.% - +.% Output Current I O O O.9, Ta= -ºC to +ºC - - ma IN = O + to, I O =ma - -. Line egulation O / IN IN = O + to, I O =ma, %/ - -. Ta= -ºC / +ºC(*) I O =ma to ma -.. I O =ma to ma, - -. Load egulation O / I O Ta= -ºC / +ºC(*) %/ma I O =ma to ma, Ta= -ºC /+ºC (*) - -. ipple ejection = +,ein=mrms, f=khz, IN O I O =ma - - db Dropout oltage IO I O =ma -.. I O =ma, Ta= -ºC to +ºC - -. Average Temperature Coefficient of Output oltage O / Ta I O =ma, Ta= C to C - - ppm/ C (*): These parameter are guaranteed with only - C and + C. (oltage Detector Block) (Unless otherwise noted, IN = O +, C IN =.μf, C O =.μf, Ta= C) PAAMETE SYMBOL TEST CONDITION MIN. TYP. MAX. UNIT Detection oltage DET -.% - +.% Ta= -ºC to +ºC -.% - +.% Hysteresis oltage HYS Ta= -ºC to +ºC - m Average temperature coefficient of Detection DET / T oltage a Ta= to C - ± - ppm/ C Pin Charge Current I CW =. 9 at Delay Hold CWD CW =.,Ta= -ºC to +ºC - 9 μa Pin Threshold oltage at.9.. eset elease TCWD Ta= -ºC to +ºC.9 -. SADJ Pin oltage SADJ O = DET (o detected).9.. O = DET (o detected) Ta= -ºC to +ºC.9 -. Average temperature Coefficient of SADJ Pin oltage SADJ / T a Ta=ºC to + C - - ppm/ C Output Delay Hold time t P =.μf, O =L H... =.μf, O =L H, Ta= -ºC to +ºC. -. ms Low level ESET Output O = DET oltage OL O = DET -., Ta= -ºC to +ºC - -. ESET Output Block. - - Operating oltage OPL Ta= -ºC to +ºC. - - ESET Output oltage at Start up OU IN start up -. - Pull up resistor PU - - k - - er.--

5 NJW-T ELECTICAL CHAACTEISTICS (Watchdog Timer Block) (Unless otherwise noted, IN = O +, C IN =.μf, C O =.μf, Ta= C) PAAMETE SYMBOL TEST CONDITION MIN. TYP. MAX. UNIT A version. - - Clock input High-level TCKH A version, Ta= -ºC to +ºC. - - B version. - - B version, Ta= -ºC to +ºC. - - A version - -. Clock input Low-level TCKL A version, Ta= -ºC to +ºC - -. B version - -. B version, Ta= -ºC to +ºC - -. Clock Input Pulse Width t CKW. - - Ta= -ºC to +ºC. - - ms Clock Input Cycle t CK. - - Ta= -ºC to +ºC. - - ms Pin Discharge Current I CW CW =. CW =., Ta= -ºC to +ºC µa Pin Charge Current I CWL CW =. 9 CW =., Ta= -ºC to +ºC - 9 µa High-side.9.. Threshold oltage TCWH Ta= -ºC to +ºC.9 -. Low-side... Threshold oltage TCWL Ta= -ºC to +ºC. -. WDT Monitor Time t WD =.μf =.μf, Ta= -ºC to +ºC ms WDT eset Time t W =.μf...9 =.μf, Ta= -ºC to +ºC. -. ms Pin Threshold. - - TWDIS oltage at WDT Disable Ta= -ºC to +ºC Pin Threshold - -. TWEN oltage at WDT Enable Ta= -ºC to +ºC - -. The above specification is a common specification for all output voltages. Therefore, it may be different from the individual specification for a specific output voltage. * These parameters are tested by Pulse Measurement. er

6 NJW-T THEMAL CHAACTEISTICS Junction-to-ambient thermal resistance PAAMETE SYMBOL ALUE UNIT Junction-to-Top of package characterization parameter ja jt (*) (*) (*) (*) (*): Mounted on glass epoxy board. (...mm:eia/jdec standard size, Layers) (*): Mounted on glass epoxy board. (...mm:eia/jdec standard size, Layers) (Layers inner foil:. x.mm applying a thermal via hole to a board based on JEDEC standard JESD-) C/W C/W POWE DISSIPATION vs. AMBIENT TEMPEATUE NJWGM PowerDissipation (Topr=-~+ C,Tj= C) Power Dissipation P D (mw) on layers board on layers board - - Temperature : Ta( C) - - er.--

7 NJW-T TEST CICUIT LDO BLOCK O SADJ I IN IN OUT.μF IN μf (ceramic).μf (ceramic) I O O = O EXCEPT LDO BLOCK *I CWO : Pin Current, I O : O Pin Current I CW, I SS TCWH ( TCWD ) TCWL O O O.. SADJ IN OUT O + I CW at CW :. & O : H I SS at CW :. & O : H. SADJ IN OUT O + TCWH = CW at O : L H. SADJ IN OUT O + TCWL = CW at O : H L DET TCKH, I CWL (I CWD ) TWDIS, TWEN の順で印加 O O O. O + SADJ IN OUT O. O + SADJ IN OUT.. O + SADJ IN OUT.. DET = OUT at O :L H TH at CW: I CW I CWL I CWL =I CWO after CK edge TWDIS = at I CWO > I CW TWEN = at I CWO = I CW OL OU, OPL PU. O + DET -. SADJ IN O OUT. SADJ IN O OUT ~..uf O + SADJ IN O OUT OL = O at O : DET -. OU = O at O : ~. OPL OL at O. PU = O / I O t CKW,t CK t P,t WD,t W Oscilloscope.uF O + SADJ IN O OUT Oscilloscope Oscilloscope.uF SADJ IN O OUT Oscilloscope OUT Oscilloscope er

8 NJW-T TYPICAL APPLICATION () Monitoring the output voltage of the regulator and the clock of microcomputer Connect resistor divider when adjusting the Detection oltage () Only use the voltage detector (Watchdog Timer Disable) Connect resistor divider when adjusting the Detection oltage - - er.--

9 NJW-T *Input Capacitor C IN The input capacitor C IN is required to prevent oscillation and reduce power supply ripple for applications when high power supply impedance or a long power supply line. Therefore, use the recommended C IN value (refer to conditions of ELECTIC CHAACTEISTIC) or larger and should connect between and IN as shortest path as possible to avoid the problem. *Output Capacitor C O The output capacitor C O will be required for a phase compensation of the internal error amplifier. The capacitance and the equivalent series resistance (ES) influence to stable operation of the regulator. Use of a smaller C O may cause excess an output noise or an oscillation of the regulator due to lack of the phase compensation. On the other hand, use of a larger C O reduces an output noise and a ripple output, and also improves an output transient response when a load rapidly changes. Therefore, use the recommended C O value (refer to conditions of ELECTIC CHAACTEISTIC) or larger and should connect between and OUT as shortest path as possible for stable operation The recommended capacitance depends on the output voltage rank. Especially, a low voltage regulator requires larger C O value. In addition, you should consider varied characteristics of a capacitor (a frequency characteristic, a temperature characteristic, a DC bias characteristic and so on) and unevenness peculiar to a capacitor supplier enough. When selecting C O, recommend that have withstand voltage margin against an output voltage and superior temperature characteristics though this product is designed stability works with wide range ES of capacitor including low ES products. er

10 NJW-T Application Manual TIMING CHAT () () () () () () () () () () (9) () IN (Input oltage) OUT (Output oltage) OUT DETH DET OPL TWDIS (WDT Enable) t CK (Clock Input oltage) TCKH TCKL t CKW CW ( pin oltage) EG () TCWH TCWD TCWL OUT O (ESET Output oltage) t P twd * O pin is pulled up to OUT IC's internaly. t W OPEATION EXPLANATION Output delay time The NJW has the output delay time t P till the ESET outputs "H" in order to prevent malfunction due to chattering after the Output voltage OUT exceeds the ESET release voltage DETH (= DET + HYS ) () Initialized state When the Output voltage OUT is less than the ESET release voltage DETH (= DET + HYS ), the Pin voltage CW is and the ESET Output oltage O is L. () Start of Output delay time If OUT exceeds DETH, pin capacitor is charged by the Pin Charge Current at Delay Hold I CWD (typ.μa) and the output delay time is started. O keeps L level while the output delay time. In addition, return to a state of the () Initialized state ( CW =, O = L ) when OUT is less than DETH during charging. () Detectable state of the output voltage drop When CW reaches the Pin threshold oltage at eset elease TCWD (typ..), the ESET Output oltage O switched from L to H and the output voltage drop will be detectable. The period from a point wherein OUT exceeds DETH to a point wherein O turns to "H" is taken as t P is discharged by the Pin Discharge Current I CW (typ.μa) after CW has reached TCWD and CW start to fall. - - er.--

11 Application Manual NJW-T Watchdog timer (WDT) Monitor Time, Watchdog timer (WDT) eset Time The NJW can be set the WDT Monitor time t WD for the monitoring the clock() of a microcomputer. If it does not detect a rising edge within t WD, then O pin outputs "L" level. O keeps "L", for the period which is set by the WDT eset Time t W. () Standby state of rising edge detection. rising edge will be detectable after is discharged by I CW and CW is equal or less than the High-side Threshold oltage TCWH (typ..). () When detect a rising edge When detects a rising edge, is switched from discharge cycle by I CW to charge cycle by I CWL (typ. μa) and CW rises. Then, CW reaches to TCWH, Cw is switched to discharge cycle and returns to state of the () Standby state of rising edge detection. () When don t detect rising edge When CW reaches to the Low-side threshold oltage TCWL (typ..) without detecting rising edge while discharge cycle, O is switched from H to L and Cw is switched to charge cycle. The WDT Monitor Time t WD is the period wherein CW falls from TCWH to TCWL without detecting rising edge. () Start of WDT eset Time O is kept L while is charged by I CWL till CW reaches TCWH. When CW beyond TCWH, O is switched from L to H. Then returns to the watchdog timer monitor period as start to discharge capacitor by I CW. The period which keeps O = L is taken as WDT eset Time t W. Detection of Output oltage drop () When it becomes OUT DET. When OUT becomes less than DET while t WD or t W, O is switched to L and CW is due to is rapidly discharged. Then operation returns to the () Initialized state. Disable to WDT monitor function (9) When Watchdog Timer Disenable pin = H. = H. The NJW disables the WDT function by setting At this time, CW is fixed at after is charged to the IC s internal power supply ( EG =). And if state of OUT DET, O keeps H. When setting = L or Open, CW is discharged. After CW becomes less than TCWH, then WDT function is restarted. If set = H during the period of tw, WDT function stops after the t W period passes. At the time of an Input oltage IN drops () When the output voltage OUT drops to. O keeps L till the output voltage OUT becomes around.. er

12 NJW-T Application Manual SETTING METHOD OF PATS for the Watchdog timer reset time t W, the Watchdog timer monitor time t WD and the ESET Output Delay Hold time t P It is able to set t W, t P and t WD by a capacitance of. Show a method to set the from each condition as follows. It applies any one of formula <>, <> or <> for calculation of a. On the other hands, apply any one of formula <>, <> or <9> to calculate time from a. When set from the Output Delay Hold time t P The Output Delay Hold time t P is the period during CW changes from to TCWD by the charge current I CWD. Therefore, a formula to calculate a value of capacitor from t P is as follows: I CWD tp <> TCWD It is able to calculate simply, because parameter of I CWD is μa(typ.) and TCWD is. (typ.). tp. *t P [s] tp [F] <> Also, the formula to calculate t P from is as follows. C I t P W TCWD * [F] CWD CW [s] <> - - er.--

13 Application Manual NJW-T In case of set from the Watchdog timer monitor time t WD The WDT Monitor Time t WD is the time until CW equal to TCWL by discharged I CW after CW has reached TCWD or TCWH. Therefore, a formula to calculate a value of from t WD is as follows. CW twd <> TCWH TCWL I * use parameter of TCWH here because of TCWD = TCWH It is able to calculate simply, because parameter of I CWD is μa(typ.), TCWH and TCWL is. (typ.)... CW twd. twd [F] <> *t WD (s) Also, the formula to calculate t WD from is as follows. t WD C I W CW TCWH TCWL. CW [s] <> * (F) er

14 NJW-T Application Manual in case of set from the Watchdog timer reset time t W The WDT eset Time t W is the time until CW reaches TCWH charged by I CWL after CW has reached TCWL. Therefore, a formula to calculate a value of from t W is as follows. CWL tw <> TCWH TCWL I It is able to calculate simply, because parameter of I CWL is μa(typ), TCWH and TCWL is. (TYP)... CW tw. tw [F] <> *t W (s) Also, the formula to calculate t W from is as follows. t W C I W CWL TCWH TCWL. CW [s] <9> * (F) Then, the relation between and t P, t WD and t W are showed as Fig.. Output Delay Hold Time TP WDT Moniter Time TWD WDT eset Time TW t P t WD t W T P,T WD,T W [ms].... [μf] Fig. The relation of and t P, t WD, t W - - er.--

15 Application Manual NJW-T External resistor, for detection voltage adjusting NJW micro computer O SADJ ESET IN μf IN OUT.μF DD Fig.. Typical application for detection voltage setting by external resistor When optionally adjusts DET by external resistor as Fig., it is necessary to consider a value of resistor internal IC for detection voltage. Show a part including voltage detector circuit in the IC in Fig.. When connected resistor and, DET and DETH are calculated as follows. [ Detection oltage DET ( transistor M : OFF) ] D D DET D EF At the time of D, ( D + D ), it can express approximate formula as follows. <> O + SADJ SADJ D DET EF <> D D M EF [ ESET release voltage DETH (transistor M :ON) ] D DETH D From calculation of DET and DETH, the Hysteresis oltage HYS is as follows. EF Fig.. Part of voltage detector circuit <> [ Hysteresis oltage HYS ] HYS D D D D D D EF <> The esistors D, D and D depend on a detection voltage rank. The values of resistors show the next page. The EF assumes. because it is equal to SADJ prescribed by electrical characteristics. According to formula <>, it can express formula as follows when calculate value of from expected the detection voltage and. D D D D DET D D <> er

16 NJW-T Application Manual NJWGM-A The initial detection voltage of NJWGM-A is set to.. The value of resistors D, D and D in the internal voltage detection circuit of IC are as Table.. It is expressed as follows when applying these parameters to formula <>, <> and <>. Assuming EF =.[]. The unit of resistors are Ω Table.. The internal resistor values of the IC [NJWGM-A] [ Detection oltage DET ] D kω ( ) D kω DET [] <> D kω ( ) [ Hysteresis oltage HYS ].9 HYS ( [] <> ) [ Calculation of resistor ]. DET [Ω] <> NJWGM-A The initial detection voltage of NJWGM-A is set to.. The value of resistors D, D and D in internal voltage detector circuit of IC are as Table.. It is expressed as follows when applying these parameters to formula <>, <> and <>. Assuming EF =.[]. The unit of resistors are Ω [ Detection oltage DET ] ( ) DET [] <> ( ) Table.. The internal resistor values of the IC [NJWGM-A] D kω D kω kω D [ Hysteresis oltage HYS ].9 HYS ( [] <9> ) [ Calculation of resistor ]. DET [Ω] <> - - er.--

17 Application Manual NJW-T Attention in the use The handling for the noise There is some possibility of output a reset signal ( O ="L") due to an external noise from the SADJ pin and SADJ becomes less than EF momentarily. O + When a reset signal outputs by an external noise, please insert the capacitor C S for filters between the SADJ pin and the ground. (refer. Fig..) When insert capacitor C S, t P becomes longer than a calculated result by (refer. Fig..) C S SADJ SADJ D D D M EF The output delay time t P when inserting the capacitor C S is as follows. Fig..Handling for the noise It assumes the delay time t DP by the C S, SADJ D D t DP ln <> D D D D D C S OUT <> Therefore, it can calculate in the following formula when assuming the output delay time t P without C S. t P tdp tp <> tp C I W CWD TCWD Please refer to Table. and Table. for the value of resistors t P (with C S) D and D, because it depends on a detection voltage Fig.. Each pin wave form when insert capacitor Cs rank. The SADJ assumes. because it is equal to EF. Formula of t DP is shown on the next page. When use external resistors and for adjusting detection voltage, D and D should replace as follows. D D D, D D D OUT SADJ O OUT t DP t PO (without C S) (delay by C S) er

18 NJW-T Application Manual Formula of t DP in case of NJWGM-A The t DP by the capacitor C S can be calculated with formula <> according to formulas <> and <>.. t DP CS ln * SADJ =.[] OUT =.[]. 9. [s] <> *Capacitor s C S unit is F C S Fofmula of t DP in case of NJWGM-A The t DP by the capacitor C S can be calculated with formula <> according to formulas <> and <>.. t DP CS ln * SADJ =.[] OUT =.[].. [s] <> *Capacitor s C S unit is F C S - - er.--

19 NJW-T TYIPICAL CHAACTEISTICS. Output oltage vs Input oltage Output oltage vs Output Current Output oltage : O () Io=mA Io=mA Io=mA Io=mA C C IN =.µf(ceramic) Co=.µF(Ceramic) Output oltage : o IN = C IN =.µf(ceramic) Co=.µF(Ceramic) Ta=- Ta= Ta=... Input oltage : IN () Output Current : Io (ma) Ground Pin Current vs Output Current Operating Current vs Input oltage (WDT Active) GroundPin Current : I IN = = OUT Operating Current:I SS C Output is open = O =High Output Current: Io (ma) Input oltage : IN () Operating Current vs Input oltage (WDT Inactive) Operating Current vs Input oltage(o detected) Operating Current:I SS C Output is open = OUT O =High Operating Current :I SS C Output is open O =Low Input oltage : IN () Input oltage : IN () er

20 NJW-T Load egulation vs Output Current Peak Output Current vs Input oltage Load egulation : Do/DIo (m) C IN = = OUT Co=.µF(Ceramic) - Peak Output Current : I OPEAK C C IN =.µf(ceramic) Co=.µF(Ceramic) o=. Output Current : Io (ma) Input oltage : IN () Dropout oltage : Δ IO () Dropout oltage S Output C IN =.µf(ceramic) Co=.µF(Ceramic) Output Current : Io (ma) ipple ejection atio: (db) C IN = ein=mrms Co=.µF(Ceramic) ipple ejection vs Frequency µa ma ma ma ma.. Freqency:f (khz) ipple ejection atio: (db) 9 ipple ejection vs Output Co=.µF(Ceramic) IN = ein=mrms khz(=out) khz(=out)... Output Current:Io (ma) Equivalent Series esistance : ES(Ω). Equivalent Series esistance vs Output Current STABLE IN =.µf(ceramic) Co=.µF(Ceramic) IN =- =. OUT.. Output Current : Io (ma) - - er.--

21 NJW-T eset Output oltage vs Output oltage eset Output oltage vs SADJ Pin oltage eset Output oltage: O C C IN =.µf(ceramic) Co=.µF(Ceramic) eset Output oltage: O C C IN =.µf(ceramic) Co=.µF(Ceramic) Output oltage:o () SADJ Pin oltage: SADJ C C IN =.µf(ceramic) Co=.µF(Ceramic) SADJ Pin Current vs SADJ IN = C IN =.µf Co=.µF Output oltage vs Temperature SADJ Pin Current:I SADJ (μa) - SADJ Pin oltage: SADJ () Output oltage: O () Io=mA Io=mA Io=mA Io=mA Io=mA. - Peak Output Current vs Temperature Short Circuit Current vs Temperature Peak Output Current:I OPEAK IN =.µf Co=.µF O =. in= in= - Short Circuit Current:ISC IN =.µf Co=.µF O = in= in= - er

22 NJW-T Line egulation:do/d IN (%/) Line egulation vs IN =- C IN =.µf(ceramic) Co=.µF(Ceramic) Io=mA Load egulation:do/dio (%/ma) Load egulation vs Temperature Io=~mA Io=~mA IN =. Co=.µF(Ceramic) Dropout oltage: D IO () Io=mA Io=mA IN =.µf Co=.µF Dropout oltage vs Temperature - Output oltage: o() Output oltage vs IN =.µf Co=.µF Io=mA - Operating Current:Iss (μa) Operating Current vs Temperature o detected WDT Active WD IN = C IN =.µf Co=.µF Pull Up esistance : PU (kω) Pull Up esistance vs Temperature - - Temperature: ( C) - - er.--

23 NJW-T. Detection oltage vs Temperature. NJW_A Detection oltage vs Temperature Detection oltage: DET ()... Detection oltage: DET () Hysteresis oltage: HYS (m) 9 Hysteresis oltage vs Temperature - SADJ Pin oltage: ADJ ()...9 SADJ Pin oltage vs Temperature.9 -. Input High-Level vs Temperature Input Low-Level vs Temperature Input High-Level: TCKH () Input Low-Level: TCKL () er

24 NJW-T Cw Pin Charge Current vs Temperature Cw Pin Discharge Current vs Temperature Cw Pin Charge Current:I CWL (μa) Cw Pin Discharge Current:I CW (μa) Temperature: ( C) Temperature: ( C). High-side Threshold oltage vs Temperature. Low-side Threshold oltage vs Temperature High-side Threshold oltage: TCWH () Low-side Threshold oltage: TCWL () Temperature: ( C) Temperature: ( C) Output Delay Hold Time:t P (ms) Output Delay Hold Time vs Temperature. - WDT Monitor Time:t WD (ms).... WDT Monitor Time vs Temperature - Temperature: ( C) - - er.--

25 NJW-T WDT eset Time:t W (ms) WDT eset Time vs Temperature. - Temperature: ( C) Pin Threshold oltage: TWDIS / TWEN () Pin Threshold oltage vs Temperature TWDIS TWEN. - Temperature: ( C) eset Low Output oltage : OL () Low Level eset Output oltage vs Temperature - Temperature : (ºC) Load Transient esponse Input Transient esponse Output oltage:o (). Output C Io= - ma C IN =.µf(ceramic) Co=.µF(Ceramic) =o IN = Output oltage Output Current Output oltage Output Current:Io (ma) Output oltage:o C IN = - C IN =.µf(ceramic) Co=.µF(Ceramic =o Io=mA Input oltage Output oltage Input oltage:in ().. Time:t (ms). Time:t (ms) er

26 NJW-T [CAUTION] The specifications on this databook are only given for information, without any guarantee as regards either mistakes or omissions. The application circuits in this databook are described only to show representative usages of the product and not intended for the guarantee or permission of any right including the industrial rights. - - er.--