2.0% (T j = 40 C to 150 C) 120 mv typ. (5.0 V output product, I OUT = 100 ma) Output current: Possible to output 200 ma (V IN = V OUT(S) 1.

Transcription

1 AUTOMOTIE, 125 C OPERATION, 36 INPUT, 2 ma, BUILT-IN WATCHDOG TIMER CIRCUIT OLTAGE REGULATOR TH RESET FUNCTION ABLIC Inc., The, developed by using high-withstand voltage CMOS technology, is a low dropout positive voltage regulator with the watchdog timer and the reset function, which has high-withstand voltage. The monitoring time of watchdog timer can be adjusted by an external capacitor. Moreover, a voltage detection circuit which monitors the output voltage is also prepared. Caution This product can be used in vehicle equipment and in-vehicle equipment. Before using the product in the purpose, contact to ABLIC Inc. is indispensable. Features Regulator block Output voltage: 3. to 5.3, selectable in.1 step Input voltage: 4. to 36. Output voltage accuracy: 2.% (T j = 4 C to 15 C) Dropout voltage: 12 m typ. (5. output product, I OUT = 1 ma) Output current: Possible to output 2 ma ( IN = OUT(S) 1. ) *1 Input and output capacitors: A ceramic capacitor of 2.2 F or more can be used. Ripple rejection: 7 db typ. (f = 1 Hz) Built-in overcurrent protection circuit: Limits overcurrent of output transistor. Built-in thermal shutdown circuit: Detection temperature 17 C typ. Detector block Detection voltage: Detection voltage accuracy: Hysteresis width: Release delay time: Output form: Watchdog timer block Autonomous watchdog operation function: Watchdog activation current is adjustable: Product type is selectable: Watchdog trigger time is adjustable: Output form: Overall Current consumption: Operation temperature range: Lead-free (Sn 1%), halogen-free Withstand 45 load dump AEC-Q1 qualified *2 2.6 to 5., selectable in.1 step 1 m (T j = 4 C to 15 C).12 min. 18 ms typ. (C = 47 nf) Nch open-drain output (Built-in pull-up resistor) The watchdog timer operates due to detection of load current. 1.5 ma typ. ( pin is open) S-195 Series (Product with watchdog enable function) S-1951 Series (Product without watchdog enable function) 43 ms typ. (C = 47 nf) Nch open-drain output (Built-in pull-up resistor) 6 A typ. (I OUT = ma, When the watchdog timer is deactivated.) 75 A typ. (I OUT 5 ma, When the watchdog timer is activated.) Ta = 4 C to 125 C *1. Please make sure that the loss of the IC will not exceed the power dissipation when the output current is large. *2. Contact our sales office for details. Applications Constant-voltage power supply for automotive electric component, monitoring of microcotroller Package HSOP-8A 1

2 Block Diagrams 1. S-195 Series (Product with watchdog enable function) IN Thermal shutdown circuit Overcurrent protection circuit Reference voltage circuit OUT WEN WDT circuit SS Reference voltage circuit oltage detection circuit Figure 1 WO / RO 2. S-1951 Series (Product without watchdog enable function) IN Thermal shutdown circuit Overcurrent protection circuit Reference voltage circuit OUT WDT circuit SS Reference voltage circuit oltage detection circuit WO RO Figure 2 2

3 AEC-Q1 Qualified This IC supports AEC-Q1 for the operation temperature grade 1. Contact our sales office for details of AEC-Q1 reliability specification. Product Name Structure Users can select the product type, output voltage and detection voltage for the. Refer to "1. Product name" regarding the contents of product name, "3. Package" regarding the package drawings and "4. Product name list" for details of product names. 1. Product name S-195 x A x x A - E8T1 U 4 *1. Refer to the tape drawing. *2. Refer to "2. Product option list". 2. Product option list Environmental code U: Lead-free (Sn 1%), halogen-free Package abbreviation and IC packing specifications *1 E8T1: HSOP-8A, Tape Operation temperature A: Ta = 4C to 125C Detection voltage *2 F to Z, to 5 Output voltage *2 C to Z,, 1 Product type 1 A: WEN pin positive logic type Product type 2 : S-195 Series (Product with watchdog enable function) 1: S-1951 Series (Product without watchdog enable function) 2. 1 Output voltage 2. 2 Detection voltage Set Output oltage Symbol Set Output oltage Symbol Set Detection oltage Symbol Set Detection oltage 5.3 C 4.1 Q 5. F 3.7 U 5.2 D 4. R 4.9 G E 3.9 S 4.8 H 3.5 W 5. F 3.8 T 4.7 J 3.4 X 4.9 G 3.7 U 4.6 K 3.3 Y 4.8 H L 3.2 Z 4.7 J 3.5 W 4.4 M K 3.4 X 4.3 N L 3.3 Y 4.2 P M 3.2 Z 4.1 Q N R P S T Symbol Remark Set output voltage Set detection voltage.3 3

4 3. Package Table 1 Package Drawing Codes Package Name Dimension Tape Reel Land HSOP-8A FH8-A-P-SD FH8-A-C-SD FH8-A-R-SD FH8-A-L-SD 4. Product name list 4. 1 S-195 Series (Product with watchdog enable function) Table 2 Output oltage Detection oltage HSOP-8A % S-195A3A-E8T1U % S-195AY3A-E8T1U % 3..1 S-195AY1A-E8T1U % S-195AF3A-E8T1U % S-195AFPA-E8T1U % S-195AFLA-E8T1U % S-195AFKA-E8T1U % S-195AFJA-E8T1U % 5..1 S-195ACFA-E8T1U4 Remark Please contact our sales office for products with specifications other than the above S-1951 Series (Product without watchdog enable function) Table 3 Output oltage Detection oltage HSOP-8A % S-1951AY3A-E8T1U % S-1951AF2A-E8T1U % S-1951AFWA-E8T1U % S-1951AFPA-E8T1U % S-1951AFLA-E8T1U % S-1951AFKA-E8T1U % S-1951AFJA-E8T1U4 Remark Please contact our sales office for products with specifications other than the above. 4

5 Pin Configuration 1. HSOP-8A Top view Bottom view Table 4 S-195 Series (Product with Watchdog Enable Function) Pin No. Symbol Description 1 OUT oltage output pin (Regulator block) 2 Connection pin for watchdog activation threshold current adjustment resistor 3 SS GND pin 4 Connection pin for delay time adjustment capacitor 5 WO / RO *2 WO Watchdog output pin RO Reset output pin 6 WEN Watchdog enable pin 7 Watchdog input pin 8 IN oltage input pin (Regulator block) 5 Figure 3 *1 4 Table 5 S-1951 Series (Product without Watchdog Enable Function) Pin No. Symbol Description 1 OUT oltage output pin (Regulator block) 2 Connection pin for watchdog activation threshold current adjustment resistor 3 SS GND pin 4 Connection pin for delay time adjustment capacitor 5 RO Reset output pin 6 WO Watchdog output pin 7 Watchdog input pin 8 IN oltage input pin (Regulator block) *1. Connect the heat sink of backside at shadowed area to the board, and set electric potential GND. However, do not use it as the function of electrode. *2. The WO / RO pin combines the watchdog output pin and the reset output pin. 5

6 Pin Functions 1. pin This is a pin to connect an external resistor in order to adjust watchdog activation threshold current (I O,WDact ). Table 6 shows the connection of the pin depending on the usage of the watchdog timer. In the S-195 Series, the watchdog timer is deactivated regardless of the connection of the pin if the watchdog timer is set to Disable by the WEN pin. Usage of Watchdog Timer Watchdog timer is not in use Watchdog timer is always activated Watchdog timer turns on and off autonomously depending on the load current (Autonomous watchdog operation function *1 ) Table 6 Connection of Pin Connect to the SS pin Connect to the OUT pin via a resistor of 27 k Open, or connect to the SS pin via an external resistor *2 *1. Refer to "3. Watchdog timer block" in " Operation" for details. *2. Refer to " Selection of Watchdog Activation Threshold Current Adjustment Resistor (R,ext )" for details. 2. pin This is a pin to connect an external capacitor in order to adjust the release delay time (t rd ) of the detector and monitoring time of the watchdog timer. Refer to " Selection of Delay Time Adjustment Capacitor (C )" for the selection of an external capacitor. 3. WO / RO pin (S-195 Series only) This is an output pin for the detector and the watchdog timer. The output level is AND logic of the detector and the watchdog timer. (For example, the WO / RO pin is "L" when the WO pin is "L" and the RO pin is "H".) 4. WO pin (S-1951 Series only) This is an output pin for the watchdog timer. It outputs "H" when the watchdog timer stops or if the pin voltage ( ) exceeds the upper timing threshold voltage ( DU ) when the watchdog timer operates. It outputs "L" if falls below the lower watchdog timing threshold voltage ( DWL ) when the watchdog timer operates. 5. RO pin (S-1951 Series only) This is an output pin for the detector. It outputs "H" when exceeds DU, and outputs "L" when falls below the lower reset timing threshold voltage ( DRL ). 6. WEN pin (S-195 Series only) This is a pin to switch Enable / Disable of the watchdog timer. The watchdog timer becomes Enable if the input is "H", and becomes Disable when the input is "L". Since the WEN pin has a built-in pull-down current source, the input becomes "L" when using it in open. 7. pin This is an input pin to recieve a trigger signal from the monitored object by the watchdog timer. By being input a rising edge at an appropriate timing, the pin confirms the normal operation of the monitored object. Refer to "3. Watchdog timer block" in " Operation". 6

7 Absolute Maximum Ratings Table 7 (T j = 4C to 15C unless otherwise specified) Item Symbol Absolute Maximum Rating Unit IN pin voltage IN SS.3 to SS 45. OUT pin voltage OUT SS.3 to IN.3 SS 7. pin voltage SS.3 to OUT.3 SS 7. RO pin voltage RO SS.3 to OUT.3 SS 7. pin voltage SS.3 to IN.3 SS 7. WEN pin voltage WEN SS.3 to SS 7. pin voltage SS.3 to SS 7. WO pin voltage WO SS.3 to OUT.3 SS 7. WO / RO pin voltage WO / RO SS.3 to OUT.3 SS 7. Output current I OUT 26 ma Junction temperature T j 4 to 15 C Operation ambient temperature T opr 4 to 125 C Storage temperature T stg 4 to 15 C Caution The absolute maximum ratings are rated values exceeding which the product could suffer physical damage. These values must therefore not be exceeded under any conditions. Thermal Resistance alue Table 8 Item Symbol Condition Min. Typ. Max. Unit Board A 14 C/W Board B 74 C/W Junction-to-ambient thermal resistance *1 JA HSOP-8A Board C 39 C/W Board D 37 C/W Board E 31 C/W *1. Test environment: compliance with JEDEC STANDARD JESD51-2A Remark Refer to " Power Dissipation" and "Test Board" for details. 7

8 Recommended Operation Conditions IN pin voltage Table 9 Item Symbol Condition Min. Typ. Max. Unit IN When using autonomous watchdog operation function * OUT(S) OUT pin voltage OUT Detector block 1. Watchdog timer block DET Watchdog input voltage "H" *2 H 2 Watchdog input voltage "L" *2 L.8 Watchdog input "H" time *2 t high H 5. s Watchdog input "L" time *2 t Iow L 5. s Slew rate *2 d dt = L ( H L ).1 to L ( H L ).9 1 /s Watchdog input frequency f Duty ratio 5%.2 MHz WEN pin input voltage "H" WENH 2. OUT(S) WEN pin input voltage "L" WENL.8 *1. Refer to "3. Watchdog timer block" in " Operation" for the autonomous watchdog operation function. *2. When inputting a rising edge that satisfies the condition of Figure 4 to the pin, the watchdog timer detects a trigger. The signal input from the monitored object by the watchdog timer should satisfy the condition of Figure 4. t low t high H L d dt t Figure 4 8

9 Electrical Characteristics 1. Regulator block Table 1 ( IN = 13.5, T j = 4 C to 15 C unless otherwise specified) Item Symbol Condition Min. Typ. Max. Unit Output voltage *1 OUT(E) IN = 13.5, I OUT = 3 ma OUT(S) 2.% OUT(S) OUT(S) 2.% Test Circuit 1 Output current *2 I OUT IN OUT(S) 1. 2 *4 ma 2 Dropout voltage *3 Line regulation Load regulation drop I OUT = 3 ma, Ta = 25 C, OUT(S) = 3. to 5.3 I OUT = 1 ma, Ta = 25 C, OUT(S) = 3. to 5.3 OUT1 IN OUT OUT(S) 1. IN 36., I OUT = 3 ma, Ta = 25 C OUT2 IN = 13.5, 1 A I OUT 1 ma, Ta = 25 C 4 5 m m %/ m 1 Input voltage IN Ripple rejection RR IN = 13.5, I OUT = 3 ma, f = 1 Hz, rip = 1. p-p 7 db 3 IN = 13.5, OUT =, Short-circuit current I short 6 ma 2 Ta = 25 C Thermal shutdown detection temperature T SD Junction temperature 17 C Thermal shutdown T SR Junction temperature 135 C release temperature *1. OUT(S) : Set output voltage OUT(E) : Actual output voltage Output voltage when fixing I OUT (= 3 ma) and inputting 13.5 *2. The output current at which the output voltage becomes 95% of OUT(E) after gradually increasing the output current. *3. drop = IN1 ( OUT3.98) OUT3 is the output voltage when IN = OUT(S) 1.. IN1 is the input voltage at which the output voltage becomes 98% of OUT3 after gradually decreasing the input voltage. *4. The output current can be at least this value. Due to limitation of the power dissipation, this value may not be satisfied. Attention should be paid to the power dissipation when the output current is large. This specification is guaranteed by design. 9

10 2. Detector block Table 11 ( IN = 13.5, T j = 4 C to 15 C unless otherwise specified) Item Symbol Condition Min. Typ. Max. Unit Detection voltage *1 DET DET(S).1 DET(S) DET(S).1 Test Circuit 4 Hysteresis width HYS m 4 Reset output voltage "H" ROH OUT(S).9 4 Reset output voltage "L" ROL OUT 1., R extr 3 k, Connect to OUT pin Reset pull-up resistance R RO OUT pin internal resistance k Reset output current I RO RO =.4, OUT = DET(S).1 3. ma 5 Lower reset timing threshold voltage Upper timing threshold voltage DRL DU Charge current I D,cha = A 6 Release delay time *2 t rd C = 47 nf ms 4 Reset reaction time *3 t rr C = 47 nf 5 s 4 *1. DET : Actual detection voltage, DET(S) : Set detection voltage *2. The time period from when OUT changes to DET(S).15 OUT(S) to when RO reaches OUT / 2. *3. The time period from when OUT changes to OUT(S) DET(S).15 to when RO reaches OUT / 2. 1

11 3. Watchdog timer block 3. 1 S-195 Series (Product with watchdog enable function) Table 12 ( IN = 13.5, T j = 4 C to 15 C unless otherwise specified) Item Symbol Condition Min. Typ. Max. Unit Test Circuit Watchdog activation threshold current I O,WDact pin is open ma 7 Watchdog deactivation threshold current I O,WDdeact pin is open 1.3 ma 7 Watchdog activation hysteresis current I O,WDhys pin is open.1.2 ma 7 Watchdog activation threshold voltage,th pin current ratio I OUT I =, I OUT = 1 ma 75 8 pin internal resistance R,int k Charge curernt I D,cha = A 9 Discharge current I D,dcha = A 9 Upper timing threshold voltage DU Lower watchdog timing threshold voltage DWL Watchdog output pulse period t WD,p C = 47 nf ms 7 Watchdog output "L" time t WD,l OUT DET, C = 47 nf Watchdog timer is activated ms 7 Watchdog trigger time t,tr C = 47 nf ms 7 WEN pin input voltage "H" SH 2 1 WEN pin input voltage "L" SL.8 1 WEN pin input current "H" I SH WEN = OUT(S) 1 A 1 WEN pin input current "L" I SL WEN =.1 A 1 DU DWL t,tr t WD,l t WO / RO t WD,p t Figure 5 11

12 3. 2 S-1951 Series (Product without watchdog enable function) Watchdog activation threshold current Watchdog deactivation threshold current Watchdog activation hysteresis current Watchdog activation threshold voltage pin current ratio Table 13 ( IN = 13.5, T j = 4 C to 15 C unless otherwise specified) Item Symbol Condition Min. Typ. Max. Unit I O,WDact pin is open ma 7 I O,WDdeact pin is open 1.3 ma 7 I O,WDhys pin is open.1.2 ma 7,th Test Circuit I OUT I =, I OUT = 1 ma 75 8 pin internal resistance R,int k Watchdog output voltage "H" WOH OUT(S).9 13 Watchdog output voltage "L" WOL R extw 3 k, Connect to OUT pin Watchdog pull-up resistance R WO OUT pin internal resistance k Watchdog output current I WO WO =.4, OUT = DET(S).1 3. ma 14 Charge current I D,cha = A 9 Discharge current I D,dcha = A 9 Upper timing threshold voltage DU Lower watchdog timing threshold voltage DWL Watchdog output pulse period t WD,p C = 47 nf ms 7 Watchdog output "L" time t WD,l OUT DET, C = 47 nf Watchdog timer is activated ms 7 Watchdog trigger time t,tr C = 47 nf ms 7 DU DWL t t,tr t WD,l WO t WD,p t Figure 6 12

13 4. Overall Table 14 Current consumption during operation ( IN = 13.5, T j = 4 C to 15 C unless otherwise specified) Item Symbol Condition Min. Typ. Max. Unit Current consumption when watchdog timer is deactivated I SS1 I SS2 I OUT 5 ma, pin is open, Watchdog timer is activated, WO pin = "H" I OUT = 5 ma, pin is open, Watchdog timer is activated, WO pin = "H" I OUT = 2 ma, pin is open, Watchdog timer is activated, WO pin = "H" I OUT = ma, Watchdog timer is deactivated Test Circuit A A A A 12 13

14 Test Circuits 1. S-195 Series (Product with watchdog enable function) IN OUT A IN OUT A WEN WO / RO WEN WO / RO SS SS Figure 7 Test Circuit 1 Figure 8 Test Circuit 2 IN WEN OUT WO / RO IN WEN OUT WO / RO R extr SS R L SS Figure 9 Test Circuit 3 Figure 1 Test Circuit 4 IN OUT IN OUT WEN WO / RO WEN WO / RO SS A RO A SS R L Figure 11 Test Circuit 5 Figure 12 Test Circuit 6 IN OUT A IN OUT A WEN WO / RO WEN WO / RO SS SS A Figure 13 Test Circuit 7 Figure 14 Test Circuit 8 14

15 IN OUT IN OUT WEN WO / RO WEN WO / RO *1 A SS R L A SS R L *1. Charge current: the direction of the current which flows out of the IC is positive Discharge current: the direction of the current which flows into the IC is positive Figure 15 Test Circuit 9 Figure 16 Test Circuit 1 IN WEN SS A OUT WO / RO A WO / RO pin outputs "H". A IN OUT WEN WO / RO SS Figure 17 Test Circuit 11 Figure 18 Test Circuit 12 15

16 2. S-1951 Series (Product without watchdog enable function) IN OUT A IN OUT A RO RO WO SS WO SS Figure 19 Test Circuit 1 Figure 2 Test Circuit 2 IN OUT RO IN OUT RO R extr WO SS R L WO SS Figure 21 Test Circuit 3 Figure 22 Test Circuit 4 IN OUT IN OUT RO RO WO SS A RO A WO SS R L Figure 23 Test Circuit 5 Figure 24 Test Circuit 6 IN OUT A IN OUT A RO RO WO SS WO SS A Figure 25 Test Circuit 7 Figure 26 Test Circuit 8 16

17 IN OUT IN OUT A RO RO *1 A WO SS R L SS A WO WO pin outputs "H". *1. Charge current: the direction of the current which flows out of the IC is positive Discharge current: the direction of the current which flows into the IC is positive Figure 27 Test Circuit 9 Figure 28 Test Circuit 11 A IN OUT IN OUT RO WO SS RO WO SS R extw Figure 29 Test Circuit 12 Figure 3 Test Circuit 13 IN OUT RO WO SS A WO Figure 31 Test Circuit 14 17

18 Standard Circuits 1. S-195 Series (Product with watchdog enable function) Input IN WEN WO / RO *2 *1 C C L IN C *3 SS OUT R extr *5 R,ext *4 Output Single GND GND Figure S-1951 Series (Product without watchdog enable function) Input IN OUT RO *5 *2 *1 C C R extw L IN WO C *3 SS R extr *5 R,ext *4 Output Single GND GND Figure 33 *1. C IN is a capacitor for stabilizing the input. *2. C L is a capacitor for stabilizing the output. A ceramic capacitor of 2.2 F or more can be used. *3. C is the delay time adjustment capacitor. *4. R,ext is the watchdog activation threshold current adjustment resistor. *5. R extr and R extw are the external pull-up resistors for the reset output pin and the watchdog output pin, respectively. Connection of the external pull-up resistor is not absolutely essential since the has a built-in pull-up resistor. Caution The above connection diagram and constants will not guarantee successful operation. Perform thorough evaluation using an actual application to set the constants. 18

19 Condition of Application Input capacitor (C IN ) Output capacitor (C L ) ESR of output capacitor Delay time adjustment capacitor (C ) Watchdog activation threshold current adjustment resistor (R,ext ) External pull-up resistors (R extr, R extw ) : 2.2 F or more : 2.2 F or more : 1 or less : 1. nf or more : 1 k or more : 3 k or more Caution Generally a series regulator may cause oscillation, depending on the selection of external parts. Confirm that no oscillation occurs in the application for which the above capacitors are used. Selection of Input and Output Capacitors (C IN, C L ) The requires C L between the OUT pin and the SS pin for phase compensation. Operation is stabilized by a ceramic capacitor with an output capacitance of 2.2 F or more over the entire temperature range. When using an OS capacitor, a tantalum capacitor, or an aluminum electrolytic capacitor, the capacitance must be 2.2 F or more, and the ESR must be 1 or less. The values of output overshoot and undershoot, which are transient response characteristics, vary depending on the value of the output capacitor. The required value of capacitance for the input capacitor differs depending on the application. Caution Define the capacitance of C IN and C L by sufficient evaluation including the temperature characteristics under the actual usage conditions. 19

20 Selection of Delay Time Adjustment Capacitor (C ) In the, the delay time adjustment capacitor (C ) is necessary between the pin and the SS pin to adjust the release delay time (t rd ) of the detector and the monitoring time of the watchdog timer. The set release delay time (t rd(s) ), the set watchdog trigger time (t,tr(s) ), the set watchdog output "L" time (t WD,l(S) ) and the set watchdog output pulse period (t WD,p(S) ) are calculated by using following equations, respectively. The release delay time (t rd ), the watchdog trigger time (t,tr ), the watchdog output "L" time (t WD,l ) and the watchdog output pulse period (t WD,p ) at the time of the condition of C = 47 nf are shown in " Electrical Characteristics". t rd(s) [ms] = t rd [ms] C [nf] 47 [nf] t,tr(s) [ms] = t,tr [ms] C [nf] 47 [nf] t WD,l(S) [ms] = t WD,l [ms] C [nf] 47 [nf] t WD,p(S) [ms] = t,tr(s) [ms] t WD,l(S) [ms] Caution 1. The above equations will not guarantee successful operation. Perform thorough evaluation including the temperature characteristics using an actual application to set the constants. 2. Mounted board layout should be made in such a way that no current flows into or flows from the pin since the impedance of the pin is high, otherwise correct delay time and monitoring time may not be provided. 3. Select C whose leakage current can be ignored against the built-in constant current. The leakage current may cause deviation in delay time and monitoring time. When the leakage current is larger than the built-in constant current, no release takes place. 2

21 Selection of Watchdog Activation Threshold Current Adjustment Resistor (R,ext ) In the, the watchdog activation threshold current adjustment resistor (R,ext ) can be connected between the pin and the SS pin to adjust the watchdog timer activation threshold current. The set watchdog activation threshold current (I O,WDact(S) ), the set watchdog deactivation threshold current (I O,WDdeact(S) ) and the set watchdog activation hysteresis current (I O,WDhys(s) ) are calculated by using following equations, respectively. The watchdog activation threshold current (I O,WDact ), the watchdog deactivation threshold current (I O,WDdeact ) and the watchdog activation hysteresis current (I O,WDhys ) when the pin is open are shown in " Electrical Characteristics". I O,WDact(S) [ma] = I O,WDact [ma] 1 R,int [k] R,ext [k] I O,WDdeact(S) [ma] = I O,WDdeact [ma] 1 R,int [k] R,ext [k] I O,WDhys(S) [ma] = I O,WDact(S) [ma] I O,WDdeact(S) [ma] Caution 1. The above equations will not guarantee successful operation. Perform thorough evaluation including the temperature characteristics using an actual application to set the constants. 2. Mounted board layout should be made in such a way that no current flows into or flows from the pin since the impedance of the pin is high, otherwise correct I O,WDact and I O,WDdeact may not be provided. 21

22 Explanation of Terms 1. Regulator block 1. 1 Low dropout voltage regulator This voltage regulator has the low dropout voltage due to its built-in low on-resistance transistor Output voltage ( OUT ) The accuracy of the output voltage is ensured at 2.% under specified conditions of fixed input voltage *1, fixed output current, and fixed temperature. *1. Differs depending on the product. Caution If the above conditions change, the output voltage value may vary and exceed the accuracy range of the output voltage. Refer to "1. Regulator block" in " Electrical Characteristics" and "1. Regulator block" in " Characteristics (Typical Data)" for details Line regulation OUT1 IN OUT Indicates the dependency of the output voltage against the input voltage. That is, the value shows how much the output voltage changes due to a change in the input voltage after fixing output current constant Load regulation ( OUT2 ) Indicates the dependency of the output voltage against the output current. That is, the value shows how much the output voltage changes due to a change in the output current after fixing input voltage constant Dropout voltage ( drop ) Indicates the difference between input voltage ( IN1 ) and the output voltage when; decreasing input voltage ( IN ) gradually until the output voltage has dropped out to the value of 98% of output voltage ( OUT3 ), which is at IN = OUT(S) 1.. drop = IN1 ( OUT3.98) 22

23 2. Detector block 2. 1 Detection voltage ( DET ) The detection voltage is a voltage at which the output of the RO pin turns to "L". The detection voltage varies slightly among products of the same specification. The variation of detection voltage between the specified minimum ( DET min.) and the maximum ( DET max.) is called the detection voltage range (Refer to Figure 34) Release voltage ( DET ) The release voltage is a voltage at which the output of the RO pin turns to "H". The release voltage varies slightly among products of the same specification. The variation of release voltage between the specified minimum ( DET min.) and the maximum ( DET max.) is called the release voltage range (Refer to Figure 35). This value is calculated from the actual detection voltage ( DET ) of a product and the hysteresis width ( HYS ), and is DET = DET HYS. OUT DET max. DET min. Detection voltage Detection voltage range Release voltage DET max. DET min. OUT Release voltage range RO RO Release delay time Figure 34 Detection oltage Figure 35 Release oltage 2. 3 Hysteresis width ( HYS ) The hysteresis width is the voltage difference between the detection voltage and the release voltage. Setting the hysteresis width between the detection voltage and the release voltage prevents malfunction caused by noise on the OUT pin voltage ( OUT ) Release delay time (t rd ) The release delay time is the time period from when OUT exceeds the release voltage ( DET ) to when the RO pin output inverts (Refer to Figure 36), and this value changes according to the delay time adjustment capacitor (C ). t rd is determined by a built-in constant current which charges C, the charge detection threshold of the pin, and the capacitance of C. It is calculated by using the following equation. t rd = C DU I D, cha OUT DET RO DU t t rd Figure 36 Release Delay Time 23

24 2. 5 Reset reaction time (t rr ) The reset reaction time is the time period from when OUT falls below the detection voltage ( DET ) to when the RO pin output inverts (Refer to Figure 37). Since t rr depends on the reaction time of internal circuit and the discharge time of C, it becomes longer if the capacitance of C becomes larger. Refer to "2. 9 Reset reaction time vs. Capacitance for delay time adjustment capacitor" in " Characteristics (Typical Data)". DET OUT RO DRL t rr Figure 37 Reset Reaction Time Caution alues shown in "2. Detector block" in " Electrical Characteristics" are values when watchdog timer stops. t rr may shorten since the discharge operation of C may be performed while the watchdog timer operates. 24

25 3. Watchdog timer block 3. 1 Watchdog trigger time (t,tr ) The watchdog trigger time is the time period from when the watchdog timer initiates the detection of a trigger signal to when a time-out is detected and the WO pin output changes to "L" (Refer to Figure 38). This value changes according to C. t,tr is determined by a built-in constant current which charges C, the charge detection threshold of the pin, and the capacitance of C. It is calculated by using the following equation. t,tr = C ( DU DWL ) I D, dcha DU DWL t,tr t WD,l t WO t WD,p t Figure 38 Watchdog Trigger Time 3. 2 Watchdog output "L" time (t WD,I ) The watchdog output "L" time is the time period when the WO pin continues "L" after the watchdog timer detects a time-out. This value changes according to C, and is calculated by using the following equation. t WD,I = C ( DU DWL ) I D, dcha 3. 3 Watchdog output pulse period (t WD,p ) The watchdog output pulse period is the period of the continuous rectangular wave that appears in the WO pin when the watchdog timer repeats the detection of a time-out. It is calculated by using the following equation. t WD,p = t,tr t WD,I Caution alues shown in "3. Watchdog timer block" in " Electrical Characteristics" and " Characteristics (Typical Data)" are values when OUT decreases to DET or lower and the discharge operation of C due to the detector operation is not performed. The discharge operation of C could be performed when OUT decreases to DET or lower, at that time, t,tr, t WD,I and t WD,p may be changed. 25

26 Operation 1. Regulator block 1. 1 Basic operation Figure 39 shows the block diagram of the regulator in the. The error amplifier compares the reference voltage ( ref ) with feedback voltage ( fb ), which is the output voltage resistance-divided by feedback resistors (R s and R f ). It supplies the gate voltage necessary to maintain the constant output voltage which is not influenced by the input voltage and temperature change, to the output transistor. IN Current supply Error amplifier *1 OUT ref R f fb Reference voltage circuit R s SS *1. Parasitic diode Figure Output transistor In the, a low on-resistance P-channel MOS FET is used as the output transistor. Be sure that OUT does not exceed IN.3 to prevent the voltage regulator from being damaged due to reverse current flowing from the OUT pin through a parasitic diode to the IN pin, when the potential of OUT became higher than IN. 26

27 1. 3 Overcurrent protection circuit The includes an overcurrent protection circuit which having the characteristics shown in "1. 1 Output voltage vs. Output current (When load current increases) (Ta = 25C)" of "1. Regulator block" in " Characteristics (Typical Data)", in order to limit an excessive output current and overcurrent of the output transistor due to short-circuiting between the OUT pin and the SS pin. The current when the output pin is short-circuited (I short ) is internally set at approx. 6 ma typ., and the load current when short-circuiting is limited based on this value. The output voltage restarts regulating if the output transistor is released from overcurrent status. Caution This overcurrent protection circuit does not work as for thermal protection. If this IC long keeps short circuiting, pay attention to the conditions of input voltage and load current so that, under the usage conditions including short circuit, the loss of the IC will not exceed power dissipation Thermal shutdown circuit The has a thermal shutdown circuit to limit self-heating. When the junction temperature rises to 17C typ., the thermal shutdown circuit operates to stop regulating. After that, when the junction temperature drops to 135C typ., the thermal shutdown circuit is released to restart regulating. Due to self-heating of the, if the thermal shutdown circuit starts operating, it stops regulating so that the output voltage drops. For this reason, self-heating is limited and the IC's temperature drops. When the temperature drops, the thermal shutdown circuit is released to restart regulating, thus self-heating is generated again due to rising of the output voltage. Repeating this procedure makes the waveform of the OUT pin output into a pulse-like form. This phenomenon continues unless decreasing either or both of the input voltage and the output current in order to reduce the internal power consumption, or decreasing the ambient temperature. Note that the product may suffer physical damage such as deterioration if the above phenomenon occurs continuously. Table 15 Thermal Shutdown Circuit OUT Pin oltage Detect: 17C typ. *1 SS level Release: 135C typ. *1 Set value *1. Junction temperature 27

28 2. Detector block 2. 1 Basic operation (1) When the output voltage ( OUT ) of the regulator is release voltage ( DET ) of the detector or higher, the Nch transistor (N1 and N2) are turned off and "H" is output to the RO pin. Since the Pch transistor (P1) is turned on, R B OUT the input voltage to the comparator (C1) is. R A R B (2) Even if OUT decreases to DET or lower, "H" is output to the RO pin when OUT is the detection voltage ( DET ) or higher. When OUT decreases to DET (point A in Figure 41) or lower, N1 which is controlled by C1 is turned on, and C is discharged. If the pin voltage ( ) decreases to the lower reset timing threshold voltage ( DRL ) or lower, N2 of output stage of C2 is turned on, and then "L" is output to the RO pin. At this time, P1 is R B OUT turned off, and the input voltage to C1 is. R A R B R C (3) If OUT further decreases to the IC's minimum operation voltage or lower, the RO pin output is "H". (4) When OUT increases to the IC's minimum operation voltage or higher, "L" is output to the RO pin. Moreover, even if OUT exceeds DET, the output is "L" when OUT is lower than DET. (5) When OUT increases to DET (point B in Figure 41) or higher, N1 is turned off and C is charged. N2 is turned off if increases to the upper timing threshold voltage ( DU ) or higher, and "H" is output to the RO pin. OUT R C P1 Reference voltage circuit R A R B C1 N1 C2 N2 RO SS C Figure 4 Operation of Detector Block (1) (2) (3) (4) (5) Hysteresis width ( HYS ) A B OUT Release voltage ( DET ) Detection voltage ( DET ) Minimum operation voltage SS OUT RO pin output SS Figure 41 Timing Chart of Detector Block t rd 28

29 2. 2 Delay circuit When the output voltage ( OUT ) of the regulator rises under the status that "L" is output to the RO pin, the reset release signal is output to the RO pin later than when OUT becomes DET. The release delay time (t rd ) changes according to C. Refer to " Selection of Delay Time Adjustment Capacitor (C )" for details. Moreover, when OUT decreases to DET or lower, the delay time of the same time length as the reset reaction time (t rr ) occurs in the output to the RO pin. Refer to "2. Detector block" in " Explanation of Terms" for details. If the time period from when OUT decreases to DET or lower to when OUT increases to DET or higher is significantly shorter compared to the length of t rr, may not decrease to DRL or lower. In that case, "H" output remains in the RO pin. Caution Since t rd depends on the charge time of C, t rd may be shorter than the set value if the charge operation is initiated under the condition that a residual electric charge is left in C Output circuit The output form of the RO pin is Nch open-drain. The RO pin can output a signal without an external pull-up resistor since it has a built-in resistor to pull up to the OUT pin internally. Do not connect to the pin other than OUT pin when connecting an external pull-up resistor to the RO pin. In the S-195 Series, the reset output pin is prepared as the WO / RO pin. Caution Define the external pull-up resistance by sufficient evaluation including the temperature characteristics under the actual usage conditions. 29

30 3. Watchdog timer block 3. 1 Basic operation The watchdog timer operates as follows during monitoring operation. (1) When the WO pin outputs "H", C is discharged by an internal constant current source, and the pin voltage ( ) decreases. The watchdog timer detects a trigger and the C is charged by an internal constant current source if a rising edge is input to the pin from a monitored object by the watchdog timer, and then rises. The discharge operation is restarted if reaches the upper timing threshold voltage ( DU ), and decreases again. By inputting a rising edge to the pin again during the discharge operation, the similar operation is repeated. At this time, the WO pin outputs "H" continuously. (2) The watchdog timer does not detect a trigger if the rising edge is not input to the pin from a monitored object by the watchdog timer when the C is discharged and decreases. The WO pin outputs "L" if the discharge operation continues not detecting a trigger when reaches the lower watchdog timing threshold voltage ( DWL ). This operation is called the time-out detection. (3) After the time-out detection, C is charged while the WO pin outputs "L", and increases. The WO pin outputs "H" and restarts the discharge operation if reaches DU. (4) By the operation of (3), a monitored object by the watchdog timer is reset. If a rising edge is input to the pin again, the operation similar to (1) is continued since the watchdog timer detects a trigger. (5) After the operation of (3), if the status in which a rising edge is not input to the pin continues, the watchdog timer repeats the operation of (5) (3) (5). IN Output current detection circuit WDT enable circuit OUT WEN Reference voltage circuit WDT input circuit Chargedischarge control circuit WO SS C Figure 42 3

31 The time period from when the watchdog timer detects a trigger to when it detects a time-out (t WD,TO ) is indicated as the following expression. Figure 43 shows a timing chart of the watchdog timer. t,tr t WD,TO t WD,p (1) (2), (5) (3) (4) DU DWL t WD,TO t WO t,tr t t Figure 43 Regardless of the status of the watchdog timer, the capacitance of C could be discharged by the detector operation. Even if watchdog timer detects a trigger of signal input to the pin, the WO pin outputs "L" when reaches DWL. After that, the watchdog timer restarts the monitoring operation if the WO pin outputs "H" when reaches DU Output current detection circuit Since the has a built-in output current detection circuit, the watchdog timer operates autonomously. When using the autonomous watchdog operation function, the current flows in the load is detected by the output current of the regulator, the watchdog timer initiates the activation when the output current is the watchdog activation threshold current (I O,WDact ) or more, the watchdog timer is deactivated when the output current is the watchdog deactivation threshold current (I O,WDdeact ) or less When not using the autonomous watchdog operation function, select a connection of the pin from Table 6 in " Pin Functions ". 31

32 Depending on the output current (I OUT ) of the regulator, the watchdog timer monitoring activation is as follows. (1) When I OUT of the regulator is the watchdog activation threshold current (I O,WDact ) or more, the pin voltage ( ) is higher than the reference voltage ( ref ), and the output of the comparator (C1) is "H". At this time, the watchdog timer initiates the monitoring activation. (2) When I OUT decreases to the watchdog deactivation threshold current (I O,WDdeact ) (point A in Figure 45) or less, decreases to ref or less and the output of C1 is "L". At this time, the watchdog timer deactivates the monitoring. Even if I OUT increases, the watchdog timer continues the monitoring deactivation when I OUT is within less than I O,WDact (3) If I OUT further increases to I O,WDact (point B in Figure 45) or more, increases to ref or higher and the output of C1 is "H". And then, the watchdog timer initiates the monitoring activation. IN OUT Reference voltage circuit R,ext WEN SS R,int Reference voltage circuit ref C1 WDT circuit Figure 44 Operation of Output Current Detection Circuit (1) (2) (3) I OUT Watchdog activation hysteresis current (I O,WDhys ) A B Watchdog activation threshold current (I O,WDact ) Watchdog deactivation threshold current (I O,WDdeact ) ma WDT monitoring activation WDT monitoring deactivation WDT monitoring activation Figure 45 Autonomous Watchdog Operation Function Caution Due to detecting I OUT of the regulator, current flows through the registors connected to the pin (R,ext and R,int ). Therefore, the pin voltage ( ) may fluctuate since the current flowing through R,ext and R,int also changes in the same way if the output current changes transiently. at that time should be evaluated with the actual device. Remark I O,WDact, I O,WDdeact and I O,WDhys can be adjusted by connecting R,ext to the pin. Refer to " Selection of Watchdog Activation Threshold Current Adjustment Resistor (R,ext )" for the detail. 32

33 3. 3 Watchdog enable circuit S-195 Series has a built-in watchdog Enable circuit that switches Enable or Disable of the watchdog timer due to input to the WEN pin. When inputting "L" to the WEN pin, the watchdog timer becomes Disable and stops the output current detection operation and monitoring activation. When inputting "H" to the WEN pin, the watchdog timer becomes Enable. The watchdog timer monitoring activation is performed depending on the connection of the pin. The internal equivalent circuit of the WEN pin is configured as shown in Figure 46, and is pulled down internally by the constant current source. For this reason, the WEN pin is set to "L" when using the WEN pin in the floating status, and the watchdog timer becomes Disable. However, in order that the watchdog timer become Disable certainly, connect the WEN pin to GND so that "L" is input to the WEN pin certainly, since the impedance of the WEN pin is high when using the WEN pin in the floating status. In order to fix the watchdog timer to Enable, connect the WEN pin to the OUT pin so that "H" is input to the WEN pin. Table 16 shows the relation between status of each pins and the watchdog timer. WEN Pin Input Logic Pin Connection *1 Output Current *2 Table 16 Output Current Detection Circuit Watchdog Timer Monitoring Activation WO Pin Input Logic "H" Open, or connect to SS pin via external resistor *3 "H" Operate Activate "H" or "L" "H" Open, or connect to SS pin via external resistor *3 "L" Operate Deactivate "H" "H" Connect to OUT pin via resistor of 27 k Don't care Stop Activate "H" or "L" "H" Connect to SS pin Don't care Stop Deactivate "H" "L" Don't care Don't care Stop Deactivate "H" *1. Refer to "1. pin" in " Pin Functions". *2. Output current "H": I OUT I O,WDact Output current "L": I OUT I O,WDdeact *3. Refer to " Selection of Watchdog Activation Threshold Current Adjustment Resistor (R,ext )". OUT WEN SS Figure 46 33

34 3. 4 Watchdog input circuit By inputting a rising edge to the pin, the watchdog timer detects a trigger. The has a built-in watchdog input circuit which contains a band pass filter in the pin, and detects a rising edge which satisfies an input condition as a trigger signal. Refer to *2 and Figure 4 in " Recommended Operation Conditions". During the operation of the watchdog timer, a trigger is detected only when the pin voltage is in DU to DWL and while the discharge operation of C is being performed. Refer to "3. Watchdog timer block" in " Operation" for details. The signal input from a monitored object by the watchdog timer to the watchdog timer should be input with a time interval which is sufficiently shorter than the watchdog trigger time (t,tr ). Caution Under a noisy environment, the watchdog input circuit may detect the noise as a trigger signal. Sufficiently evaluate with the actual application to confirm that a trigger is detected only in the intended signal Watchdog output circuit The output form of the WO pin is Nch open-drain. The WO pin can output a signal without an external pull-up resistor since it has a built-in resistor to pull up to the OUT pin internally. Do not connect to the pin other than OUT pin when connecting an external pull-up resistor to the WO pin. In the S-195 Series, the watchdog output pin is prepared as the WO / RO pin. Caution Define the external pull-up resistance by sufficient evaluation including the temperature characteristics under the actual usage conditions. 34

35 Timing Charts 1. S-195 Series (Product with watchdog enable function) IN OUT DET WEN 1/f DU DWL WO / RO t,tr t WD,I t rd t WD,P t Figure 47 Example of Watchdog Timer Monitoring Operation IN OUT t rr DET DET WEN DU DRL WO / RO t rd t rr t Figure 48 Example of Detector Operation 35

36 2. S-1951 Series (Product without watchdog enable function) IN OUT DET 1/f DU DWL RO WO t,tr t WD,I t rd t WD,p t Figure 49 Example of Watchdog Timer Monitoring Operation IN OUT t rr DET DET DU DRL RO WO t rd t rr t Figure 5 Example of Detector Operation 36

37 Precautions Wiring patterns for the IN pin, the OUT pin and GND should be designed so that the impedance is low. When mounting an output capacitor between the OUT pin and the SS pin (C L ) and an input capacitor between the IN pin and the SS pin (C IN ), the distance from the capacitors to these pins should be as short as possible. Note that generally the output voltage may increase when a series regulator is used at low load current (.1 ma or less). Note that generally the output voltage may increase due to the leakage current from an output transistor when a series regulator is used at high temperature. Generally a series regulator may cause oscillation, depending on the selection of external parts. The following conditions are recommended for the. However, be sure to perform sufficient evaluation under the actual usage conditions for selection, including evaluation of temperature characteristics. Refer to "4. Example of equivalent series resistance vs. Output current characteristics (Ta =25C)" in " Reference Data" for the equivalent series resistance (R ESR ) of the output capacitor. Input capacitor (C IN ): Output capacitor (C L ): 2.2 F or more 2.2 F or more In a series regulator, generally the values of overshoot and undershoot in the output voltage vary depending on the variation factors of power-on, power supply fluctuation and load fluctuation, or output capacitance. Determine the conditions of the output capacitor after sufficiently evaluating the temperature characteristics of overshoot or undershoot in the output voltage with the actual device. The voltage regulator may oscillate when the impedance of the power supply is high and the input capacitance is small or an input capacitor is not connected. Overshoot may occur in the output voltage momentarily if the voltage is rapidly raised at power-on or when the power supply fluctuates. Sufficiently evaluate the output voltage at that time with the actual device. If the OUT pin is steeply shorted with GND, a negative voltage exceeding the absolute maximum ratings may occur to the OUT pin due to resonance of the wiring inductance and the output capacitance in the application. The negative voltage can be limited by inserting a protection diode between the OUT pin and the SS pin or inserting a series resistor to the output capacitor. The application conditions for the input voltage, the output voltage, and the load current should not exceed the power dissipation. Do not apply an electrostatic discharge to this IC that exceeds the performance ratings of the built-in electrostatic protection circuit. In determining the output current, attention should be paid to the output current value specified in Table 1 in " Electrical Characteristics" and footnote *4 of the table. ABLIC Inc. claims no responsibility for any disputes arising out of or in connection with any infringement by products including this IC of patents owned by a third party. 37

38 Characteristics (Typical Data) 1. Regulator block 1. 1 Output voltage vs. Output current (When load current increases) (Ta =25C) OUT [] OUT = OUT = IN = 3.8 IN = 13.5 IN = IOUT [ma] OUT [] IN = 5.5 IN = 13.5 IN = IOUT [ma] 1. 2 Output voltage vs. Input voltage (Ta =25C) OUT = OUT = OUT [] 3. IOUT = 1 ma 2. IOUT = 1 ma 1. IOUT = 3 ma IOUT = 1 ma IOUT = 1 ma 3. IOUT = 1 ma 2. IOUT = 3 ma 1. IOUT = 1 ma IN [] IN [] 1. 3 Dropout voltage vs. Output current OUT = OUT = drop [m] 15 Tj = +15 C Tj = +125 C 1 Tj = +25 C 5 Tj = 4 C IOUT [ma] IOUT [ma] OUT [] drop [m] 15 Tj = +15 C Tj = +125 C 1 Tj = +25 C 5 Tj = 4 C Dropout voltage vs. Junction temperature OUT = OUT = IOUT = 1 ma 8 8 IOUT = 1 ma drop [m] 6 IOUT = 3 ma 4 2 drop [m] 6 4 IOUT = 3 ma Tj [ C] Tj [ C] 38

39 1. 5 Output voltage vs. Junction temperature OUT [] OUT = 3.3 IN = Tj [ C] OUT [] OUT = 5. IN = Tj [ C] 1. 6 Ripple rejection (Ta =25C) Ripple Rejection [db] OUT = IN = 13.5, C L = 2.2 F IOUT = 1 ma IOUT = 3 ma IOUT = 1 ma 1 1 1k 1k 1k 1M Frequency [Hz] Ripple Rejection [db] OUT = IN = 13.5, C L = 2.2 F IOUT = 1 ma IOUT = 3 ma IOUT = 1 ma 1 1 1k 1k 1k 1M Frequency [Hz] 2. Detector block 2. 1 Detection voltage, Release voltage vs. Junction temperature DET = DET = DET, DET [] DET DET Tj [ C] Tj [ C] DET, DET [] DET DET 2. 2 Hysteresis width vs. Junction temperature DET = DET = HYS [m] Tj [ C] HYS [m] Tj [ C] 39

40 2. 3 Nch transistor output current vs. DS DET = DET = Ta = +25 C 16 Ta = +25 C 6 Ta = 4 C 12 Ta = 4 C IRO [ma] 4 2 Ta = +125 C Ta = +125 C DS [] DS [] IRO [ma] 2. 4 Nch transistor output current vs. Output voltage IRO [ma] DET = 2.6 DS =.4 2 Ta = +25 C 15 Ta = 4 C 1 5 Ta = +125 C OUT [] DET = 4.7 DS =.4 3 IRO [ma] 25 Ta = +25 C 2 Ta = 4 C Ta = +125 C OUT [] 2. 5 Nch transistor output voltage vs. Output voltage RO [] DET = DS =.4 2 Tj = +15 C Tj = +125 C 1 Tj = +25 C Tj = 4 C OUT [] RO [] DET = Tj = +15 C Tj = +125 C Tj = +25 C Tj = 4 C DS = OUT [] Remark DS : Drain-to-source voltage of the output transistor 4

41 2. 6 Release delay time vs. Junction temperature DET = DET = trd [ms] trd [ms] Tj [ C] Tj [ C] 2. 7 Release delay time vs. Capacitance for delay time adjustment capacitor DET = DET = trd [ms] Tj = +15 C 1 Tj = +125 C 1 Tj = +25 C 1 Tj = 4 C Tj = +15 C 1 Tj = +125 C 1 Tj = +25 C 1 Tj = 4 C C [nf] C [nf] trd [ms] 2. 8 Reset reaction time vs. Junction temperature DET = DET = trr [s] trr [s] Tj [C] Tj [C] 2. 9 Reset reaction time vs. Capacitance for delay time adjustment capacitor DET = DET = trr [μs] Tj = +15 C Tj = +125 C 1 Tj = +25 C Tj = 4 C Tj = +15 C Tj = +125 C 1 Tj = +25 C Tj = 4 C C [nf] C [nf] trr [μs] 41

42 3. Watchdog timer block 3. 1 Watchdog trigger time vs. Junction temperature t,tr [ms] OUT = 3.3 IN = Tj [C] t,tr [ms] OUT = 5. IN = Tj [C] 3. 2 Watchdog trigger time vs. Capacitance for delay time adjustment capacitor OUT = 3.3 IN = Tj = 15C 1 Tj = 125C 1 Tj = 25C 1 Tj = 4C t,tr [ms] C [nf] OUT = 5. IN = Tj = 15C 1 Tj = 125C 1 Tj = 25C 1 Tj = 4C t,tr [ms] C [nf] 3. 3 Charge current, discharge current vs. Junction temperature ID,cha, ID,dcha [A] OUT = ID,cha ID,dcha IN = 13.5 ID,cha, ID,dcha [A] OUT = ID,cha ID,dcha IN = Tj [ C] Tj [ C] 3. 4 Upper timing threshold voltage, lower watchdog timing threshold voltage, lower reset timing threshold voltage vs. Junction temperature 42 DU, DWL, DRL [] OUT = DU DWL DRL IN = Tj [C] DU, DWL, DRL [] OUT = DU DWL DRL IN = Tj [C]

43 3. 5 Watchdog activation current, watchdog deactivation current vs. Junction temperature IO,WDact, IO,WDdeact [ma] OUT = 3.3 IN = IO,WDact IO,WDdeact Tj [C] IO,WDact, IO,WDdeact [ma] OUT = 5. IN = IO,WDact IO,WDdeact Tj [C] 3. 6 Watchdog activation current, Watchdog deactivation current vs. Watchdog activation threshold current adjustment resistor (Ta =25C) IO,WDact, IO,WDdeact [ma] OUT = 3.3 IN = IO,WDact IO,WDdeact R,ext [k] IO,WDact, IO,WDdeact [ma] OUT = 5. IN = IO,WDact IO,WDdeact R,ext [k] 43

44 4. Overall 4. 1 Current consumption during operation vs. input voltage ISS1 [A] OUT = 3.3, DET = 2.6 When watchdog timer is deactivated Tj = 4 C Tj = +25 C Tj = +125 C Tj = +15 C IN [] ISS1 [A] OUT = 5., DET = 4.7 When watchdog timer is deactivated Tj = 4 C Tj = +25 C IN [] Tj = +125 C Tj = +15 C 4. 2 Current consumption during operation vs. Output current OUT = 3.3, DET = 2.6 IN = 13.5, pin is open OUT = 5., DET = 4.7 IN = 13.5, pin is open 16 ISS1 [μa] 12 Ta = 4 C 8 4 Ta = +25 C Ta = +125 C IOUT [ma] ISS1 [μa] 12 Ta = 4 C 8 4 Ta = +25 C Ta = +125 C IOUT [ma] 4. 3 Current consumption during operation vs. Junction temperature ISS1 [μa] OUT = 3.3, DET = 2.6 IN = 13.5, pin is open 16 IOUT = 2 ma IOUT = 5 ma IOUT = 5 ma Tj [ C] ISS1 [μa] OUT = 5., DET = 4.7 IN = 13.5, pin is open 16 IOUT = 2 ma IOUT = 5 ma IOUT = 5 ma Tj [ C] 44

45 Reference Data 1. Transient response characteristics when input (Ta = 25C) OUT [] 1. 1 OUT = 3.3 I OUT = 3 ma, C L = 2.2 F, IN = , t r = t f = 5. s 1. 2 OUT = 5. I OUT = 3 ma, C L = 2.2 F, IN = , t r = t f = 5. s IN OUT IN [] OUT [] t [s] t [s] 2. Transient response characteristics of load (Ta = 25C) 2. 1 OUT = OUT = 5. IN = 13.5, C L = 2.2 F, I OUT = 5 ma 1 ma IN = 13.5, C L = 2.2 F, I OUT = 5 ma 1 ma OUT [] OUT [] IOUT OUT IOUT [ma] OUT [] t [s] t [s] 3. Load dump characteristics (Ta = 25C) 3. 1 OUT = 5. I OUT =.1 ma, IN = , C IN = C L = 2.2 F IN OUT IN OUT IOUT OUT t [s] 4. Example of equivalent series resistance vs. Output current characteristics (Ta = 25C) C IN = C L = 2.2 F, C = 47 nf IN [] IOUT [ma] IN [] RESR [] 1 Stable C IN IN WEN S-195 Series WO / RO OUT C L *1.1 2 I OUT [ma] C SS R ESR *1. C L : Murata Manufacturing Co., Ltd. GCM31CR71H225K (2.2 F) 45

46 Power Dissipation HSOP-8A 5 Tj = 15C max. Power dissipation (PD) [W] E D C B A Ambient temperature (Ta) [C] Board Power Dissipation (P D ) A 1.2 W B 1.69 W C 3.21 W D 3.38 W E 4.3 W 46

47 HSOP-8A Test Board (1) Board A IC Mount Area Item Specification Size [mm] x 76.2 x t1.6 Material FR-4 Number of copper foil layer 2 1 Land pattern and wiring for testing: t Copper foil layer [mm] x 74.2 x t.7 Thermal via - (2) Board B Item Specification Size [mm] x 76.2 x t1.6 Material FR-4 Number of copper foil layer 4 1 Land pattern and wiring for testing: t x 74.2 x t.35 Copper foil layer [mm] x 74.2 x t x 74.2 x t.7 Thermal via - (3) Board C Material Number of copper foil layer 4 Copper foil layer [mm] Thermal via Item Size [mm] x 76.2 x t FR-4 Land pattern and wiring for testing: t x 74.2 x t x 74.2 x t x 74.2 x t.7 Number: 4 Diameter:.3 mm Specification enlarged view No. HSOP8A-A-Board-SD-1. ABLIC Inc.

48 HSOP-8A Test Board (4) Board D IC Mount Area Item Specification Size [mm] x 76.2 x t1.6 Material FR-4 Number of copper foil layer 4 Copper foil layer [mm] Pattern for heat radiation: 2mm2 t x 74.2 x t x 74.2 x t x 74.2 x t.7 Thermal via - (5) Board E Item Specification Size [mm] x 76.2 x t1.6 Material FR-4 Number of copper foil layer 4 Copper foil layer [mm] Thermal via Pattern for heat radiation: 2mm 2 t x 74.2 x t x 74.2 x t x 74.2 x t.7 Number: 4 Diameter:.3 mm enlarged view No. HSOP8A-A-Board-SD-1. ABLIC Inc.