50 ma, High Voltage, Micropower Linear Regulator ADP1720

Transcription

1 5 ma, High Voltage, Micropower Linear Regulator ADP72 FEATURES Wide input voltage range: 4 V to 28 V Maximum output current: 5 ma Low light load current: 28 μa at μa load 35 μa at μa load Low shutdown current:.7 μa Low dropout voltage: ma load Initial accuracy: ±.5% Accuracy over line, load, and temperature: ±2% Stable with small μf ceramic output capacitor Fixed 3.3 V and 5. V output voltage options Adjustable output voltage option:.225 V to 5. V Current limit and thermal overload protection Logic controlled enable Space-saving thermally enhanced MSOP package APPLICATIONS DC-to-DC post regulation PCMCIA regulation Keep-alive power in portable equipment Industrial applications TYPICAL APPLICATION CIRCUITS V IN = 28V µf V OUT = 5V µf ADP72 FIXED GND GND 8 2 IN GND 7 3 OUT GND 6 4 EN GND 5 Figure. ADP72 with Fixed Output Voltage, 5. V V IN = 2V µf V OUT =.225V( + R/R2) µf R2 R ADP72 ADJUSTABLE ADJ GND 8 IN GND 7 OUT GND 6 EN GND 5 Figure 2. ADP72 with Adjustable Output Voltage,.225 V to 5. V GENERAL DESCRIPTION The ADP72 is a high voltage, micropower, low dropout linear regulator. Operating over a very wide input voltage range of 4 V to 28 V, the ADP72 can provide up to 5 ma of output current. With just 28 μa of quiescent supply current and a micropower shutdown mode, this device is ideal for applications that require low quiescent current. The ADP72 is available in fixed output voltages of 3.3 V and 5. V. An adjustable version is also available, which allows the output to be set anywhere between.225 V and 5. V. An enable function that allows external circuits to turn on and turn off the ADP72 output is available. For automatic startup, the enable (EN) pin can be connected directly to the input rail. The ADP72 is optimized for stable operation with small μf ceramic output capacitors, allowing for good transient performance while occupying minimal board space. The ADP72 operates from 4 C to +25 C and uses current limit protection and thermal overload protection circuits to prevent damage to the device in adverse conditions. Available in a small thermally enhanced MSOP package, the ADP72 provides a compact solution with low thermal resistance. Rev. A Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 96, Norwood, MA , U.S.A. Tel: Fax: Analog Devices, Inc. All rights reserved.

2 * PRODUCT PAGE QUICK LINKS Last Content Update: 2/23/27 COMPARABLE PARTS View a parametric search of comparable parts. EVALUATION KITS ADP72 Evaluation Board DOCUMENTATION Application Notes AN-72: How to Successfully Apply Low Dropout Regulators AN-328: High Performance, Low Noise Studio Microphone with MEMS Microphones, Analog Beamforming, and Power Management Data Sheet ADP72-DSCC: Military Data Sheet ADP72-EP: Enhanced Product Data Sheet ADP72: 5 ma, High Voltage, Micropower Linear Regulator Data Sheet User Guides UG-8: PLC Demo System, Industrial Process Control Demo System TOOLS AND SIMULATIONS ADI Linear Regulator Design Tool and Parametric Search ADIsimPower Voltage Regulator Design Tool REFERENCE DESIGNS CN95 CN29 CN23 CN22 CN25 CN292 CN3 CN39 CN325 CN383 DESIGN RESOURCES ADP72 Material Declaration PCN-PDN Information Quality And Reliability Symbols and Footprints DISCUSSIONS View all ADP72 EngineerZone Discussions. SAMPLE AND BUY Visit the product page to see pricing options. TECHNICAL SUPPORT Submit a technical question or find your regional support number. DOCUMENT FEEDBACK Submit feedback for this data sheet. This page is dynamically generated by Analog Devices, Inc., and inserted into this data sheet. A dynamic change to the content on this page will not trigger a change to either the revision number or the content of the product data sheet. This dynamic page may be frequently modified.

3 TABLE OF CONTENTS Features... Applications... Typical Application Circuits... General Description... Revision History... 2 Specifications... 3 Absolute Maximum Ratings... 5 Thermal Resistance... 5 ESD Caution... 5 Pin Configurations and Function Descriptions... 6 Typical Performance Characteristics...7 Theory of Operation... Adjustable Output Voltage (ADP72 Adjustable)... Applications Information... Capacitor Selection... Current Limit and Thermal Overload Protection... Thermal Considerations... 2 Printed Circuit Board Layout Considerations... 4 Outline Dimensions... 5 Ordering Guide... 5 REVISION HISTORY 7/7 Rev. to Rev. A Change to Figure... Changes to Table... 3 Changes to Ordering Guide /7 Revision : Initial Version Rev. A Page 2 of 6

4 SPECIFICATIONS VIN = 2 V, IOUT = μa, CIN = COUT = μf, TA = 25 C, unless otherwise noted. Table. Parameter Symbol Conditions Min Typ Max Unit INPUT VOLTAGE RANGE VIN TJ = 4 C to +25 C 4 28 V OPERATING SUPPLY CURRENT IGND IOUT = μa 28 μa IOUT = μa, VIN = VOUT +.5 V or 4 V (whichever is 8 μa greater), TJ = 4 C to +25 C IOUT = μa 35 μa IOUT = μa, VIN = VOUT +.5 V or 4 V (whichever is 2 μa greater), TJ = 4 C to +25 C IOUT = ma 74 μa IOUT = ma, VIN = VOUT +.5 V or 4 V (whichever is 34 μa greater), TJ = 4 C to +25 C IOUT = ma 3 μa IOUT = ma, VIN = VOUT +.5 V or 4 V (whichever is 9 μa greater), TJ = 4 C to +25 C μa < IOUT < 5 ma, VIN = VOUT +.5 V or 4 V μa (whichever is greater), TJ = 4 C to +25 C SHUTDOWN CURRENT IGND-SD EN = GND.7 μa EN = GND, TJ = 4 C to +25 C.5 μa OUTPUT Fixed Output VOUT IOUT = μa % Voltage Accuracy μa < IOUT < 5 ma + % μa < IOUT < 5 ma, TJ = 4 C to +25 C 2 +2 % Adjustable Output VOUT IOUT = μa V Voltage Accuracy μa < IOUT < 5 ma V μa < IOUT < 5 ma, TJ = 4 C to +25 C V Noise ( Hz to khz) OUTNOISE VOUT =.6 V, COUT = μf 46 μv rms VOUT =.6 V, COUT = μf 24 μv rms VOUT = 5 V, COUT = μf 34 μv rms VOUT = 5 V, COUT = μf 266 μv rms REGULATION Line Regulation VOUT/ VIN VIN = (VOUT +.5 V) to 28 V, TJ = 4 C to +25 C %/ V Load Regulation 2 VOUT/ IOUT ma < IOUT < 5 ma. %/ma ma < IOUT < 5 ma, TJ = 4 C to +25 C.5 %/ma DROPOUT VOLTAGE 3 VDROPOUT IOUT = ma 55 mv IOUT = ma, TJ = 4 C to +25 C 5 mv IOUT = 5 ma 275 mv IOUT = 5 ma, TJ = 4 C to +25 C 48 mv START-UP TIME 4 TSTART-UP 2 μs CURRENT LIMIT THRESHOLD 5 ILIMIT ma THERMAL CHARACTERISTICS Thermal Shutdown TSSD TJ rising 5 C Threshold Thermal Shutdown TSSD-HYS 5 C Hysteresis EN CHARACTERISTICS EN Input Logic High VIH 4 V VIN 28 V.8 V Logic Low VIL 4 V VIN 28 V.4 V Leakage Current VI-LEAKAGE EN = GND. μa EN = IN.5 μa ADJ INPUT BIAS CURRENT (ADP72 ADJUSTABLE) ADJI-BIAS 3 na Rev. A Page 3 of 6

5 Parameter Symbol Conditions Min Typ Max Unit POWER SUPPLY REJECTION RATIO PSRR f = 2 Hz, VIN = 8 V, VOUT =.6 V 9 db f = khz, VIN = 8 V, VOUT =.6 V 8 db f = khz, VIN = 8 V, VOUT =.6 V 6 db f = 2 Hz, VIN = 8 V, VOUT = 5 V 83 db f = khz, VIN = 8 V, VOUT = 5 V 7 db f = khz, VIN = 8 V, VOUT = 5 V 5 db Accuracy when OUT is connected directly to ADJ. When OUT voltage is set by external feedback resistors, absolute accuracy in adjust mode depends on the tolerances of resistors used. 2 Based on an end-point calculation using ma and 5 ma loads. See Fi gure 6 for typical load regulation performance for loads less than ma. 3 Dropout voltage is defined as the input to output voltage differential when the input voltage is set to the nominal output voltage. This applies only for output voltages above 4 V. 4 Start-up time is defined as the time between the rising edge of EN to OUT being at 95% of its nominal value. 5 Current limit threshold is defined as the current at which the output voltage drops to 9% of the specified typical value. For example, the current limit for a 5. V output voltage is defined as the current that causes the output voltage to drop to 9% of 5. V, or 4.5 V. Rev. A Page 4 of 6

6 ABSOLUTE MAXIMUM RATINGS Table 2. Parameter IN to GND OUT to GND EN to GND ADJ to GND Storage Temperature Range Operating Junction Temperature Range Soldering Conditions Rating.3 V to +3 V.3 V to IN or +6 V (whichever is less).3 V to +3 V.3 V to +6 V 65 C to +5 C 4 C to +25 C JEDEC J-STD-2 THERMAL RESISTANCE θja is specified for the worst-case conditions, that is, a device soldered in a circuit board for surface-mount packages. Table 3. Thermal Resistance Package Type θja θjc Unit 8-Lead MSOP 8 57 C/W ESD CAUTION Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Rev. A Page 5 of 6

7 PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS GND IN 2 OUT 3 EN 4 8 GND ADJ ADP72 7 GND IN 2 FIXED TOP VIEW 6 GND OUT 3 (Not to Scale) 5 GND EN 4 Figure 3. 8-Lead MSOP 6-3 ADP72 ADJUSTABLE TOP VIEW (Not to Scale) 5 8 GND 7 GND 6 GND GND Figure 4. 8-Lead MSOP 6-4 Table 4. Pin Function Descriptions ADP72 Fixed Pin No. ADP72 Adjustable Pin No. Mnemonic Description N/A GND This pin is internally connected to ground. N/A ADJ Adjust. A resistor divider from OUT to ADJ sets the output voltage. 2 2 IN Regulator Input Supply. Bypass IN to GND with a μf or greater capacitor. 3 3 OUT Regulated Output Voltage. Bypass OUT to GND with a μf or greater capacitor. 4 4 EN Enable Input. Drive EN high to turn on the regulator; drive it low to turn off the regulator. For automatic startup, connect EN to IN. 5 5 GND Ground. 6 6 GND Ground. 7 7 GND Ground. 8 8 GND Ground. Rev. A Page 6 of 6

8 TYPICAL PERFORMANCE CHARACTERISTICS VIN = 2 V, VOUT = 5 V, IOUT = μa, CIN = COUT = μf, TA = 25 C, unless otherwise noted V OUT (V) I GND (µa) 8 6 I LOAD = 5mA I LOAD = 25mA I LOAD = ma I LOAD = ma I LOAD = µa I LOAD = µa I LOAD = µa I LOAD = µa I LOAD = ma I LOAD = ma I LOAD = 25mA I LOAD = 5mA T J ( C) T J ( C) Figure 5. Output Voltage vs. Junction Temperature Figure 8. Ground Current vs. Junction Temperature V OUT (V) I GND (µa) I LOAD (ma) Figure 6. Output Voltage vs. Load Current I LOAD (ma) Figure 9. Ground Current vs. Load Current I LOAD = µa I LOAD = µa I LOAD = ma I LOAD = ma I LOAD = 25mA I LOAD = 5mA 4 2 I LOAD = 5mA I LOAD = 25mA I LOAD = ma I LOAD = ma I LOAD = µa I LOAD = µa V OUT (V) I GND (µa) V IN (V) Figure 7. Output Voltage vs. Input Voltage V IN (V) Figure. Ground Current vs. Input Voltage 6- Rev. A Page 7 of 6

9 3 3.5 V DROPOUT (mv) I GND (ma) I LOAD = ma I LOAD = 25mA I LOAD = 5mA 5 I LOAD (ma) Figure. Dropout Voltage vs. Load Current 6-.5 I LOAD = ma V IN (V) Figure 3. Ground Current vs. Input Voltage (in Dropout) I LOAD = ma 2 V IN = 8V V OUT =.6V C OUT = µf V RIPPLE = 5mV V OUT (V) 4.9 I LOAD = 5mA 4.85 I LOAD = 25mA 4.8 I LOAD = ma V IN (V) Figure 2. Output Voltage vs. Input Voltage (in Dropout) 6-2 PSRR (db) µa ma ma k k k M M FREQUENCY (Hz) Figure 4. Power Supply Rejection Ratio vs. Frequency (.6 V Adjustable Output) 6-4 Rev. A Page 8 of 6

10 2 V IN = 8V V OUT = 5V C OUT = µf V RIPPLE = 5mV V IN STEP FROM 6V TO 7V PSRR (db) ma µa ma k k k M M 6-5 2V/DIV mv/div 2 V OUT = 5V C IN = µf C OUT = µf I LOAD = 5mA V OUT 6-7 FREQUENCY (Hz) Figure 5. Power Supply Rejection Ratio vs. Frequency (5. V Fixed Output) TIME (µs/div) Figure 7. Line Transient Response V IN = 2V V OUT =.6V C IN = µf C OUT = µf LOAD STEP FROM 2.5mA TO 47.5mA 5V/DIV EN mv/div V OUT V OUT 6-6 2V/DIV 2 V IN = 2V V OUT = 5V C IN = µf C OUT = µf I LOAD = 5mA 6-8 TIME (2µs/DIV) Figure 6. Load Transient Response TIME (4µs/DIV) Figure 8. Start-Up Time Rev. A Page 9 of 6

11 THEORY OF OPERATION The ADP72 is a low dropout, BiCDMOS linear regulator that operates from a 4 V to 28 V input rail and provides up to 5 ma of output current. Ground current in shutdown mode is typically 7 na. The ADP72 is stable and provides high power supply rejection ratio (PSRR) and excellent line and load transient response with just a small μf ceramic output capacitor. IN EN CURRENT LIMIT THERMAL PROTECT SHUTDOWN REFERENCE GND Figure 9. Internal Block Diagram OUT GND/ADJ Internally, the ADP72 consists of a reference, an error amplifier, a feedback voltage divider, and a DMOS pass transistor. Output current is delivered via the DMOS pass device, which is controlled by the error amplifier. The error amplifier compares the reference voltage with the feedback voltage from the output and amplifies the difference. If the feedback voltage is lower than the reference voltage, the gate of the DMOS device is pulled lower, allowing more current to pass and increasing the output voltage. If the feedback voltage is higher than the reference voltage, the gate of the PNP device is pulled higher, allowing less current to pass and decreasing the output voltage. The ADP72 is available in two versions, one with fixed output voltage options (see Figure ) and one with an adjustable output voltage (see Figure 2). The fixed output voltage options are set internally to either 5. V or 3.3 V, using an internal feedback network. The adjustable output voltage can be set to between.225 V and 5. V by an external voltage divider connected from OUT to ADJ. The ADP72 uses the EN pin to enable and disable the OUT pin under normal operating conditions. When EN is high, OUT turns on; when EN is low, OUT turns off. For automatic startup, EN can be tied to IN. 6-9 ADJUSTABLE OUTPUT VOLTAGE (ADP72 ADJUSTABLE) The ADP72 adjustable version can have its output voltage set over a.225 V to 5. V range. The output voltage is set by connecting a resistive voltage divider from OUT to ADJ. The output voltage is calculated using the equation VOUT =.225 V ( + R/R2) () where: R is the resistor from OUT to ADJ. R2 is the resistor from ADJ to GND. To make calculation of R and R2 easier, Equation can be rearranged as follows: R = R2 [(VOUT /.225) ] (2) The maximum bias current into ADJ is na; therefore, when less than.5% error is due to the bias current, use values less than 6 kω for R2. Rev. A Page of 6

12 APPLICATIONS INFORMATION CAPACITOR SELECTION Output Capacitor The ADP72 is designed for operation with small, space-saving ceramic capacitors, but it functionswith most commonly used capacitors as long as care is taken about the effective series resistance (ESR) value. The ESR of the output capacitor affects stability of the LDO control loop. A minimum of μf capacitance with an ESR of 5 mω or less is recommended to ensure stability of the ADP72. Transient response to changes in load current is also affected by output capacitance. Using a larger value of output capacitance improves the transient response of the ADP72 to large changes in load current. Figure 2 and Figure 2 show the transient responses for output capacitance values of μf and μf, respectively. mv/div mv/div V IN = 2V V OUT =.6V C IN = µf C OUT = µf LOAD STEP FROM 2.5mA TO 47.5mA TIME (2µs/DIV) Figure 2. Output Transient Response, μf V IN = 2V V OUT =.6V C IN = µf C OUT = µf LOAD STEP FROM 2.5mA TO 47.5mA TIME (2µs/DIV) Figure 2. Output Transient Response, μf Input Bypass Capacitor Connecting a μf capacitor from IN to GND reduces the circuit sensitivity to printed circuit board (PCB) layout, especially when encountering long input traces or high source impedance. If greater than μf of output capacitance is required, it is recommended that the input capacitor be increased to match it Input and Output Capacitor Properties Any good quality ceramic capacitors can be used with the ADP72, as long as they meet the minimum capacitance and maximum ESR requirements. Ceramic capacitors are manufactured with a variety of dielectrics, each with different behavior over temperature and applied voltage. Capacitors must have a dielectric adequate to ensure the minimum capacitance over the necessary temperature range and dc bias conditions. X5R or X7R dielectrics with a voltage rating of 6.3 V or V are recommended for the output capacitor. X5R or X7R dielectrics with a voltage rating of 5 V or higher are recommended for the input capacitor. Y5V and Z5U dielectrics are not recommended, due to their poor temperature and dc bias characteristics. CURRENT LIMIT AND THERMAL OVERLOAD PROTECTION Current limit and thermal overload protection circuits on the ADP72 protect the part from damage caused by excessive power dissipation. The ADP72 is designed to current limit when the output load reaches 9 ma (typical). When the output load exceeds 9 ma, the output voltage is reduced to maintain a constant current limit. Thermal overload protection is included, which limits the junction temperature to a maximum of 5 C (typical). Under extreme conditions (that is, high ambient temperature and power dissipation), when the junction temperature starts to rise above 5 C, the output is turned off, reducing the output current to zero. When the junction temperature drops below 35 C, the output is turned on again, and output current is restored to its nominal value. Consider the case where a hard short from OUT to GND occurs. At first, the ADP72 current limits so that only 9 ma is conducted into the short. If self-heating of the junction is great enough to cause its temperature to rise above 5 C, thermal shutdown activates, turning off the output and reducing the output current to zero. As the junction temperature cools and drops below 35 C, the output turns on and conducts 9 ma into the short, again causing the junction temperature to rise above 5 C. This thermal oscillation between 35 C and 5 C causes a current oscillation between 9 ma and ma, which continues as long as the short remains at the output. Current and thermal limit protections are intended to protect the device against accidental overload conditions. For reliable operation, device power dissipation must be externally limited so that junction temperatures do not exceed 25 C. Rev. A Page of 6

13 THERMAL CONSIDERATIONS To guarantee reliable operation, the junction temperature of the ADP72 must not exceed 25 C. To ensure the junction temperature stays below this maximum value, the user needs to be aware of the parameters that contribute to junction temperature changes. These parameters include ambient temperature, power dissipation in the power device, and thermal resistances between the junction and ambient air (θja). The θja number is dependent on the package assembly compounds used and the amount of copper to which the GND pins of the package are soldered on the PCB. Table 5 shows typical θja values of the 8-lead MSOP package for various PCB copper sizes. Table 5. Copper Size (mm 2 ) θja ( C/W) Device soldered to minimum size pin traces. The junction temperature of the ADP72 can be calculated from the following equation: TJ = TA + (PD θja) (3) where: TA is the ambient temperature. PD is the power dissipation in the die, given by PD = [(VIN VOUT) ILOAD] + (VIN IGND) (4) where: ILOAD is the load current. IGND is the ground current. VIN and VOUT are input and output voltages, respectively. Power dissipation due to ground current is quite small and can be ignored. Therefore, the junction temperature equation simplifies to the following: TJ = TA + {[(VIN VOUT) ILOAD] θja} (5) As shown in Equation 5, for a given ambient temperature, input-to-output voltage differential, and continuous load current, there exists a minimum copper size requirement for the PCB to ensure that the junction temperature does not rise above 25 C. Figure 22 to Figure 27 show junction temperature calculations for different ambient temperatures, load currents, VIN to VOUT differentials, and areas of PCB copper. T J ( C) T J ( C) ( C) T J MAX T J (DO NOT OPERATE ABOVE THIS POINT) 2 ma ma 3mA 5mA 5mA 2mA 4mA (LOAD CURRENT) V IN V OUT (V) Figure mm 2 of PCB Copper, TA = 25 C MAX T J (DO NOT OPERATE ABOVE THIS POINT) 2 ma ma 3mA 5mA 5mA 2mA 4mA (LOAD CURRENT) V IN V OUT (V) Figure 23. mm 2 of PCB Copper, TA = 25 C MAX T J (DO NOT OPERATE ABOVE THIS POINT) 2 ma ma 3mA 5mA 5mA 2mA 4mA (LOAD CURRENT) V IN V OUT (V) Figure 24. mm 2 of PCB Copper, TA = 25 C Rev. A Page 2 of 6

14 4 MAX T J (DO NOT OPERATE ABOVE THIS POINT) 4 MAX T J (DO NOT OPERATE ABOVE THIS POINT) 2 2 T J ( C) 8 6 T J ( C) ma ma 3mA 5mA 5mA 2mA 4mA (LOAD CURRENT) ma ma 3mA 5mA 5mA 2mA 4mA (LOAD CURRENT) V IN V OUT (V) V IN V OUT (V) Figure mm 2 of PCB Copper, TA = 5 C Figure 27. mm 2 of PCB Copper, TA = 5 C 4 2 MAX T J (DO NOT OPERATE ABOVE THIS POINT) T J ( C) ma ma 3mA 5mA 5mA 2mA 4mA (LOAD CURRENT) V IN V OUT (V) Figure 26. mm 2 of PCB Copper, TA = 5 C 6-26 Rev. A Page 3 of 6

15 PRINTED CIRCUIT BOARD LAYOUT CONSIDERATIONS Heat dissipation from the package can be improved by increasing the amount of copper attached to the pins of the ADP72. However, as can be seen from Table 5, a point of diminishing returns eventually is reached, beyond which an increase in the copper size does not yield significant heat dissipation benefits. Place the input capacitor as close as possible to the IN and GND pins. Place the output capacitor as close as possible to the OUT and GND pins. Use of 42 or 63 size capacitors and resistors achieves the smallest possible footprint solution on boards where area is limited. GND (TOP) ADP72 C C2 IN OUT R R2 EN GND (BOTTOM) Figure 28. Example PCB Layout 6-28 Rev. A Page 4 of 6

16 OUTLINE DIMENSIONS PIN.65 BSC COPLANARITY.. MAX SEATING PLANE COMPLIANT TO JEDEC STANDARDS MO-87-AA Figure Lead Mini Small Outline Package [MSOP] (RM-8) Dimensions shown in millimeters ORDERING GUIDE Model Temperature Range Output Voltage (V) Package Description Package Option Branding ADP72ARMZ-5-R7 4 C to +25 C 5 8-Lead MSOP RM-8 L3 ADP72ARMZ-3.3-R7 4 C to +25 C Lead MSOP RM-8 L2Z ADP72ARMZ-R7 4 C to +25 C.225 to 5 8-Lead MSOP RM-8 L2M ADP72-5-EVALZ 5 Evaluation Board ADP EVALZ 3.3 Evaluation Board ADP72-EVALZ.225 to 5 Evaluation Board Z = RoHS Compliant Part. Rev. A Page 5 of 6

17 NOTES 27 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D6--7/7(A) Rev. A Page 6 of 6