500 ma, Low Dropout, CMOS Linear Regulator ADP1715/ADP1716

Transcription

1 ma, Low Dropout, CMOS Linear Regulator ADP7/ADP76 FEATURES Maximum output current: ma Input voltage range:. V to. V Low shutdown current: < μa Low dropout voltage: ma load ma load Initial accuracy: ±% Accuracy over line, load, and temperature: ±3% 6 fixed output voltage options with soft start:.7 V to 3.3 V (ADP7) Adjustable output voltage option:.8 V to. V (ADP7 Adjustable) 6 fixed output voltage options with tracking:.7 V to 3.3 V (ADP76) Stable with small. μf ceramic output capacitor Excellent load/line transient response Current limit and thermal overload protection Logic controlled enable 8-lead thermally enhanced MSOP package APPLICATIONS Notebook computers Memory components Telecommunications equipment Network equipment DSP/FPGA/μP supplies Instrumentation equipment/data acquisition systems GENERAL DESCRIPTION The ADP7/ADP76 are low dropout, CMOS linear regulators that operate from. V to. V and provide up to ma of output current. Using an advanced proprietary architecture, they provide high power supply rejection and achieve excellent line and load transient response with just a small. μf ceramic output capacitor. Three versions of this part are available, one with fixed output voltage options and variable soft start (ADP7), one with adjustable output voltage and fixed soft start (ADP7 Adjustable), and one with voltage tracking in fixed output voltage options (ADP76). The fixed output voltage options are internally set to one of sixteen values TYPICAL APPLICATION CIRCUITS.µF V OUT = 3.3V.µF 3 4 nf ADP7 EN GND 8 IN GND 7 OUT GND 6 SS GND Figure. ADP7 with Fixed Output Voltage, 3.3 V.µF V OUT =.8( + R/R).µF R R ADP7 ADJUSTABLE EN GND 8 IN GND 7 3 OUT GND 6 4 ADJ GND Figure. ADP7 with Adjustable Output Voltage,.8 V to. V ADP76 V OUT (V) EN GND 8 IN GND 7 3.µF 3 OUT GND 6 V OUT 4 TRK GND.µF 3 4 V TRK = V TO V V TRK (V) Figure 3. ADP76 with Output Voltage Tracking between.7 V and 3.3 V; the adjustable output voltage can be set to any value between.8 V and. V by an external voltage divider connected from OUT to ADJ. The variable soft start uses an external capacitor at SS to control the output voltage ramp. Tracking limits the output voltage to the at-or-below voltage at the TRK pin. The ADP7/ADP76 are available in 8-lead thermally enhanced MSOP packages, making them not only a very compact solution but also providing excellent thermal performance for applications requiring up to ma of output current in a small, low profile footprint Rev. Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 96, Norwood, MA 6-96, U.S.A. Tel: Fax: Analog Devices, Inc. All rights reserved.

2 TABLE OF CONTENTS Features... Applications... Typical Application Circuits... General Description... Revision History... Specifications... 3 Absolute Maximum Ratings... 4 Thermal Resistance... 4 ESD Caution... 4 Track Mode (ADP76)... Enable Feature... Application Information... Capacitor Selection... Current Limit and Thermal Overload Protection... Thermal Considerations... Printed Circuit Board Layout Considerations... Outline Dimensions... 6 Ordering Guide... 7 Pin Configurations and Function Descriptions... Typical Performance Characteristics... 6 Theory of Operation... Soft-Start Function (ADP7)... Adjustable Output Voltage (ADP7 Adjustable)... REVISION HISTORY 9/6 Rev. : Initial Version Rev. Page of

3 SPECIFICATIONS VIN = (VOUT +. V) or. V (whichever is greater), IOUT = ma, CIN = COUT =. μf, TA = C, unless otherwise noted. Table. ADP7/ADP76 Parameter Symbol Conditions Min Typ Max Unit INPUT VOLTAGE RANGE VIN TJ = 4 C to + C.. V OPERATING SUPPLY CURRENT IGND IOUT = μa 6 μa IOUT = μa, TJ = 4 C to + C μa IOUT = ma 6 μa IOUT = ma, TJ = 4 C to + C μa μa < IOUT < ma, TJ = 4 C to + C 6 μa SHUTDOWN CURRENT IGND-SD EN = GND. μa EN = GND, TJ = 4 C to + C. μa FIXED OUTPUT VOLTAGE ACCURACY VOUT IOUT = ma + % (ADP7 and ADP76 ONLY) IOUT = ma to ma + % μa < IOUT < ma, TJ = 4 C to + C 3 +3 % ADJUSTABLE OUTPUT VOLTAGE VOUT IOUT = ma V ACCURACY (ADP7 ADJUSTABLE) IOUT = ma to ma V μa < IOUT < ma, TJ = 4 C to + C V LINE REGULATION VOUT/ VIN VIN = (VOUT +. V) to. V, TJ = 4 C to + C. +. %/ V LOAD REGULATION VOUT/ IOUT IOUT = ma to ma. %/ma IOUT = ma to ma, TJ = 4 C to + C.4 %/ma DROPOUT VOLTAGE 3 VDROPOUT IOUT = ma, VOUT 3.3 V mv IOUT = ma, VOUT 3.3 V, TJ = 4 C to + C mv IOUT = ma, VOUT 3.3 V 3 mv IOUT = ma, VOUT 3.3 V, TJ = 4 C to + C 4 mv IOUT = ma,. V VOUT < 3.3 V 6 mv IOUT = ma,. V VOUT < 3.3 V, TJ = 4 C to + C mv IOUT = ma,. V VOUT < 3.3 V 3 4 mv IOUT = ma,. V VOUT < 3.3 V, TJ = 4 C to + C mv START-UP TIME 4 TSTART-UP ADP7 Adjustable and ADP76 μs ADP7 with External Soft Start CSS = nf 7.3 ms CURRENT LIMIT THRESHOLD ILIMIT 7 ma THERMAL SHUTDOWN THRESHOLD TSSD TJ rising C THERMAL SHUTDOWN HYSTERESIS TSSD-HYS C SOFT-START SOURCE CURRENT SSI-SOURCE SS = GND.7..7 μa (ADP7 WITH EXTERNAL SOFT START) VOUT to VTRK ACCURACY VTRK-ERROR V VTRK (. VOUT(NOM)), VOUT(NOM).8 V, TJ = 4 C to + C + mv (ADP76) V VTRK (. VOUT(NOM)), VOUT(NOM) >.8 V, TJ = 4 C to + C + mv EN INPUT LOGIC HIGH VIH. V VIN. V.8 V EN INPUT LOGIC LOW VIL. V VIN. V.4 V EN INPUT LEAKAGE CURRENT VI-LEAKAGE EN = IN or GND. μa ADJ INPUT BIAS CURRENT ADJI-BIAS 3 na (ADP7 ADJUSTABLE) OUTPUT NOISE OUTNOISE Hz to khz, VOUT =.7 V μvrms Hz to khz, VOUT = 3.3 V 4 μvrms POWER SUPPLY REJECTION RATIO PSRR khz, VOUT =.7 V 67 db khz, VOUT = 3.3 V 3 db Accuracy when OUT is connected directly to ADJ. When OUT voltage is set by external feedback resistors, absolute accuracy in adjust mode depends on the tolerances of resistors used. Based on an end-point calculation using ma and ma loads. See Figure 8 for typical load regulation performance for loads less than ma. 3 Dropout voltage is defined as the input to output voltage differential when the input voltage is set to the nominal output voltage. This applies only for output voltages above. V. 4 Start-up time is defined as the time between the rising edge of EN to OUT being at 9% of its nominal value. Current limit threshold is defined as the current at which the output voltage drops to 9% of the specified typical value. For example, the current limit for a. V output voltage is defined as the current that causes the output voltage to drop to 9% of. V, or.9 V. Rev. Page 3 of

4 ABSOLUTE MAXIMUM RATINGS Table. Parameter IN to GND OUT to GND EN to GND SS/ADJ/TRK to GND Storage Temperature Range Operating Junction Temperature Range Soldering Conditions Rating.3 V to +6 V.3 V to IN.3 V to +6 V.3 V to +6 V 6 C to + C 4 C to + C JEDEC J-STD- Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. THERMAL RESISTANCE θja is specified for the worst-case conditions, that is, a device soldered in a circuit board for surface-mount packages. Table 3. Thermal Resistance Package Type θja Unit 8-Lead MSOP 8 C/W ESD CAUTION Rev. Page 4 of

5 PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS EN IN OUT 3 SS 4 ADP7 FIXED TOP VIEW (Not to Scale) 8 GND 7 GND 6 GND GND 6-4 EN IN OUT 3 ADJ 4 ADP7 ADJUSTABLE TOP VIEW (Not to Scale) 8 GND 7 GND 6 GND GND 6- EN IN OUT 3 TRK 4 ADP76 TOP VIEW (Not to Scale) 8 GND 7 GND 6 GND GND Figure 4. 8-Lead MSOP (RM-Suffix) Figure. 8-Lead MSOP (RM-Suffix) Figure 6. 8-Lead MSOP (RM-Suffix) 6-6 Table 4. Pin Function Descriptions ADP7 Fixed Pin No. ADP7 Adjustable Pin No. ADP76 Pin No. Mnemonic Description EN Enable Input. Drive EN high to turn on the regulator; drive it low to turn off the regulator. For automatic startup, connect EN to IN. IN Regulator Input Supply. Bypass IN to GND with a. μf or greater capacitor OUT Regulated Output Voltage. Bypass OUT to GND with a. μf or greater capacitor. 4 SS Soft Start. A capacitor connected to this pin determines the soft-start time. 4 ADJ Adjust. A resistor divider from OUT to ADJ sets the output voltage. 4 TRK Track. The output will follow the voltage placed on the TRK pin. (See the Theory of Operation section for a more detailed description.), 6, 7, 8, 6, 7, 8, 6, 7, 8 GND Ground. Rev. Page of

6 TYPICAL PERFORMANCE CHARACTERISTICS V IN = 3.8 V, I OUT = ma, C IN =. μf, C OUT =. μf, T A = C, unless otherwise noted V OUT (V) I LOAD = ma I LOAD = ma I LOAD = µa I LOAD = ma I LOAD = 36mA I LOAD = ma I GND (µa) 4 4 I LOAD = ma 3 I LOAD = 36mA 3 I LOAD = ma I LOAD = ma I LOAD = ma I LOAD = µa Figure 7. Output Voltage vs. Junction Temperature Figure. Ground Current vs. Junction Temperature V OUT (V) I GND (µa) I LOAD (ma) Figure 8. Output Voltage vs. Load Current I LOAD (ma) Figure. Ground Current vs. Load Current I LOAD = µa V OUT (V) I LOAD = ma I LOAD = ma I LOAD = ma I GND (µa) 4 3 I LOAD = ma I LOAD = 36mA I LOAD = ma I LOAD = ma 3.7 I LOAD = ma I LOAD = 36mA I LOAD = ma I LOAD = µa V IN (V) V IN (V) Figure 9. Output Voltage vs. Input Voltage Figure. Ground Current vs. Input Voltage Rev. Page 6 of

7 3 3 V DROPOUT (mv) V/DIV mv/div SWITCH SIGNAL TO CHANGE OUTPUT LOAD FROM ma TO 47mA V OUT. I LOAD (ma) Figure 3. Dropout Voltage vs. Load Current 6-3 TIME (µs/div) Figure 6. Load Transient Response V OUT = 3.3V C IN =.µf C OUT =.µf V/DIV SWITCH SIGNAL TO CHANGE OUTPUT LOAD FROM ma TO 47mA V OUT (V) I LOAD = µa I LOAD = ma 3. I LOAD = ma I LOAD = ma 3. I LOAD = 36mA I LOAD = ma mv/div V OUT V OUT = 3.3V C IN = µf C OUT = µf 6-3 V IN (V) Figure 4. Output Voltage vs. Input Voltage (in Dropout) TIME (µs/div) Figure 7. Load Transient Response 7 6 I LOAD = ma I LOAD = 36mA V IN STEP FROM 4V TO V I GND (µa) 4 3 I LOAD = µa I LOAD = ma I LOAD = ma I LOAD = ma V/DIV mv/div V OUT V OUT = 3.3V C IN =.µf C OUT =.µf I LOAD = ma 6-36 V IN (V) Figure. Ground Current vs. Input Voltage (in Dropout) TIME (µs/div) Figure 8. Line Transient Response Rev. Page 7 of

8 RAMP-UP TIME (ms) C SS (nf) Figure 9. Output Voltage Ramp-Up Time vs. Soft-Start Capacitor Value 6-8 PSRR (db) V RIPPLE = mv p-p V OUT =.7V C OUT =.µf I LOAD = ma 9 k k k M M FREQUENCY (Hz) Figure. Power Supply Rejection Ratio vs. Frequency 6-3 V RIPPLE = mv p-p V OUT =.7V C OUT =.µf I LOAD = µa 3 V RIPPLE = mv p-p V OUT =.7V C OUT =.µf I LOAD = ma PSRR (db) 4 6 PSRR (db) k k k M M k k k M M 6-38 FREQUENCY (Hz) Figure. Power Supply Rejection Ratio vs. Frequency FREQUENCY (Hz) Figure. Power Supply Rejection Ratio vs. Frequency Rev. Page 8 of

9 V RIPPLE = mv p-p V OUT = 3.3V C OUT =.µf I LOAD = µa V RIPPLE = mv p-p V OUT = 3.3V C OUT =.µf I LOAD = ma 3 3 PSRR (db) 4 PSRR (db) k k k M M k k k M M 6-4 FREQUENCY (Hz) Figure 3. Power Supply Rejection Ratio vs. Frequency FREQUENCY (Hz) Figure. Power Supply Rejection Ratio vs. Frequency V RIPPLE = mv p-p V OUT = 3.3V C OUT =.µf I LOAD = ma 3 PSRR (db) k k k M M FREQUENCY (Hz) Figure 4. Power Supply Rejection Ratio vs. Frequency 6-9 Rev. Page 9 of

10 THEORY OF OPERATION The ADP7/ADP76 are low dropout, CMOS linear regulators that use an advanced, proprietary architecture to provide high power supply rejection ratio (PSRR) and excellent line and load transient response with just a small. μf ceramic output capacitor. Both devices operate from a. V to. V input rail and provide up to ma of output current. Supply current in shutdown mode is typically na. connect a small ceramic capacitor from SS to GND. Upon startup, a. μa current source charges this capacitor. The ADP7 start-up output voltage is limited by the voltage at SS, providing a smooth ramp up to the nominal output voltage. The soft-start time is calculated by TSS = VREF (CSS/ISS) () where: IN CURRENT LIMIT THERMAL PROTECT SHUTDOWN OUT TSS is the soft-start period. VREF is the.8 V reference voltage. CSS is the soft-start capacitance from SS to GND. ISS is the current sourced from SS (. μa). When the ADP7 is disabled (using EN), the soft-start capacitor is discharged to GND through an internal Ω resistor. EN REFERENCE SOFT START SS/ ADJ/ TRK EN GND Figure 6. Internal Block Diagram Internally, the ADP7/ADP76 consist of a reference, an error amplifier, a feedback voltage divider, and a PMOS pass transistor. Output current is delivered via the PMOS pass device, which is controlled by the error amplifier. The error amplifier compares the reference voltage with the feedback voltage from the output and amplifies the difference. If the feedback voltage is lower than the reference voltage, the gate of the PMOS device is pulled lower, allowing more current to pass and increasing the output voltage. If the feedback voltage is higher than the reference voltage, the gate of the PMOS device is pulled higher, allowing less current to pass and decreasing the output voltage. The ADP7 is available in two versions, one with fixed output voltage options and one with an adjustable output voltage. The fixed output voltage options are set internally to one of sixteen values between.7 V and 3.3 V, using an internal feedback network. The adjustable output voltage can be set to between.8 V and. V by an external voltage divider connected from OUT to ADJ. The fixed output version of ADP7 allows for connection of an external soft-start capacitor, which controls the output voltage ramp during startup. The ADP76 features a track pin and is available with fixed output voltage options. All devices are controlled by an enable pin (EN). 6- V/DIV V/DIV OUT V OUT = 3.3V C OUT =.µf C SS = nf I LOAD = ma TIME (4ms/DIV) Figure 7. OUT Ramp-Up with External Soft-Start Capacitor The ADP7 adjustable version and the ADP76 have no pins for soft start, so the function is switched to an internal softstart capacitor. This sets the soft-start ramp-up period to approximately 4 μs. For the worst-case output voltage of V, using the suggested. μf output capacitor, the resulting input inrush current is approximately 46 ma, which is less than the maximum ma load current. V/DIV EN 6-4 SOFT-START FUNCTION (ADP7) For applications that require a controlled startup, the ADP7 provides a programmable soft-start function. Programmable soft start is useful for reducing inrush current upon startup and for providing voltage sequencing. To implement soft start, V/DIV OUT V IN =V V OUT =.6V C OUT =.µf I LOAD = ma TIME (µs/div) Figure 8. OUT Ramp-Up with Internal Soft-Start 6-4 Rev. Page of

11 ADJUSTABLE OUTPUT VOLTAGE (ADP7 ADJUSTABLE) The ADP7 adjustable version can have its output voltage set over a.8 V to. V range. The output voltage is set by connecting a resistive voltage divider from OUT to ADJ. The output voltage is calculated using the equation VOUT =.8 V ( + R/R) () ENABLE FEATURE The ADP7/ADP76 use the EN pin to enable and disable the OUT pin under normal operating conditions. As shown in Figure 3, when a rising voltage on EN crosses the active threshold, OUT turns on. When a falling voltage on EN crosses the inactive threshold, OUT turns off. where: R is the resistor from OUT to ADJ. R is the resistor from ADJ to GND. The maximum bias current into ADJ is na, so for less than.% error due to the bias current, use values less than 6 kω for R. TRACK MODE (ADP76) The ADP76 includes a tracking mode feature. As shown in Figure 9, if the voltage applied at the TRK pin is less than the nominal output voltage, OUT is equal to the voltage at TRK. Otherwise, OUT regulates to its nominal output value. 4 V OUT (V) 3 CH, CH (mv/div) EN OUT V OUT =.6V C OUT =.µf I LOAD = ma TIME (ms/div) Figure 3. ADP7 Adjustable Typical EN Pin Operation As can be seen, the EN pin has hysteresis built in. This prevents on/off oscillations that can occur due to noise on the EN pin as it passes through the threshold points. The EN pin active/inactive thresholds are derived from the IN voltage. Therefore, these thresholds vary with changing input voltage. Figure 3 shows typical EN active/inactive thresholds when the input voltage varies from. V to. V V TRK (V) Figure 9. ADP76 Output Voltage vs. Tracking Voltage with Nominal Output Voltage Set to 3 V For example, consider an ADP76 with a nominal output voltage of 3 V. If the voltage applied to its TRK pin is greater than 3 V, OUT maintains a nominal output voltage of 3 V. If the voltage applied to TRK is reduced below 3 V, OUT tracks this voltage. OUT can track the TRK pin voltage from the nominal value all the way down to V. A voltage divider is present from TRK to the error amplifier input with a divider ratio equal to the divider from OUT to the error amplifier. This sets the output voltage equal to the tracking voltage. Both divider ratios are set by post-package trim, depending on the desired output voltage TYPICAL EN THRESHOLDS (V). EN ACTIVE. HYSTERESIS EN INACTIVE V IN (V) Figure 3. Typical EN Pin Thresholds vs. Input Voltage 6-44 Rev. Page of

12 APPLICATION INFORMATION CAPACITOR SELECTION Output Capacitor The ADP7/ADP76 are designed for operation with small, space-saving ceramic capacitors, but they will function with most commonly used capacitors as long as care is taken about the effective series resistance (ESR) value. The ESR of the output capacitor affects stability of the LDO control loop. A minimum of. μf capacitance with an ESR of mω or less is recommended to ensure stability of the ADP7/ADP76. Transient response to changes in load current is also affected by output capacitance. Using a larger value of output capacitance improves the transient response of the ADP7/ADP76 to large changes in load current. Figure 3 and Figure 33 show the transient responses for output capacitance values of. μf and μf. V/DIV SWITCH SIGNAL TO CHANGE OUTPUT LOAD FROM ma TO 47mA Input and Output Capacitor Properties Any good quality ceramic capacitors can be used with the ADP7/ADP76, as long as they meet the minimum capacitance and maximum ESR requirements. Ceramic capacitors are manufactured with a variety of dielectrics, each with different behavior over temperature and applied voltage. Capacitors must have a dielectric adequate to ensure the minimum capacitance over the necessary temperature range and dc bias conditions. XR or X7R dielectrics with a voltage rating of 6.3 V or V are recommended. YV and ZU dielectrics are not recommended, due to their poor temperature and dc bias characteristics. CURRENT LIMIT AND THERMAL OVERLOAD PROTECTION The ADP7/ADP76 are protected against damage due to excessive power dissipation by current and thermal overload protection circuits. The ADP7/ADP76 are designed to current limit when the output load reaches 7 ma (typical). When the output load exceeds 7 ma, the output voltage is reduced to maintain a constant current limit. mv/div V OUT TIME (µs/div) Figure 3. Output Transient Response V OUT = 3.3V C IN =.µf C OUT =.µf 6-4 Thermal overload protection is included, which limits the junction temperature to a maximum of C (typical). Under extreme conditions (that is, high ambient temperature and power dissipation) when the junction temperature starts to rise above C, the output is turned off, reducing the output current to zero. When the junction temperature drops below 3 C, the output is turned on again and output current is restored to its nominal value. V/DIV mv/div SWITCH SIGNAL TO CHANGE OUTPUT LOAD FROM ma TO 47mA V OUT TIME (µs/div) Figure 33. Output Transient Response V OUT = 3.3V C IN = µf C OUT = µf Input Bypass Capacitor Connecting a. μf capacitor from the IN pin to GND reduces the circuit sensitivity to printed circuit board (PCB) layout, especially when long input traces, or high source impedance, is encountered. If greater than. μf of output capacitance is required, the input capacitor should be increased to match it Consider the case where a hard short from OUT to ground occurs. At first the ADP7/ADP76 will current limit, so that only 7 ma is conducted into the short. If self heating of the junction is great enough to cause its temperature to rise above C, thermal shutdown will activate, turning off the output and reducing the output current to zero. As the junction temperature cools and drops below 3 C, the output turns on and conducts 7 ma into the short, again causing the junction temperature to rise above C. This thermal oscillation between 3 C and C causes a current oscillation between 7 ma and ma that continues as long as the short remains at the output. Current and thermal limit protections are intended to protect the device against accidental overload conditions. For reliable operation, device power dissipation should be externally limited so junction temperatures do not exceed C. THERMAL CONSIDERATIONS To guarantee reliable operation, the junction temperature of the ADP7/ADP76 should not exceed C. To ensure the junction temperature stays below this maximum value, the user Rev. Page of

13 should be aware of the parameters that contribute to junction temperature changes. These parameters include ambient temperature, power dissipation in the power device, and thermal resistances between the junction and ambient air (θja). The θja number is dependent on the package assembly compounds used and the amount of copper to which the GND pins of the package are soldered to on the PCB. Table shows typical θja values of the 8-lead thermally enhanced MSOP package for various PCB copper sizes Table. Copper Size (mm ) θja ( C/W) Device soldered to minimum size pin traces. The junction temperature of the ADP7/ADP76 can be calculated from the following equation: where: TJ = TA + (PD θja) (3) TA is the ambient temperature. PD is the power dissipation in the die, given by where: PD = [(VIN VOUT) ILOAD] + (VIN IGND) (4) ILOAD is the load current. IGND is ground current. VIN and VOUT are input and output voltages, respectively. Power dissipation due to ground current is quite small and can be ignored. Therefore, the junction temperature equation simplifies to the following: TJ = TA + {[(VIN VOUT) ILOAD] θja} () As shown in Equation, for a given ambient temperature, input to output voltage differential, and continuous load current, there exists a minimum copper size requirement for the PCB to ensure the junction temperature does not rise above C. The following figures show junction temperature calculations for different ambient temperatures, load currents, VIN to VOUT differentials, and areas of PCB copper. ma ma ma ma ma ma 36mA (LOAD CURRENT) Figure mm of PCB Copper, TA = C ma ma ma ma ma ma 36mA (LOAD CURRENT) Figure 3. 3 mm of PCB Copper, TA = C ma ma ma ma ma ma 36mA (LOAD CURRENT) 3 4 Figure 36. mm of PCB Copper, TA = C Rev. Page 3 of

14 ma ma ma ma ma ma 36mA (LOAD CURRENT) ma ma ma ma ma ma 36mA (LOAD CURRENT) Figure 37. mm of PCB Copper, TA = C Figure 4. mm of PCB Copper, TA = C ma ma ma ma ma ma 36mA (LOAD CURRENT) ma ma ma ma ma ma 36mA (LOAD CURRENT) Figure mm of PCB Copper, TA = C Figure 4. mm of PCB Copper, TA = C ma ma ma ma ma ma 36mA (LOAD CURRENT) ma ma ma ma ma ma 36mA (LOAD CURRENT) Figure mm of PCB Copper, TA = C Figure 4. 7 mm of PCB Copper, TA = 8 C Rev. Page 4 of

15 ma ma ma ma ma 36mA 3 4 ma (LOAD CURRENT) Figure mm of PCB Copper, TA = 8 C 6-3 PRINTED CIRCUIT BOARD LAYOUT CONSIDERATIONS The 8-lead MSOP package has the four GND pins fused together internally, which enhances its thermal characteristics. Heat dissipation from the package is increased by connecting as much copper as possible to the four GND pins of the ADP7/ ADP76. From Table it can be seen that a point of diminishing returns eventually is reached, beyond which an increase in the copper size does not yield additional heat dissipation benefits. Figure 46 shows a typical layout for the ADP7/ADP76. The four GND pins are connected to a large copper pad. If a second layer is available, multiple vias can be used to connect them, increasing the overall copper area. The input capacitor should be placed as close as possible to the IN and GND pins. The output capacitor should be placed as close as possible to the OUT and GND pins. 63 or 4 size capacitors and resistors should be used to achieve the smallest possible footprint solution on boards where area is limited. 8 6 GND (TOP) 4 ma ma ma ma ma ma 36mA (LOAD CURRENT) C ADP7/ ADP76 C Figure 44. mm of PCB Copper, TA = 8 C 4 IN OUT R 8 6 EN C3 R 4 GND (BOTTOM) 6-48 ma ma ma ma ma ma 36mA (LOAD CURRENT) Figure 46. Example PCB Layout Figure 4. mm of PCB Copper, TA = 8 C Rev. Page of

16 OUTLINE DIMENSIONS PIN.6 BSC.38. COPLANARITY.. MAX SEATING PLANE COMPLIANT TO JEDEC STANDARDS MO-87-AA Figure Lead Mini Small Outline Package [MSOP] (RM-8) Dimensions show in millimeters Rev. Page 6 of

17 ORDERING GUIDE Model Temperature Range Output Voltage (V) Package Description Package Option ADP7ARMZ-.7R7 4 C to + C.7 8-Lead MSOP RM-8 L9 ADP7ARMZ-.8-R7 4 C to + C.8 8-Lead MSOP RM-8 LA ADP7ARMZ-.8R7 4 C to + C.8 8-Lead MSOP RM-8 LC ADP7ARMZ-.9-R7 4 C to + C.9 8-Lead MSOP RM-8 LD ADP7ARMZ-.9R7 4 C to + C.9 8-Lead MSOP RM-8 LE ADP7ARMZ-.-R7 4 C to + C. 8-Lead MSOP RM-8 LF ADP7ARMZ-.R7 4 C to + C. 8-Lead MSOP RM-8 LG ADP7ARMZ-.-R7 4 C to + C. 8-Lead MSOP RM-8 LH ADP7ARMZ-.R7 4 C to + C. 8-Lead MSOP RM-8 LJ ADP7ARMZ-.-R7 4 C to + C. 8-Lead MSOP RM-8 LK ADP7ARMZ-.3-R7 4 C to + C.3 8-Lead MSOP RM-8 L3 ADP7ARMZ-.-R7 4 C to + C. 8-Lead MSOP RM-8 LL ADP7ARMZ-.8-R7 4 C to + C.8 8-Lead MSOP RM-8 L3R ADP7ARMZ-.-R7 4 C to + C. 8-Lead MSOP RM-8 L33 ADP7ARMZ-3.-R7 4 C to + C 3. 8-Lead MSOP RM-8 L34 ADP7ARMZ-3.3-R7 4 C to + C Lead MSOP RM-8 L3 ADP7ARMZ-R7 4 C to + C.8 to. 8-Lead MSOP RM-8 L3K ADP76ARMZ-.7R7 4 C to + C.7 8-Lead MSOP RM-8 LN ADP76ARMZ-.8-R7 4 C to + C.8 8-Lead MSOP RM-8 LP ADP76ARMZ-.8R7 4 C to + C.8 8-Lead MSOP RM-8 LQ ADP76ARMZ-.9-R7 4 C to + C.9 8-Lead MSOP RM-8 LR ADP76ARMZ-.9R7 4 C to + C.9 8-Lead MSOP RM-8 LS ADP76ARMZ-.-R7 4 C to + C. 8-Lead MSOP RM-8 LT ADP76ARMZ-.R7 4 C to + C. 8-Lead MSOP RM-8 L3D ADP76ARMZ-.-R7 4 C to + C. 8-Lead MSOP RM-8 LU ADP76ARMZ-.R7 4 C to + C. 8-Lead MSOP RM-8 L V ADP76ARMZ-.-R7 4 C to + C. 8-Lead MSOP RM-8 LW ADP76ARMZ-.3-R7 4 C to + C.3 8-Lead MSOP RM-8 LX ADP76ARMZ-.-R7 4 C to + C. 8-Lead MSOP RM-8 LY ADP76ARMZ-.8-R7 4 C to + C.8 8-Lead MSOP RM-8 L3 ADP76ARMZ-.-R7 4 C to + C. 8-Lead MSOP RM-8 L37 ADP76ARMZ-3.-R7 4 C to + C 3. 8-Lead MSOP RM-8 L38 ADP76ARMZ-3.3-R7 4 C to + C Lead MSOP RM-8 L39 Z = Pb-free part. Branding Rev. Page 7 of

18 NOTES Rev. Page 8 of

19 NOTES Rev. Page 9 of

20 NOTES 6 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D6--9/6() Rev. Page of