APPLICATION OF SLIDING MODE CONTROL TO SWITCH-MODE POWER SUPPLIES G. SPIAZZI. and P. MATTAVELLI, L. ROSSETTO, L. MALESANI

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1 APPIATION OF SIDING MODE ONTRO TO SWITHMODE POWER SUPPIES G. SPIAZZI Dept. of Electroncs and Informatcs and P. MATTAVEI,. ROSSETTO,. MAESANI Dept. of Electrcal Engneerng Unversty of Padova Va Gradengo 6/a 353 Padova ITAY Tel:(39) Fax: Swtchmode power spples represent a partclar class of varable strctre systems (VSS). Ths, they can take advantage of nonlnear control technqes developed for ths class of systems. In ths paper the so called sldng mode control s revewed and ts applcaton to swtchmode power spples s dscssed. Sldng mode control extends the propertes of hysteress control to mltvarable envronments, resltng n stablty even for large spply and load varatons, good dynamc response and smple mplementaton. Applcaton to dcdc converters, as well as rectfers and nverters, s analyzed and provsons to overcome the nherent drawbacks of sldng mode control,.e. varable swtchng freqency and possble steadystate errors, are descrbed. Expermental reslts are also reported, whch allow a comparson between the sldng mode approach and other standard control technqes, e.g. crrentmode control, showng ts effectveness.. Introdcton ontrol of swtchmode power spples can be dffclt, de to ther ntrnsc non lnearty. In fact, control shold ensre system stablty n any operatng condton and good statc and dynamc performances n terms of rejecton of npt voltage dstrbances (adossceptblty) and effects of load changes (otpt mpedance). These characterstcs, of corse, shold be mantaned n spte of large npt voltage, otpt crrent, and even parameter varatons (robstness). A classcal control approach reles on the knowledge of a lnear smallsgnal model of the system to develop a stable reglator. The desgn procedre s well known, bt s generally not easy to accont for the wde varaton of system parameters, becase of the strong dependence of smallsgnal model parameters on the converter operatng pont. Ths aspect becomes even more problematc n rectfers and/or nverters n whch the operatng pont moves contnosly, followng the perodc npt/otpt voltage varatons. Mltloop control technqes, lke crrentmode control, have greatly mproved power converters behavor bt the control desgn remans dffclt for hghorder topologes, lke those based on k and Sepc schemes.,3 A dfferent approach, whch comples wth the nonlnear natre of swtchmode power spples, s represented by the sldng mode control, whch s derved from the varable strctre systems (VSS) theory. 4,5 Ths control technqe offers several advantages: stablty even for large spply and load varatons, robstness, good dynamc response and smple mplementaton. Its capabltes emerge especally n applcaton to hghorder converters, yeldng mproved performances as compared to classcal control technqes. In ths paper, the sldng mode control s revewed and ts applcatons to swtchng power spply are nvestgated. Expermental reslts of dfferent converter strctres demonstrate the speror performances of ths nonlnear control technqe as compared to standard control approaches.. ontrol of Varable Strctre Systems: The Sldng Mode Approach VSS are systems whose physcal strctre s changed ntentonally drng the tme n accordance wth a preset strctre control law. The nstants at whch the changng of the strctre occr are determned by the crrent state of the system.

2 From ths pont of vew, swtchmode power spples represent a partclar class of VSS, snce ther strctre s perodcally changed by the acton of controlled swtches and dodes. 6.. An example: bck converter To the prpose of explanaton, consder the smple bck converter shown n Fg.. 7 In the contnos condcton mode operaton, the converter strctre perodcally changes by the acton of the controlled swtch S, gvng rse to the two sbstrctres shown n Fg.. onsderng as state varables the otpt voltage error δ o and ts dervatve, the system behavor can be descrbed by the followng eqatons x = x () x x * x = ( U σ Uo ). R n whch σ s a dscontnos varable eqal to when the swtch s ON and zero when the swtch s OFF, and U o * s the otpt voltage reference. The phase trajectores correspondng to dfferent vales of control varable σ are shown n Fg.. In both cases, the system evolton s a damped oscllaton whch starts from a pont representng the system ntal condtons and reaches an eqlbrm pont gven by x =U U o * and x = for the case σ=, and gven by x = U o * and x = for the case σ=. Note, however, that n ths latter condton, the ndctor crrent cannot become negatve de to the presence of the freewheelng dode. Ths, when ths crrent reaches zero, the otpt capactor s dscharged to zero by the load resstance only, gvng rse to a lnear phase trajectory. U S D U o R U U o R U o R Swtch ON Swtch OFF a) b) Fg. DD bck converter; a) sbtopology drng swtch ontme, b) sbtopology drng swtch offtme. x σ= σ= U o * Fg. Phase trajectores correspondng to eq. () for dfferent ntal condtons. x

3 .. Sldng mode control et s defne the followng fncton ψ = x τ x, () whch s a lnear combnaton of the two state varables. In the phase plane, eqaton ψ= represents a lne, called sldng lne, passng throgh the orgn (whch s the fnal eqlbrm pont for the system) wth a slope eqal to /τ. We now defne the followng control strategy f ψ > β σ = (3) f ψ < β σ =, where β defnes a stable hysteress band. In ths way, the phase plane s dvded n two regons separated by the sldng lne, each assocated to one of the two sbtopologes defned by the swtch stats σ. et s sppose that the system stats s n P, as shown n Fg.3. Snce we are n the regon ψ<β, the swtch s close and the moton occrs along a phase trajectory correspondng to σ=. When the system stats crosses the lne ψ=β, accordng to (3), the swtch s trned off and the system stats follows a phase trajectory correspondng to σ=. Observng that the phase trajectores, n proxmty of the sldng lne, are drected toward the lne tself, the resltng moton s made by contnos commtatons arond the sldng lne, so that the system stats s drven to the fnal eqlbrm pont. x ψ= β σ= P U* σ= U U* x o o = Fg. 3 Sldng moton for the bck converter. ψ=β ψ= From ths example, n the hypothess of a stable small vale of β, two mportant conclsons arse I: when the system s n the sldng mode, ts evolton s ndependent of the crct parameters. It depends only on the sldng lne chosen. In the example shown n Fg.3 the dynamc s of the frst order wth a tme constant eqal to τ. II: f N s the order of the orgnal system, the dynamc of the controlled system n sldng mode has order N, snce the state varables are constraned by the eqaton ψ=. Note that the swtchng freqency s determned by the ampltde of the hysteress band β. The potentaltes of ths control technqe n the applcaton to swtchmode power spples are now evdent: t explots the ntrnsc nonlnear natre of these converters and t s able to provde dynamc behavors that are dfferent from that of the sbstrctres composng the system, and correspond to that of a redced order system..3. ondtons for sldng moton In the smple case of the secondorder system consdered n the prevos secton, sldng mode control desgn reqres only selecton of parameter τ. Selecton, mst be done n order to ensre the followng three constrants () the httng condton, whch reqres that the system trajectores cross the sldng lne rrespectve of ther startng pont n the phase plane; () the exstence condton, whch reqres that the system trajectores near the sldng lne (n both regons) are drected toward the lne tself; 3

4 () the stablty condton of the system moton on the sldng lne (.e. the moton mst be toward the eqlbrm pont). Another mportant consderaton concernng physcal systems s that not all ponts n the phase plane are reachable. In the prevos example, snce ndctor crrent and otpt voltage are always non negatve, the regons nder the lne x = (x U o * )/R and to the left of lne x = U o * are left ot. 3. Applcaton of Sldng Mode ontrol to DD onverters 3.. Prncple scheme A basc sldng mode control scheme of dcdc converters s shown n Fg.4. et U and N be npt and otpt voltages, respectvely, and j (=r, j=rn) the nternal state varables of the converter (ndctor crrents and capactor voltages), and N the system order. Accordng to the theory, all state varables are sensed, and the correspondng errors x (defned by dfference to the steadystate vales) are mltpled by proper gans K and added together to form the sldng fncton ψ. Then, hysteretc block H control the swtch so as to mantan fncton ψ near to zero, ths we can wrte N ψ = K x = K x =. (4) T where K=[K, K,.., K N ] T s the vector of sldng coeffcents ( T means transposton). Ths eqaton represents a hyperplane n the phase space passng throgh the orgn (note that () s a partclar case of (4) for N=, K =τ / and K =). Ths general scheme, althogh nterestng n theory, s not practcal. In fact, a control approach representng an effectve alternatve to standard control technqes mst have the followng characterstcs () smple desgn and mplementaton even for hghorder converter topologes, () constant swtchng freqency, () no steadystate errors, (v) possblty to mplement a crrent lmtaton, K Kr K K x x x x r r * * * * r r N r r N r N N K N U N x N dc/dc converter S * N σ H ψ Fg. 4 Sldng mode control of dcdc converters: prncple scheme. whch are not satsfed n the scheme of Fg.4. In fact, for forth order converters lke k and Sepc, t reqres sensng of for state varables, whch s not acceptable from practcal pont of vew. Moreover, the hysteretc operaton cases a varable swtchng freqency, whle steadystate errors can arse from the fact that, n a practcal mplementaton, all state varable errors, except for the otpt voltage, are compted sng hghpass flters, 8 ths they have zero average vale. If sldng fncton ψ, de to the hysteretc control, has nonzero average vale, a steadystate otpt voltage error necessarly appears. astly, swtch crrent lmtaton s not mplemented n the scheme shown. As far as control complexty s concerned, t has been proved that excellent performances can be obtaned even wth redcedorder controllers,.e. by sensng only one ndctor crrent (the only ndctor crrent n nd order schemes lke 4

5 bck, boost and bckboost, and the npt ndctor crrent for 4 th order schemes, lke k and Sepc) and the otpt voltage. 8 Ths corresponds to choose zero vale for some coeffcents K n (4). 3.. Practcal sldng mode controller of dcdc converters The generalprpose sldng mode controller scheme s shown n Fg.5. 9 As mentoned above, only one ndctor crrent and the otpt voltage are sensed Elmnaton of steadystate errors As already mentoned, crrent error x s compted by means of a hghpass flter, whle otpt voltage error x s obtaned by comparson wth reference sgnal U o *. A PI acton s ntrodced on sldng fncton ψ n order to elmnate ts dc vale, ths redcng the dc vale of the otpt voltage error to zero. In practce, the ntegral acton of ths reglator s enabled only when the system s on the sldng srface; n ths way, the system behavor drng large transents, when ψ can have vales far from zero, s not affected, ths mantanng the fast response of sldng mode control. H.P.F. x K Elmnaton of steadystate error ψ PI ψ PI U o x K dc/dc converter S U * o σ H ψf I lm w Trgger S rrent mtaton Synchronzaton Fg.5 General prpose sldng mode controller scheme 3... Swtchng freqency stablzaton In order to provde stablzaton of the swtchng freqency, a proper ramp sgnal w at the desred freqency f w s added to fncton ψ. If, n the steady state, the ampltde of w s predomnant n ψ f, a commtaton occrs at any cycle of w, ths makng the swtchng freqency eqal to f w. Ths also allows converter synchronzaton to an external trgger. Instead, nder dynamc condtons, error terms x and x ncrease, w s overrdden, and the system retans the excellent dynamc response of the sldng mode. Note that an alternatve way to obtan constant swtchng freqency s to modlate the hysteress band ampltde, e.g. by means of a phase locked loop rrent lmtaton The crrent lmter shown n Fg.5 overrdes sldng mode control when the ndctor crrent exceeds I lm. If ths happens, the hysteretc control mantans ths crrent arond the vale I lm. Ths corresponds to perform a sldng mode on the ndctor crrent only. It s mportant to note that the controller desgn reqres selecton of two parameters, the tme constant of the hghpass flter sed to compte the ndctor crrent error, and the rato K / K of the sldng coeffcents (ther absolte vale s not mportant as long as eq. (4) s verfed). However, the general theory does not take nto accont the addtonal 5

6 state varable of the flter. In order to overcome ths problem, t s possble to derve a smallsgnal model of the sldng mode control, whch takes nto accont also the flter tme constant, so that the desgn parameters can be chosen from smallsgnal analyss as n crrentmode control. 3.3 Example of desgn procedre: Sepc converter The Sepc converter topology s reported n Fg.6. It s a forthorder system wth the same voltage converton rato as flyback converter. ontroller strctre follows the general scheme of Fg.5. In order to gve desgn crtera for selecton of sldng mode controller parameters, the system mst be represented n a stable mathematcal form. 9, To ths prpose, the converter eqatons related to the two sbtopologes correspondng to the swtch stats are wrtten as v= Aonv Fon swtch on, (5.a) v= Aoff v Foff swtch off, (5.b) where v=[,,, ] T s the state varable vector. Fg. 6 Dc/dc Sepc converter. These eqatons are combned n the followng form (VSS) v= Av Bσ F, (6.a) where σ s the dscontnos varable correspondng to the swtch stats and matrces A, B, F are gven by A = A off, F = F off, (6.b) B = ( A on A off ) v ( Fon Foff ). (6.c) It s convenent to wrte the system eqatons (6.a) n terms of error state varables x x = v V *, (7) where V * =[I *, I *, U *, U * ] T s the vector of state varable references. Accordngly, (6.a) becomes x = Ax Bσ G, (8) where G=AV * F Exstence condton Assmng that the swtch s kept on (σ=) when ψ s negatve and off (σ=) when ψ s postve, we may express the exstence condton n the form ψ T T = K Ax K G < < ψ < ξ t (9) ψ T T T = K Ax K B K G> ξ < ψ < t, where ξ s an arbtrary small postve qantty. 4,5 Note that (9) smply tell s that when the swtch s off fncton ψ mst decrease, whle when t s on ψ mst ncrease. Ineqaltes (9) are sefl only f state varable errors x are bonded, otherwse (9) mst be analyzed nder smallsgnal assmpton. In ths latter case, satsfyng (9) means to enforce exstence condton n a small volme arond the operatng pont and ths s eqvalent to ensre stablty condton as demonstrated n reference Httng condton If sldng mode exsts, a sffcent httng condton s K T A4 where A 4 s the forth colmn of matrx A. 4,5 Ths yelds the followng constran (.a) 6

7 K K n R (.b) Stablty condton Ths sse mst be addressed takng nto accont the effect of the tme constant τ HPF of the hghpass flter needed to extract the ndctor crrent error. To ths prpose the smallsgnal analyss carred ot n reference allows to derve precse constrants on controller parameters for the three basc converter strctres (bck, boost, bckboost). For hgher order converters, lke Sepc, the approach otlned n reference s valable to observe the effect of controller parameter varatons on the system dynamc. For example, Fg.7 shows the root locs of the closedloop Sepc converter resltng from dfferent vales of the flter tme constant. As we can see, too low vales case real poles P and P to become complex or even to cross the magnary axs PI compensator As already mentoned n paragraph 3.., the ntegral acton of PI reglator on varable ψ s enabled only when the system s on the sldng srface. Snce ts am s to cancel the steadystate error on the otpt voltage, ts tme constant τ PI can be chosen bg enogh not to affect the system stablty. Moreover, t does not affect system dynamc drng large transents Ramp sgnal w As far as the ramp sgnal w s concerned, ts ampltde s selected by takng nto accont the slope of fncton ψ PI and the hysteress band ampltde, so that fncton ψ f hts the lower part of the hysteress band at the end of the ramp, casng the commtaton. The am of ths external ramp s to force a constant swtchng freqency n spte of dtycycle varatons (.e. npt and/or otpt voltage changes) and load varatons. As an example, Fg.8 shows smlated waveforms of ramp w, and ψ PI, ψ f sgnals. From waveform analyses, we can fnd that the slope S e of the external ramp mst satsfy the followng neqalty B Se > Sr δ T, () s n whch B represent the hysteress ampltde and S r s the slope of fncton ψ PI drng swtch ontme. Ths latter, s gven by U I o () S r = K K K p where K p s the gan of the proportonal part of PI reglator. It s worthy to note that, n the presence of an external ramp, sgnal ψ PI mst have a non zero average vale n order to accomodate for the desred converter dtycycle (see Fg.8). Imag P 3 P P Real P 4 Fg. 7 Root locs of closedloop system for varaton of lowpass flter tme constant of the Sepc converter. 7

8 Fg. 8 smlated waveforms of ramp w, and ψ PI, ψ f sgnals. 4. Applcaton of Sldng Mode ontrol to AD onverters Wth the ever ncreasng demand for power qalty from the tlty grd, power factor correcton (PF) s becomng a basc reqrement for swtchmode power spples. Hgh qalty rectfers are sed to nterface ac lne and dc load and appear to the lne as a resstve load, so achevng nty power factor even n presence of dstorted lne voltage. An nherent lmtaton of these converters s ther slow dynamc response. In fact, snsodal npt crrent means large npt power flctatons at twce the lne freqency, resltng n lowfreqency otpt voltage rpple, whch cannot be corrected by the control, otherwse npt crrent waveform s affected. Bg otpt flter capactors mst therefore be adopted n order to lmt the voltage rpple, whch frther redces the bandwdth of the voltage control loop. Accordngly, these converters are normally sed as prereglators, ther otpt performances beng below the reqrements of standard power spples. In practce, ths bandwdth lmtaton can be overcome f some npt crrent dstorton s accepted (wthn the lmts posed by the standards, e.g. IE 555), provded that ths reslts n smaller power flctaton. From ths pont of vew, sldng mode control s very powerfl, snce t can provde an optmal tradeoff between the needs for ncreasng response speed and redcng npt crrent dstorton and otpt voltage rpple. A hghqalty rectfer based on k topology wth sldng mode control s shown n Fg.9. r N N R Swtch rrent mter σ I IM Sldng Mode ontroller ψ * x U* x K K rrent Reference Adjstment I * R Fg. 9 Hghqalty rectfer based on k converter wth sldng mode control. In ths scheme, ncldng an nslaton transformer, reference vales ( *, U o * ) are reqred for both state varables. However, whle U o * s an npt varable for the control, * mst be evalated as a fncton of voltage error x. For ths 8

9 prpose, smlarly to the case of crrentmode control, an error amplfer R s sed to determne reference ampltde I *, whch s then mltpled by rectfed voltage sgnal R to obtan crrent reference *. As sal, the band of reglator R s kept well below the lne freqency to avod npt crrent dstorton. However, drng transent condtons, f the system remans n sldng mode, the large otpt voltage error forces, va block K, a large crrent error, casng a temporary lost of the snsodal shape of npt crrent. In ths way, a fast otpt voltage recovery to nomnal condtons s obtaned. If coeffcents K and K are chosen properly, we gan addtonal advantages. Frst, n the steadystate the controller tends to mantan the mnmm errors x and x whch are consstent wth energy balance condton. Second, the vale of the coeffcents also determnes the relatve ampltdes of voltage and crrent errors. Ths means that varyng the rato K /K we can choose the best trade off between npt crrent dstorton and fast otpt voltage response. The npt crrent lmter s mplemented n the sal manner as for dcdc converter controllers. 5. Applcaton of Sldng Mode ontrol to SnglePhase DA onverters The ncreasng demand n the performance of ac power spples n terms of tght voltage reglaton, low harmonc content, wde range of load varaton, overload protecton and fast response, reqres the se of hghfreqency PWM nverters. Moreover a robst control technqe s needed n order to ensre proper operaton even wth reactve and/or nonlnear loads. For these reasons sldng mode control seems stable also for these converters. 37 The classcal snglephase ac power spply s shown n Fg.. It ncldes a brdge nverter feedng the nslatng transformer and a flter made p by smoothng ndctor and otpt capactor. As t can be seen, ths topology resemble that of a bck converter except for the flter npt voltage, whch can be twoor threelevel dependng on the nverter modlaton strategy, and for the presence of the nslatng transformer. Ths, the mplementaton of the sldng mode control follows the gdelnes gven for dcdc converters, wth the mportant dfference represented by the snsodal varaton of voltage and crrent references. Ths fact nflences the exstence condtons of the sldng mode, becase the rate of change of these references mst be taken nto accont. Moreover, n order to mprove the steadystate performance, an exact crrent reference s needed, whch can be accomplshed by drect measrement of the load crrent 35 or by a stable observer. 6 It s mportant to note that the presence of an nslatng transformer modfes the system phase trajectores ntrodcng a term lnearly dependent on tme, whch cases ther translaton n the phase plane. Ths phenomenon does not modfy apprecably the shape of the phase trajectores as long as the translaton s mch slower than the oscllatory term. E N N oad Fg. Snglephase ac power spply scheme. 6. Expermental Reslts In ths secton we report some expermental reslts llstratng the performance of sldng mode control appled to swtchmode power spples. A frst applcaton consdered s a dcdc converter based on the Sepc topology shown n Fg.6, whose parameters are lsted n table. In order to compare the performance of sldng mode control wth standard control technqe, a crrent mode control was also mplemented. Ths latter reqres a R dampng network across energy transfer capactor n order to stablze the crrent loop. Fg. reports the otpt voltage and npt crrent behavor n the case of load step varaton from fllload to noload and vceversa (the dampng network was mantaned for both controllers). Sldng mode control shows better performances, both n terms of overshoot and response speed. Moreover, t remans stable even wthot the dampng network and n presence of wde npt voltage varatons. 9

10 Table. Parameter vales of the D/D Sepc converter. U = 5V U = V f s = 5kHz n =.5 R = Ω =.7mH =.38mH = 6.8µF = µf K =. K = τ HPF =.5ms τ PI =.5ms As an example of what we can obtan n terms of response speed of an acdc converter wth power factor correcton, the scheme of Fg.9 was mplemented and tested. Its parameters are reported n table. Table. Parameter vales of the A/D converter of Fg.9. U = V peak U o = 5V f s = 6kHz N /N = R = 5Ω = 4mH = 4µH =.µf = µf o = µf V 9 a) A V 9 b) A ms Fg. Otpt voltage and npt crrent waveforms of the Sepc converter for load step varaton: a) sldng mode control, b) crrent mode control. Fg. shows lne crrent and otpt voltage at startp: the crrent dstorton drng the transent, cased by the hgh error voltage x, s the prce for the faster otpt dynamc. In the steady state, however, a good crrent waveform s acheved.

11 Fg. ne crrent and otpt voltage of the A/D converter at startp. astly, a prototype of the ac power spply shown n Fg. was blt and expermentally tested wth the parameters lsted n table 3. In Fg.3 the startp process s llstrated. A step voltage reference s appled, and the transent s very fast and smooth, wth no need of softstart provsons. Fg.4 reports the converter behavor n overload condton, for an ndctve load. The crrent lmt acts at every half perod, bt the recovery transent remans well lmted, ths allowng qasreglar operaton. Table 3. Parameter vales of the D/A converter of Fg.. E = 5V U o = 9V rms f o = 5Hz N /N = /. P = 5kVA = 3.mH µ =.7H o = 48.6µF f s = khz Fg. 3 Top to bottom: otpt voltage (5V/dv., 4ms/dv.), nverter crrent (5A/dv.). Fg. 4 Top to bottom: otpt voltage (5V/dv., 4ms/dv.), nverter crrent (5A/dv.).

12 7. onclsons ontrol technqes of varable strctre systems fnd a natral applcaton to swtchmode power spples. In partclar, the sldng mode control represents a powerfl tool to enhance performances of power converters. Sldng mode control s able to ensre system stablty even for large spply and load varatons, good dynamc response and smple mplementaton, even for hghorder converters. These featres make ths control technqe a vald alternatve to standard control approaches lke crrentmode control. Applcaton to dcdc converters, as well as rectfers and nverters, s analyzed and provsons to overcome the nherent drawbacks of sldng mode control,.e. varable swtchng freqency and possble steadystate errors, are descrbed. Expermental reslts are also reported, showng the effectveness of ths control technqe. Acknowledgements The athors wold lke to thank Mr. R. Sartorello for hs spport n the expermental actvtes. References. R. D Mddlebrook, S. k, Advances n SwtchedMode Power onverson, TESAco, Vol. I and II, Pasadna (A), 983, pp R.Redl, N.Sokal, "rrentmode control, fve dfferent types, sed wth the three basc classes of power converters: smallsgnal A and largesgnal D characterzaton, stablty reqrements, and mplementaton of practcal crcts", IEEEPES, 985, pp R. B. Rdley, B. H. ho, F.. Y. ee, "Analyss and nterpretaton of loop gans of mltloopcontrolled swtchng reglators", IEEE Transacton on Power Electroncs, vol.3, n. 4, October 988, pp V. I. Utkn, Sldng Mode and Ther Applcaton n Varable Strctre Systems, MIR Pblscher, Moscow, 974 (Englsh Translaton 978). 5. U. Itks, ontrol Systems of Varable Strctre, John Wley & Sons, New York, R.Venkataramanan, A.Sabanovc and S.k: "Sldngmode control of DtoD converters," IEON onf. Rec, F.Blalovc, O.Msc and A.Sabanovc: "Bck converter reglator operatng n the sldng mode," PI onf. Rec., 983, pp Malesan,.Rossetto, G.Spazz, P.Tent, "Performance optmzaton of k converters by sldngmode control," n Appled Power Electroncs onference Proc. (APE), 99, pp P. Mattavell,. Rossetto, G. Spazz, P. Tent, "Generalprpose sldngmode controller for D/D converter applcatons", Proc. of Power Electroncs Specalsts onf. (PES), Seattle, Jne 993, pp P. Mattavell,. Rossetto, G. Spazz, P. Tent, "Sldng mode control of SEPI converters", Proc. of Eropean Space Power onf. (ESP), Graz, Agst 993, pp P. Mattavell,. Rossetto, G. Spazz, "Smallsgnal analyss of DD converters wth sldng mode control", Proc. of Appled Power Electroncs onf. (APE), Dallas, March 995, pp S. Freeland, Inpt rrent Shapng for SnglePhase AD Power onverters, PH.D. Thess, Part II, alforna Insttte of Technology (altech), J. Fernando Slva, Sona S. Palo, "Fxed freqency sldng mode modlator for crrent mode PWM nverters", n Power Electroncs Specalsts onf. Proc. (PES), 993, pp M.arpta, P.Farna, S. Tencon, A snglephase, sldng mode controlled nverter wth three levels otpt voltage for UPS or power condtonng applcatons", n Eropean Power Electroncs onf. Proc., 993, pp Malesan,. Rossetto, G. Spazz, A. Zccato, "An A power spply wth sldngmode control", Proc. of Indstry Applcaton Socety onf. (IAS), Toronto, October 993, pp H. Pnhero, A. S. Martns, J. R. Pnhero, "A sldng mode controller n sngle phase voltage sorce nverters", Proc. of Internatonal onference on Indstral Electroncs, ontrol, and Instrmentaton (IEON), 994, pp N. Sabanovc, A. Sabanovc, K. Ohnsh, "Sldng mode control of threephase swtchng converters", Proc. of Internatonal onference on Indstral Electroncs, ontrol, and Instrmentaton (IEON), San Dego, 99, pp.3935.