Applied Ph icsa Surfaces

Transcription

1 Appl. Phys. A 58, l (1994) Applied Ph icsa Surfaces Springer-Verlag 1994 Metal/TaN 5 nm)/si Diode Fabricated by DC Magnetron Sputtering Q. X. Jia*, K. Ebihara, T. Ikegami, W. A. Anderson Kumamoto University, Department of Electrical and Computer Science, Kurokami , Kumamoto 860, Japan Received 20 October 1993/Accepted 19 January 1994 Abstract. Metal/ultrathin Tantalum Nitride (TaN)/p-Si (MTS) diodes were fabricated using dc magnetron reactive sputtering to form the ultrathin (..~ 5 nm) resistive TaN layer. The diode quality factor and barrier height were directly related to the substrate arrangement during sputtering of the ultrathin TaN layer. An effective barrier height of 0.75 _ ev and near-unity diode quality factor were observed while the plane of the substrate was perpendicular to that of the target. However, an effective barrier height of ev and a diode quality factor around were seen while the substrate was parallel to the target. Thermal stability of the as-deposited diodes was studied using elevated-temperature treatment with different time intervals at 100 C and 150 C, respectively. Thermal stability of the MTS diodes was also related to the substrate arrangement during sputtering. PACS: 73.30, 73.40, Tantalum Nitride, TaN, because of its high resistivity, excellent stability and reliability, and low temperature coefficient of resistance, was widely used for passive components, such as resistors and capacitors [1, 2] in hybrid integrated circuit and communication applications. TaN was also used as resistive thermoconductive vacuum gauge due to its large effective surface areas for thermal conductivity I-3]. More recently, TaN was used as metal contacts for Schottky diodes I-4] owing to its good physical strength and stability [5]. However, the practical application of TaN/Si diodes was limited due to high forward voltage drop [4]. The high forward voltage drop of TaN/p-Si diodes resulted not only from the high substrate resistance and the probe contact resistance as indicated in [4], but also due to the high resistive nature of TaN. This work introduces an ultrathin TaN layer between metal and Si to form metal/tan (~ 5 nm)/p-si diodes. The ultrathin TaN films were successfully deposited using dc * Currently with Los Alamos National Laboratory, Los Alamos, NM 87545, USA (Fax: / ) magnetron reactive sputtering. Diode quality factor, barrier height, and thermal stability of the diodes were found to be a function of the substrate location during sputtering of the TaN. 1 Experimental Details Metal/ultrathin TaN/p-Si (MTS) diodes were fabricated using dc magnetron reactive sputtering to form the ultrathin TaN layer. Czochralski p-si wafers, doped with boron, with a resistivity in the range of 1-4f~ cm and orientation of(100), were used as the substrate. The Si wafers were ultrasonically cleaned in trichlorethylene, acetone, methanol, and DeIonized (DI) water. Native oxide on the both sides of the wafers was removed by buffer HF followed by 18 Mf~ cm DI water rinsing. A1 was thermally evaporated on the back surface of the wafers used for back contact electrode. Ramp sintering in air, where the samples were warmed up to 600 C at a rate of 50 C/min and naturally cooled down to room temperature by shutting off the power to the furnace, was used to make the back ohmic contact of A1/Si. Native oxide on the front surface due to sintering was removed by dipping the wafers in buffer HF solution for 3 rain, rinsing in DI water, and blowing dry in nitrogen. The wafers were immediately loaded into adc magnetron sputtering system for ultrathin TaN film deposition. The sputtering system, including micro-controlled gas inlet valves, quadruple gas analyzer, substrate heater, thickness monitor, and dc magnetron gun, was used to deposit TaN films. The chamber was first pumped to less than Torr and the wafers slowly heated to around 300 C. Serious surface oxidation of the silicon surface was avoided when the substrate was heated under high-vacuum conditions. The base pressure in the chamber was then less than 1 x 10-6 Torr. The partial pressure for different gases or vapor was detected by a quadruple gas analyzer before N 2 and Ar were introduced into chamber. Less than 3 x 10-8 Torr partial pressure for 02 was detected in the chamber. Low oxygen pressure in the sputtering system was important to prevent formation of

2 488 Ta20 5 during reactive sputtering of Ta. Ultrathin TaN films were reactively sputtered in a gas mixture of N 2 and Ar. Ta with a purity of 99.9~ and diameter of 5.08 cm was used as target. The partial pressure for N 2 and Ar + N2 were maintained at Torr and 10 retort, respectively, during sputtering. The substrate temperature was kept at 300 C during film deposition, where the substrate temperature was measured using a thermocouple inserted into a small hole in the substrate holder. 30 min presputtering was performed to clean the target surface, to bring the target surface to a thermal equilibrium condition, and to stabilize the total sputtering gas pressure at 10 mtorr during sputtering. Two kinds of arrangements of the substrate during sputtering were used in the experiments. In one arrangement, the plane of the substrate was parallel to that of the target. In the other arrangement, the plane of the substrate was perpendicular to that of the target. The film thickness was further verified from ellipsometry (2 = nm) measurement after film formation although it was monitored by a thickness monitor during sputtering. The ellipsometry measurement gave the refractive index of the TaN in the range of To obtain good performance of MTS diodes, different thicknesses of the TaN layer from 3 nm to 10 nm between A1 and Si were used. Experimental results showed that good quality MTS diodes could be obtained if the thickness of TaN was in the range of 4-6 nm. A film thickness of about 5 nm was chosen for most of the work. Typically, eight seconds of sputtering were required to obtain a 5 nm TaN layer. This was a function of the sputtering power and the distance from the target to the substrate. A typical value ofdc power applied to the target was around 100 W. Top contact pads were patterned using photolithography technique. Lift-off was followed after thermal evaporation of A1 onto the TaN. Individual diodes on the wafer with an area of cm 2 were formed after wet chemical etching to remove the ultrathin TaN except underneath the A1 pads, where a dipping of the wafer in the solution of CH3COOH: HNO 3 : HCI -- 6:3: 1 was used to remove the ultrathin TaN layer. Current-voltage (I-V) and high-frequency (1 MHz) capacitance-voltage (C-V) measurements were carried out at room temperature on these as-deposited diodes to determine the diode parameters. Thermal stability of the as-deposited diodes was examined using elevated-temperature treatment at 100 C and 150 C with different time intervals. The diode quality factor and barrier height for these diodes were evaluated from I-V and high frequency C-V plots, both before and after thermal treatment. 2 Current-Voltage Characteristics Saturation current density, diode quality factor, and barrier height are three important parameters for characterizing Schottky or MIS diode. All of these parameters can be deduced from I-V characteristics [6]. The forward and reverse I-V characteristics of the as-deposited ultrathin TaN MTS diodes were measured at room temperature. Figure 1 shows some typical I-V characteristics of MTS diodes prepared as previously described. The I-V 10-2?/ /; 103 / 0 Forward Bias /,o4 /? // A/? Reverse Bias / ~ Perpendicular Arrangement / 10 "~ / / ~ - A~Z~ //O~ Parallel Arrangement O 10-7 ~ l I I J Voltage (V) Q. x. Jia et al. Fig. 1. I-V characteristics of the A1/TaN/p-Si diodes for different substrate arrangement during sputtering characteristics of the MTS diodes, after a close investigation of Fig. 1, can be described by the Schottky diode theory: J = Js[exp(qV/nkT) - 1], (1) Ja = A* T 2 exp(-- ~b/kt), (2) where n is the diode quality factor, A* is the Richardson constant, and ~b b is the effective barrier height of the diode. The other symbols have their usual meaning. In the modeling, we treated the MTS diode as a quasi-schottky diode and neglected the effect of the interfacial layer from ultrathin TaN. This is not unreasonable due to the resistive properties of the TaN rather than insulating ones. For voltages greater than a few kt/q, an exponential behavior was observed. The plot of In I versus V was a straight line, whose extrapolated intercept with the current axis gave the saturation current. From the value of the saturation current density, q~b could be evaluated. The slope of the straight line would give the n factor of the diode. As shown in Fig. 1, a ~b of 0.75 ev and an n factor of 1.04 were the typical value for the perpendicular arrangement compared to 0.78 ev and 1.15 for the parallel arrangement. In our calculation, an A* of 32 A/cm 2. T 2 was used. The q~b and n factor of the as-deposited MTS diode were different for different substrate arrangements during sputtering. Lower ~b and near-unity n factor were generally found for perpendicular arrangement. From a statistical point of view, the q~b was in the range of 0.75 _ ev and the n factor in the range of for the perpendicular arrangement. However, the q~b and n factor were

3 Metal/TaN/Si Diode generally in the range of ev and 1.15 _+ 0.02, respectively, for the parallel arrangement. Lower q~b for the perpendicular arrangement of the substrate during sputtering might be due to the lower interface state density as self-evidenced by its near-unity n factor. This arrangement could greatly reduce the high-energy particle bombardment, so a lower density of defect states might be generated on the silicon surface. However, if the substrate was parallel to the target during sputtering, a higher density of defect states might be introduced on the Si surface. Grusell et al. suggested that defect states in the range of /cm 3 could be induced within 10 nm below the silicon surface during sputtering used in fabricating Schottky diodes [7]. It was well known that damage of the silicon surface by inert/reactive gas or dopant ions encountered in ionassisted etching/deposition or ion implantation resulted in the generation of donor like defects [8-11]. The effect of donor-like traps in p-si substrate was to increase the effective barrier height above that of trap-free p-type silicon and to lower the effective barrier height below that of trap-free n-type silicon. Another explanation may base on the barrier inhomogeneities at the TaN/p-Si interface. Spatial inhomogeneities of the barrier and band bending at Schottky contacts have been successfully used to explain the I-V behavior of different contact systems [12-17]. The higher value of n is simply an indication of the barrier non-uniformity or deformation of the barrier distribution [13, 15, 17]. It is possible that the perpendicular arrangement of the substrate during sputtering gives a relatively less amount of inhomogeneities on the Schottky barrier height compared to the parallel one. These inhomogeneities could be the results of different damage to the Si surface during sputtering, or of different chemical composition as a consequence of the different geometrical arrangement of the substrate and sputtering target. 3 Capacitance-Voltage Characteristics The ~b b was also evaluated by measuring the highfrequency C-V characteristics at room temperature. Theoretically, the relation 2 1/C 2 - (Ee/q + V R - kt/q) (3) q'~sf, o N A holds, where NA is the boron doping concentration in the Si substrates, VR the applied reverse voltage, E e = Ef - E v the energy difference between the Fermi level Ef and the edge of the valence band E v. The other symbols have their usual meaning. The term k T/q arises from the contribution of the majority carrier distribution tail [6]. The ~b was derived from the plot of 1/C 2 versus VR. As shown in Fig. 2, the 1/C2--VR plot gave a straight line. The slope of the straight line gives the value of the doping concentration of the substrate, from which Ep is derived. The ~b is then given from the 1/C2-VR plot by q5 b : V l + Ep/q + kt/q, (4) where VI is the intercept of the straight line on the voltageaxis. The values of the barrier height derived from high- E A./O~ "V 8 o j A / A A / A/" Perpendmular Arrangement A / / j- O 0 /A / O./~0 /A/A/O/0/ ~../.0 A/" ~/0 \ A/O /u Parallel Arrangement ~ p [ Reverse Voltage (V) Fig. 2. 1/C z vs V for M/TaN/pSi diodes at room temperature frequency C-V measurements were 0.81 ev and 0.83 ev, respectively, for the same samples as given in Fig. 1, where the higher value of the ~b corresponds to the parallel arrangement during sputtering of ultrathin TaN. The values of the ~b b obtained from C-V measurements are generally greater than those evaluated from I-V measurements. This is probably due to the fact that the ideal Schottky barrier theory for C-V behavior does not account for charge moving in and out of surface state [18] nor does it account for charge in localized damage center states existing tens or hundreds of angstroms below the silicon surface [19]. A smaller Schottky barrier height from I-V measurement than the mean barrier evaluated from C-V technique can be also from the Schottky barrier inhomogeneities because the current flows preferentially through the lower barriers in the potential distribution [12-15]. 4 Thermal Stability of the Diode A main feature of the MTS diodes is its quite good thermal stability. The performance of the thermal stability of the AI/TaN/p-Si diodes was verified by the measurement of the I-V and high-frequency C-V characteristics of the diodes at room temperature before and after accelerated high-temperature treatment (100 C, 120 min; 150 C, 120 min; and 150 C, 7 d, respectively). Figure 3 shows the I-V characteristics of the MTS diodes after different temperature treatments. The n factor of the diode increased with prolonged thermal treatment accompanied by a slight decrease in q~b. The decrease of the ~b b and the increase of the n factor were somewhat obvious after 120 min thermal treatment at 100 C. However, no detectable changes of the ~b and the n factor could be found after thermal treatment of the diodes at 150 C for 120 min. The q~b only decreased about 1.1% and the n factor increased about 0.7% even after a thermal treatment at 150 C for 7 d. The decrease of the q~b with prolonged thermal treatment could be understood by the annealing effect. The donor-like defects produced during sputtering might be partially removed

4 490 ff- 102, I I Forward Bias Reverse Bias \ Q. X. Jia et al. n factor were observed after thermal treatment if the plane of the substrate was perpendicular to that of the target during sputtering. One possible reason was the composition inhomogeneity of the ultrathin tantalum-nitride film for different arrangements during sputtering due to two kinds of composition coexisting in tantalum nitride (Ta2N and TAN). Another possible reason was that a lower density of defect states was produced on the silicon surface owing to the avoidance of direct bombardment of the silicon surface from the high-energy particles during sputtering. The defects introduced during sputtering might also play different roles on the silicon surface for different substrate arrangements. Further investigations should be carried out to find the mechanisms contributing to these effects. 5 Conclusions A A As-deposited 1 IO@C, 120min 150 C, 120min o o 150 C, 7 Days , Voltage (V) Fig. 3. I-V characteristics of the A1/TaN/p-Si diodes at room temperature after thermal treatments, where the ultra-thin TaN was deposited by arranging the substrate parallel to the target after thermal treatment. The slow increase of the n factor of the diode with prolonged thermal treatment seemed to repel the annealing effects explained above. Another possible reason of the reduced q~b after thermal treatment of the diodes might be from the reduction of the effective thickness of the ultrathin TaN. However, the annealing effects could not be so obvious at such a low thermal treatment temperature. A much more confident explanation of these observations has to be confirmed by some other welldesigned experiments. As can be seen from Fig. 3, thermal treatment of the MTS diodes gave an increased reverse current density and a second diode behavior at low forward bias. A lowered shunting resistance was a main contribution to these effects. Thermal treatment could have increased the actual active contact area between the aluminum and the TaN. Thermal treatment might also form a silicide layer at the interface between TaN and silicon which could cause a considerable change in the effective Richardson constant. The changes of the effective Richardson constant of a sputtered Pt/Si Schottky diode during annealing Pt/Si contact or with increasing substrate temperature during sputtering Pt were observed [20, 21]. Another factor which might enhance the reverse current density could be the partial direct contact between aluminum and silicon owing to the pinholes and nonuniformity of the ultrathin TaN films. More detailed studies also showed that the thermal stability of the MTS diodes was related to the substrate arrangement during sputtering. Smaller changes of q~b and A1/TaN (~ 5 nm)/p-si diodes were fabricated using dc magnetron reactive sputtering to deposit ultrathin TaN. The barrier height, diode quality factor, and the thermal stability of the diode were directly related to the substrate arrangement during sputtering TaN. The highest barrier height of the diode obtained for this structure was 0.79 ev based on I-V measurement but 0.83 ev based on highfrequency C-V measurement. An interesting advantage of the perpendicular arrangement of the substrate with respect to the target during deposition of the TaN layer was the near-unity diode quality factor and reasonable barrier height due to less Si surface damage from high-energy particles during sputtering. DC magnetron sputtering is a simple, convenient and controllable technique to deposit ultrathin TaN films. Many interesting results can be obtained by changing the location or direction of the substrate relative to the target. By optimizing the sputtering parameters (such as dc power, reactive sputtering gas ratio, the location or direction between target and substrate, and the substrate temperature) and film thickness, it is expected that high-performance MTS diodes can be fabricated. References 1. S.R. Jawalekar, P.K. Reddy, M.N. Mathur: J. Inst. Electron. Telecom. Eng. 26, 265(1980) 2. M. Nakamura, M. Fujimori, Y. Nishimura: Jpn. J. Appl. Phys. 12, 30(1973) 3. T. Shioyama: J. Vac. Sci. Technol. A3, 1871(1985) 4. A.K. Kapoor, M.E. Thomas, J.F. Ciacchella, M. Hartnett: IEEE Trans. ED-35, 1372(1988) 5. R. Petroic: Thin Solid Films 57, 333(1979) 6. S.M. Sze: Physics of Semiconductor Devices, 2nd edn. (Wiley, New York 1981) 7. E. Grusell, S. Berg, L.P. Anderson: J. Electrochem. Soc. 127, 1573(1980) 8. S.J. Fonash, S. Ashok, R. Singh: Appl. Phys. Lett. 39, 423(1981) 9. S. Ashok, A. Mogro-Campero: IEEE Device Lett. 5, 48(1984) 10. X.C. Mu, S.J. Fonash: IEEE Device Lett. 6, 410(1985) 11. S. Ashok, K. Giewont: IEEE Device Lett. 6, 462(1985) 12. H.H. Guttler, I.H. Werner: Appl. Phys. Lett. 56, 1113(1990) 13. R.T. Tung: Appl. Phys. Lett. 58, 2821(1991)

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