Freescale Semiconductor, I

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1 Application Note Rev., 5/3 3Sin with Dead-ime Correction XOR version PU Function Set (3SinDtXor) By Milan Brejl, Ph.D. Functional Overview A1 A AB1 AB B1 B he 3-Phase Sine Wave Generator with Dead-ime Correction XOR version (3SinDtXor) is a version of the 3-Phase Sine Wave Generator with Dead-ime Correction (3SinDt) function that uses two PU channels to generate one PWM output channel. he PU channel outputs are to be connected to a XOR gate whose output is the required PWM signal. See Figure 1. An advantage of this solution is that it provides the full range % to 1% of PWM duty-cycle ratios. here is no MPW (minimum pulse width) parameter to limit the edge duty-cycle ratios in this version, unlike in the 3SinDt. A disadvantage is that the number of assigned PU channels is doubled. XOR XOR XOR Phase A - top Phase A - bottom Phase B - top BB1 BB XOR Phase B - bottom C1 C XOR Phase C - top CB1 CB XOR Figure 1. Functionality of XOR version illustration Phase C - bottom Motorola, Inc., 3

2 he dead-time correction technique requires knowledge of the instantaneous direction of phase currents. In the case of positive phase current the top channel high-time is equal to the calculated high-time, and the bottom channel has to control the dead-time. In case of negative phase current the bottom channel low-time is equal to the calculated high-time, and the top channel has to control the dead-time. See Figure. calculated high-time In case of positive current: In case of negative current: D D Figure. Dead-ime Correction echnique he function set consists of 5 PU functions: 3-Phase Sine Wave Generator with Dead-ime Correction XOR version R channels (3SinDtXor_R) 3-Phase Sine Wave Generator with Dead-ime Correction XOR version channels (3SinDtXor_) Synchronization Signal for 3-Phase Sine Wave Generator with Dead- ime Correction XOR version (3SinDtXor_sync) Resolver Reference Signal for 3-Phase Sine Wave Generator with Dead-ime Correction XOR version (3SinDtXor_res) D D top channel bottom channel top channel bottom channel Fault Input for 3-Phase Sine Wave Generator with Dead-ime Correction XOR version (3SinDtXor_fault) he 3SinDtXor_R and 3SinDtXor_ PU functions work together to generate 6 pairs of XOR gate inputs. he XOR gate outputs then produce a 6-channel 3-phase center-aligned PWM signal with dead-time between the top and bottom channels. he Synchronization Signal for the 3SinDtXor function can be used to generate one adjustable signal for a wide range of uses, which is synchronized to the PWM, and tracks changes in the PWM period. he 3Sin with Dead-ime Correction XOR version PU Function Set (3SinDtXor)

3 Function Set Configuration Resolver Reference Signal for the 3SinDtXor function can be used to generate one 5% duty-cycle adjustable signal, which is also synchronized to the PWM. he Fault Input for the 3SinDtXor function is a PU input function that sets all XOR gate outputs low when the input signal goes low. Function Set Configuration None of the PU functions in the 3-Phase Sine Wave Generator with Dead- ime Correction XOR version PU function set can be used separately. he 3SinDtXor_R and 3SinDtXor_ functions have to be used together. he 3SinDtXor_R runs on pins AB1, BB1, CB1 see Figure 1. 3SinDtXor_ runs on the other pins. he 3SinDtXor_R and 3SinDtXor_ functions use a table of 3 cosine function values. he table is placed in the parameter space of four consecutive channels. One channel running Synchronization Signal for 3SinDtXor and one channel running Resolver Reference Signal for 3SinDtXor functions can be added to the 3SinDtXor_R and 3SinDtXor_ functions. hey can run on one of the channels where the cosine table values are placed, because the 3SinDtXor_sync and 3SinDtXor_res parameters are placed on two 3SinDtXor_ channels. he function Fault Input for 3SinDtXor can also be added to the 3SinDtXor_R and 3SinDtXor_ functions. It is recommended to use it on channel 15, and to set the hardware option that disables all PU output pins when the channel 15 input signal is low (DPU bit = 1). his ensures that the hardware reacts quickly to a pin fault state. Note that it is not only the PWM channels, but all PU output channels, including the synchronization and resolver reference signals, that are disabled in this configuration. he function 3SinDtXor_fault can run on one of the four channels where the table of cosine function values is placed, because the 3SinDtXor_fault function does not have any parameters. able 1 shows the configuration options and restrictions. able 1. 3SinDtXor PU function set configuration options and restrictions PU function Optional/ How many Mandatory channels Assignable channels 3SinDtXor_R mandatory 3 any 3 channels 3SinDtXor_ mandatory 9 any 9 channels Cosine table mandatory 4 any 4 consecutive channels 3SinDtXor_sync optional 1 one of Cosine able channels 3SinDtXor_res optional 1 one of Cosine able channels 3SinDtXor_fault optional 1 one of Cosine able channels, recommended is 15 and DPU bit set 3Sin with Dead-ime Correction XOR version PU Function Set (3SinDtXor) 3

4 able shows an example of configuration. Configuration Order able. Example of configuration Channel PU function Priority 3SinDtXor_ middle 1 3SinDtXor_ middle 3SinDtXor_R middle 3 3SinDtXor_ middle 4 3SinDtXor_ middle 5 3SinDtXor_ middle 6 3SinDtXor_R middle 7 3SinDtXor_ middle 8 3SinDtXor_ middle 9 3SinDtXor_ middle 1 3SinDtXor_R middle 11 3SinDtXor_ middle 1 Cosine table 1 none 13 3SinDtXor_sync, Cosine table low 14 3SinDtXor_res, Cosine table 3 low 15 3SinDtXor_fault, Cosine table 4 high able 3 shows the PU function code sizes. PU function 3SinDtXor_R 3SinDtXor_ 3SinDtXor_sync 3SinDtXor_res 3SinDtXor_fault able 3. PU function code sizes he CPU configures the PU as follows. Code size 317 µ instructions + 8 entries = 35 long words 3 µ instructions + 8 entries = 11 long words 3 µ instructions + 8 entries = 38 long words 41 µ instructions + 8 entries = 49 long words 9 µ instructions + 8 entries = 17 long words 1. Disables the channels by clearing the two channel priority bits on each channel used (not necessary after reset).. Selects the channel functions on all used channels by writing the function numbers to the channel function select bits. 3. Initializes function parameters. he parameters, prescaler, D, heta_h, heta_l and sync_presc_addr must be set before initialization. 3 cosine table values must be set. If an 3SinDt_sync channel or an 3SinDt_res channel is used, then its parameters must also be set before initialization. 4 3Sin with Dead-ime Correction XOR version PU Function Set (3SinDtXor)

5 Detailed Function Description NOE: Detailed Function Description 3-Phase Sine Wave Generator with Dead-ime Correction XOR version R channels (3SinDtXor_R) and 3-Phase Sine Wave Generator with Dead-ime Correction XOR version channels (3SinDtXor_) 4. Issues an HSR (Host Service Request) type %1 to one of the 3SinDtXor_R channels to initialize all 3SinDtXor_R and 3SinDtXor_ channels. Issues an HSR type %1 to the 3SinDtXor_sync channel, 3SinDtXor_res channel and 3SinDtXor_fault channel, if used. 5. Enables servicing by assigning a high, middle or low priority to the channel priority bits. All 3SinDtXor_R and 3SinDtXor_ channels must be assigned the same priority to ensure correct operation. he CPU must ensure that the 3SinDtXor_sync or 3SinDtXor_res channels are initialized after the initialization of 3SinDtXor_R and 3SinDtXor_ channels: assign a priority to the 3SinDtXor_R and 3SinDtXor_ channels to enable their initialization if a Synchronization Signal or a Resolver Reference Signal channel is used, wait until the HSR bits are cleared to indicate that initialization of the 3SinDtXor_R and 3SinDtXor_ channels has completed and assign a priority to the 3SinDtXor_sync or 3SinDtXor_res channels to enable their initialization A CPU routine that configures the PU can be generated automatically using the MPC5_Quick_Start Graphical Configuration ool. he 3SinDtXor_R and 3SinDtXor_ PU functions work together to generate 6 pairs of XOR gate inputs. he XOR gate outputs then produce a 6-channel 3-phase center-aligned PWM signal with dead-time between the top and bottom channels. In order to charge the bootstrap transistors, the PWM signals start to run 1.6ms after their initialization (at MHz CR1 clock). he functions generate signals corresponding to Reference Voltage Vector Amplitude of (5% duty-cycle) until the first reloaded values are processed. he CPU controls the PWM output by setting the PU parameters. he Stator Reference Voltage Vector Amplitude Ampl, the Stator Reference Voltage Vector angle heta (3-bit) and the angle increment dheta (3-bit), can be adjusted during run time. he PWM period and the prescaler the number of PWM periods per reload of new values are also read at each reload, so these parameters can be changed during run time. Conversely, the dead-time (D) is not supposed to be changed during run time. he phase currents currenta, currentb and currentc are read by the PU asynchronously to the PWM parameters reload. hey are read in the last part of the edge-time calculation to reflect the latest state of the phase currents. he CPU notifies the PU that the new reload values are prepared by setting the LD_OK parameter. he PU 3Sin with Dead-ime Correction XOR version PU Function Set (3SinDtXor) 5

6 notifies the CPU that the reload values have been read and new values can be written by clearing the LD_OK parameter. he PU function rotates the Stator Reference Voltage Vector by dheta angle each period so that the PU can drive the motor with constant amplitude and constant speed independently of the CPU. he CPU can adjust the Ampl parameter to change the Stator Reference Voltage Vector amplitude, the dheta parameter to change the rotation speed. he CPU can also set the absolute value of Stator Reference Voltage Vector angle heta. o notify the PU that the heta parameter should be loaded instead of using the buffered value, the CPU must set LD_OK = $81 instead of $1. he following equations describe how the 3-phase sine wave PWM signal hightimes ht A, ht B, ht C and transition times t trans of each channel are calculated: heta = heta + s dheta = A cos( heta ) = cos( 1 ) C = ( s A s B ) s B heta s + he function cos is calculated using a table of 3 values from the first quadrant of one cosine wave period. he function parameter is mirrored in the first quadrant. he function value is obtained by linear interpolation between the two closest table values. Figure 3 shows the error of the cosine function value calculation. he maximum error is 7 in the amplitude range < 3768, 3767>, that is.1%. 6 3Sin with Dead-ime Correction XOR version PU Function Set (3SinDtXor)

7 Detailed Function Description function error ht ht ht A B C angle [deg] Figure 3. Cosine function value error Ampl s = Ampl s = Ampl s = positive current ht A A B C ht A 8 9 A1 A AB1 AB XOR XOR top channel bottom channel D D D D 3Sin with Dead-ime Correction XOR version PU Function Set (3SinDtXor) 7

8 negative current ht A ht A A1 A AB1 AB XOR XOR top channel bottom channel D D D D Host Interface Phase A: Positive current 1 channel t trans = ht A Negative current 1 channel hta t trans = + D channel channel ht A hta t trans = + t trans = + D B1 channel B1 channel ht ht A A t = D t trans trans = B channel B channel hta hta t trans = + + D t trans = + Phase B and Phase C similarly with ht B and ht C substituted to ht A. Written By CPU Written By PU Written by both CPU and PU Not Used able 4. 3SinDtXor_ Control Bits Name Channel Function Select Channel Priority Options 3SinDtXor_ function number (Assigned during assembly the DPRAM code from library PU functions) Channel Disabled 1 Low Priority 1 Middle Priority 11 High Priority 8 3Sin with Dead-ime Correction XOR version PU Function Set (3SinDtXor)

9 Detailed Function Description 1 1 able 4. 3SinDtXor_ Control Bits Name Host Service Bits (HSR) Host Sequence Bits (HSQ) Options No Host Service Request 1 Not used 1 Not used 11 Not used xx Not used Channel Interrupt Enable x Not used Channel Interrupt Status x Not used able 5. 3SinDtXor_R Control Bits Name Channel Function Select Channel Priority Host Service Bits (HSR) Host Sequence Bits (HSQ) Channel Interrupt Enable Options 3SinDtXor_R function number (Assigned during assembly the DPRAM code from library PU functions) Channel Disabled 1 Low Priority 1 Middle Priority 11 High Priority No Host Service Request 1 Not used 1 Initialization 11 Stop xx Not used Channel Interrupt Disabled 1 Channel Interrupt Enabled Channel Interrupt Status Interrupt Not Asserted 1 Interrupt Asserted PU function 3SinDtXor_R generates an interrupt when the current values of Ampl, dheta (optionaly also heta), and prescaler have been read by the PU and indicates to the CPU that it can write new variables. he CPU program can 3Sin with Dead-ime Correction XOR version PU Function Set (3SinDtXor) 9

10 either wait for this interrupt to occur, or poll the LD_OK parameter to check it has cleared. he interrupt is generated at each reload by one of the R channels. he channels do not generate any interrupts. Phase A 1 channel able 6. 3SinDtXor_ and 3SinDtXor_R Parameter RAM Channel Parameter time_a1 1 state 3 prsc_copy 4 LD_OK 5 prescaler 6 7 fault_pinstate Phase A channel Phase A B1 channel Phase A B channel time_a 1 max_ht 3 dec 4 heta_h 5 heta_l 6 7 hta 1 B_chan_A 1_chan_A 3 _chan_a 4 B1a_chan_A 5 B1b_chan_A 6 currenta 7 time_ab 1 3 A_buf 4 heta_buf_h 5 heta_buf_l Sin with Dead-ime Correction XOR version PU Function Set (3SinDtXor)

11 Detailed Function Description Channel Parameter time_b1 1 F_chan 3 _copy 4 Ampl time_b 1 dheta_buf_h 3 dheta_buf_l 4 dheta_h 5 dheta_l 6 7 htb 1 B_chan_B 1_chan_B 3 _chan_b 4 B1a_chan_B 5 B1b_chan_B 6 currentb 7 time_bb CPU time_c D Phase B 1 channel Phase B channel Phase B B1 channel Phase B B channel Phase C 1 channel able 6. 3SinDtXor_ and 3SinDtXor_R Parameter RAM 3Sin with Dead-ime Correction XOR version PU Function Set (3SinDtXor) 11

12 Channel Parameter time_c 1 move_res 3 presc_addr_res 4 prescaler_res 5 time_res 6 dec_res 7 _copy_res htc 1 B_chan_C 1_chan_C 3 _chan_c 4 B1a_chan_C 5 B1b_chan_C 6 currentc 7 time_cb 1 move_sync pw_sync 3 prescaler_sync 4 presc_copy_sync 5 time_sync 6 dec_sync 7 _copy_sync Phase C channel Phase C B1 channel Phase C B channel Ampl able 6. 3SinDtXor_ and 3SinDtXor_R Parameter RAM able 7. 3SinDtXor_ and 3SinDtXor_R parameter description Parameter Format Description Parameters written by CPU 16-bit fractional Stator Reference Voltage Vector amplitude, positive values only! currenta or 1 currentb or 1 currentc or 1... positive current on phase A 1... negative current on phasea... positive current on phase B 1... negative current on phaseb... positive current on phase C 1... negative current on phasec 1 3Sin with Dead-ime Correction XOR version PU Function Set (3SinDtXor)

13 Detailed Function Description able 7. 3SinDtXor_ and 3SinDtXor_R parameter description Parameter Format Description heta dheta 3-bit fractional 3-bit fractional Stator Ref. Voltage Vector angle range < 1, 1) corresponds to < 18, 18 ) Stator Reference Voltage Vector angle increment range < 1, 1) corresponds to < 18, 18 ) prescaler D CPU14 LD_OK fault_pinstate or 1 heta_buf 16-bit unsigned integer 16-bit unsigned integer 16-bit unsigned integer 16-bit unsigned integer Parameters written by both PU and CPU 16-bit unsigned integer Parameters written by PU 3-bit fractional PWM period in number of CR1 PU cycles he number of PWM periods per reload of new values Dead-time in number of CR1 PU cycles ime of 14 IMB clocks in CR1 clocks.... CPU can update variables <>.. PU can read variables: $1... load Ampl, dheta, and prescaler only $81... load also heta CPU sets $1 or $81, PU sets If fault channel is used, state of fault pin:... low 1... high Actual Stator Reference Voltage Vector angle range < 1, 1) corresponds to < 18, 18 ) Other parameters are just for PU function inner use. Performance he maximum PWM frequency is 38kHz (PWM period = 55). his can be achieved when only 3SinDtXor_R and 3SinDtXor_ run on the PU and the IMB clock is 4MHz. When other functions run on the same PU the minimum 3Sin with Dead-ime Correction XOR version PU Function Set (3SinDtXor) 13

14 PWM period has to be greater. Get all the other running function states that can be served during one PWM period. Get their lengths (number of IMB clock cycles) and add a time slot transition of 1 IMB clock cycles to each one. Sum all the states lengths including the time slot transition. Convert the result from IMB clock cycles to CR1 clock cycles according to CR1 prescaler settings. he result indicates how much greater than the minimum value of 55 has to be for that particular case. NOE: able 8. 3SinDtXor_ State Statistics State Max IMB Clock Cycles RAM Accesses by PU S 1 able 9. 3SinDtXor_R State Statistics State Max IMB Clock Cycles RAM Accesses by PU INI SOP R 6 1 R 64 4 C C 6 1 C C 96 1 C C C C Execution times do not include the time slot transition time (S = 1 or 14 IMB clocks) 14 3Sin with Dead-ime Correction XOR version PU Function Set (3SinDtXor)

15 Detailed Function Description A1 S S A S S Phase A AB1 R C7 R C7 AB S S B1 S S Phase B Phase C B BB1 BB C1 C CB1 CB R flag1 = 1 flag = 1 link service request NOE: CCCC R C7 not a reload period C7 S S S Figure 4. 3SinDtXor_ and 3SinDtXor_R timing S S a reload period he R channel with the momentary earliest transition within the PWM period is marked by a flag1 and runs the R and C states. R R C CCC C C7 C7 S S S S S 3Sin with Dead-ime Correction XOR version PU Function Set (3SinDtXor) 15

16 S S NOE: S S flag = 1 link Figure 5. 3SinDtXor_ state diagram and 3 cases of timing he case that happens is determined by the time when the link comes. 16 3Sin with Dead-ime Correction XOR version PU Function Set (3SinDtXor)

17 Detailed Function Description R C 6 th -time C7 5-times INI SOP Synchronization signal for 3-Phase Sine Wave Generator with Dead-ime Correction XOR version (3SinDtXor_sync) HSR = 1 flag1 = C R flag1 = 1 channel with momentary longest high-time Figure 6. 3SinDtXor_R state diagram he 3SinDtXor_sync PU function uses information obtained from 3SinDtXor_R and 3SinDtXor_ functions, the actual PWM center times and the PWM periods. his allows a signal to be generated, which tracks the changes in the PWM period and is always synchronized with the PWM. he synchronization signal is a positive pulse generated repeatedly after the prescaler PWM periods. he low to high transition of the pulse can be adjusted by a parameter, either negative or positive, to go a number of CR1 PU cycles before or after the PWM period center time. he pulse width pw is another synchronization signal parameter. he 3SinDtXor_sync parameters are placed on the CB channel to keep the channel parameter space free, available for the table of cosine values. C7 HSR = 11 3Sin with Dead-ime Correction XOR version PU Function Set (3SinDtXor) 17

18 move > prescaler = 1 pw move move < prescaler = pw Synchronized Change of PWM Prescaler And Synchronization Signal Prescaler Host Interface move Figure 7. Synchronization signal adjustment examples he 3SinDtXor_sync PU function actually uses the presc_copy parameter instead of the prescaler parameter. he prescaler parameter holds the prescaler value that is copied to the presc_copy by the 3SinDtXor_R function at the time the PWM parameters are reloaded. his ensures that new prescaler values for the PWM signals, as well as the synchronization signal, are applied at the same time. 3 1 Written By CPU Written By PU 1 1 able 1. 3SinDtXor_sync Control Bits Name Channel Function Select Channel Priority Host Service Bits (HSR) Written by both CPU and PU Not Used Options 3SinDtXor_sync function number (Assigned during assembly the DPRAM code from library PU functions) Channel Disabled 1 Low Priority 1 Middle Priority 11 High Priority No Host Service Request 1 Not used 1 Initialization 11 Not used 18 3Sin with Dead-ime Correction XOR version PU Function Set (3SinDtXor)

19 Detailed Function Description 1 able 1. 3SinDtXor_sync Control Bits Name Options Host Sequence Bits (HSQ) xx Not used Channel Interrupt Enable Channel Interrupt Status Channel Interrupt Disabled 1 Channel Interrupt Enabled Interrupt Not Asserted 1 Interrupt Asserted PU function 3SinDtXor_sync generates an interrupt after each low to high transition. able 11. 3SinDtXor_sync Parameter RAM Channel Parameter Synchronization channel 7 able 1. 3SinDtXor_sync parameter description Parameter Format Description Parameters written by CPU move pw prescaler 16-bit signed integer 16-bit unsigned integer 16-bit unsigned integer he number of CR1 PU cycles to forego (negative) or come after (positive) the PWM period center time Synchronization pulse width in number of CR1 PU cycles. he number of PWM periods per synchronization pulse Parameters written by PU 3Sin with Dead-ime Correction XOR version PU Function Set (3SinDtXor) 19

20 able 1. 3SinDtXor_sync parameter description Parameter Format Description Other parameters are just for PU function inner use. Performance here is one limitation. he absolute value of parameter move has to be less than a quarter of the PWM period. move < 4 NOE: able 13. 3SinDtXor_sync State Statistics State Max IMB Clock Cycles RAM Accesses by PU INI 14 5 S S 1 3 S Execution times do not include the time slot transition time (S = 1 or 14 IMB clocks) S1 S S3 S1 S Figure 8. 3SinDtXor_sync timing 3Sin with Dead-ime Correction XOR version PU Function Set (3SinDtXor)

21 Detailed Function Description HSR = 1 INI S1 S S3 Resolver Reference Signal for 3-Phase Sine Wave Generator with Dead-ime Correction XOR version (3SinDtXor_res) Figure 9. 3SinDtXor_sync state diagram he 3SinDtXor_res PU function uses information read from the 3SinDtXor_R and 3SinDtXor_ functions, the actual PWM center times and the PWM periods. his allows a signal to be generated, which tracks the changes of the PWM period and is always synchronized with the PWM. he resolver reference signal is a 5% duty-cycle signal with a period equal to prescaler or synchronization channel presc_copy PWM periods (see next paragraph). he low to high transition of the pulse can be adjusted by a parameter, either negative or positive, to go a number of CR1 PU cycles before or after the PWM period center time. he 3SinDtXor_res parameters are placed on the C channel to keep the channel parameter space free, available for the table of cosine values. 3Sin with Dead-ime Correction XOR version PU Function Set (3SinDtXor) 1

22 move > prescaler = 1 move move < prescaler = Synchronized Change of PWM Prescaler And Resolver Reference Signal Prescaler Host Interface move Figure 1. Resolver reference signal adjustment examples he 3SinDtXor_res PU function can inherit the Synchronization Signal prescaler that is synchronously changed with the PWM prescaler. Write the synchronization signals presc_copy parameter address to the presc_addr parameter to enable this mechanism. Write to disable it, and in this case set the prescaler parameter to directly specify prescaler value. 3 1 Written By CPU Written By PU 1 1 able 14. 3SinDtXor_res Control Bits Name Channel Function Select Channel Priority Host Service Bits (HSR) Written by both CPU and PU Not Used Options 3SinDtXor_res function number (Assigned during assembly the DPRAM code from library PU functions) Channel Disabled 1 Low Priority 1 Middle Priority 11 High Priority No Host Service Request 1 Not used 1 Initialization 11 Not used 3Sin with Dead-ime Correction XOR version PU Function Set (3SinDtXor)

23 Detailed Function Description 1 able 14. 3SinDtXor_res Control Bits Name Options Host Sequence Bits (HSQ) xx Not used Channel Interrupt Enable x Not used Channel Interrupt Status x Not used able 15. 3SinDtXor_res Parameter RAM Channel Parameter Resolver able 16. 3SinDtXor_res parameter description Parameter Format Description move Parameters written by CPU 16-bit signed integer he number of CR1 PU cycles to forego (negative) or come after (positive) the PWM period center time presc_addr 16-bit unsigned integer $X8, where X is a number of CB channel, to inherit Sync. channel prescaler or $ to enable direct specification of prescaler value in prescaler parameter 3Sin with Dead-ime Correction XOR version PU Function Set (3SinDtXor) 3

24 able 16. 3SinDtXor_res parameter description Parameter Format Description prescaler 1,, 4, 6, 8, 1, 1, 14,... he number of PWM periods per synchronization pulse use when presc_addr = Parameters written by PU Other parameters are just for PU function inner use. Performance NOE: S1 here is one limitation. he absolute value of parameter move has to be less than a quarter of the PWM period. move < 4 able 17. 3SinDtXor_res State Statistics State Max IMB Clock Cycles RAM Accesses by PU INI 14 5 S1 8 9 S3 7 Execution times do not include the time slot transition time (S = 1 or 14 IMB clocks) S3 S1 Figure 11. 3SinDtXor_res timing 4 3Sin with Dead-ime Correction XOR version PU Function Set (3SinDtXor)

25 Detailed Function Description HSR = 1 INI S1 S3 Fault Input for 3- Phase Sine Wave Generator with Dead-ime Correction XOR version (3SinDtXor_fault) Host Interface Figure 1. 3SinDtXor_res state diagram he 3SinDtXor_fault is an input PU function that monitors the pin, and if a high to low transition occurs, immediately sets all PWM channels low and cancels all further transitions on them. he PWM channels, as well as the synchronization and resolver reference signal channels (if used), have to be initialized again to start them running. he function returns the actual pinstate as a value of (low) or 1 (high) in the parameter fault_pinstate. he parameter is placed on the A1 channel to keep the fault channel parameter space free. 3 1 Written By CPU Written By PU 1 able 18. 3SinDtXor_fault Control Bits Name Channel Function Select Channel Priority Written by both CPU and PU Not Used Options 3SinDtXor_fault function number (Assigned during assembly the DPRAM code from library PU functions) Channel Disabled 1 Low Priority 1 Middle Priority 11 High Priority 3Sin with Dead-ime Correction XOR version PU Function Set (3SinDtXor) 5

26 1 1 able 18. 3SinDtXor_fault Control Bits Name Host Service Bits (HSR) Host Sequence Bits (HSQ) Options No Host Service Request 1 Not used 1 Initialization 11 Not used xx Not used Channel Interrupt Enable Channel Interrupt Disabled 1 Channel Interrupt Enabled Channel Interrupt Status Interrupt Not Asserted 1 Interrupt Asserted PU function 3SinDtXor_fault generates an interrupt when a high to low transition appears. able 19. 3SinDtXor_fault Parameter RAM Channel Parameter Fault input able. 3SinDtXor_fault parameter description Parameter Format Description Parameters written by PU fault_pinstate or 1 State of fault pin:... low 1... high 6 3Sin with Dead-ime Correction XOR version PU Function Set (3SinDtXor)

27 Detailed Function Description Performance able 1. 3SinDtXor_fault State Statistics State Max IMB Clock Cycles RAM Accesses by PU INI 8 FAUL 17 5 NO_FAUL 4 1 NOE: Execution times do not include the time slot transition time (S = 1 or 14 IMB clocks) FAUL NO_FAUL HSR = 1 INI Figure 13. 3SinDtXor_fault timing FAUL NO_FAUL Figure 14. 3SinDtXor_fault state diagram 3Sin with Dead-ime Correction XOR version PU Function Set (3SinDtXor) 7

28 Rev. 5/3