Investigation of High Bandwidth Biodevices for Transcutaneous Wireless Telemetry

Transcription

1 Investigation of High Bandwidth Biodevices for Transcutaneous Wireless Telemetry By Gehad. A. Elamare Thesis submitted for the degree of Doctor of Philosophy in Engineering School of Electrical, Electronic and Computer Engineering University of Newcastle upon Tyne United Kingdom July 2010

2 B Abstract of the Dissertation IODEVICE implants for telemetry are increasingly applied today in various areas applications. There are many examples such as; telemedicine, biotelemetry, health care, treatments for chronic diseases, epilepsy and blindness, all of which are using a wireless infrastructure environment. They use microelectronics technology for diagnostics or monitoring signals such as Electroencephalography or Electromyography. Conceptually the biodevices are defined as one of these technologies combined with transcutaneous wireless implant telemetry (TWIT). A wireless inductive coupling link is a common way for transferring the RF power and data, to communicate between a reader and a battery-less implant. Demand for higher data rate for the acquisition data returned from the body is increasing, and requires an efficient modulator to achieve high transfer rate and low power consumption. In such applications, Quadrature Phase Shift Keying (QPSK) modulation has advantages over other schemes, and double the symbol rate with respect to Binary Phase Shift Keying (BPSK) over the same spectrum band. In contrast to analogue modulators for generating QPSK signals, where the circuit complexity and power dissipation are unsuitable for medical purposes, a digital approach has advantages. Eventually a simple design can be achieved by mixing the hardware and software to minimize size and power consumption for implantable telemetry applications. This work proposes a new approach to digital modulator techniques, applied to transcutaneous implantable telemetry applications; inherently increasing the data rate and simplifying the hardware design. A novel design for a QPSK VHDL modulator to convey a high data rate is demonstrated. Essentially, CPLD/FPGA technology is used to generate hardware from VHDL code, and implement the device which performs the modulation. This improves the data transmission rate between the reader and biodevice. This type of modulator provides digital synthesis and the flexibility to reconfigure and upgrade with the two most often languages used being VHDL and Verilog (IEEE Standard) being used as hardware structure description languages. The second objective of this thesis is to improve the wireless coupling power (WCP). An efficient power amplifier was developed and a new algorithm developed for auto-power control design at the reader unit, which monitors the implant device and keeps the device working within the safety regulation power limits (SAR). i

3 Abstract of the Dissertation The proposed system design has also been modeled and simulated with MATLAB/Simulink to validate the modulator and examine the performance of the proposed modulator in relation to its specifications. ii

4 First and foremost, I would like to express my appreciation to my supervisor, Dr. Graeme Chester, for help and guidance during my studies. He has always been willing to help, explain and discuss any matters with me over the past three years. I would also thank my second supervisor, Mr. Jeffrey Neasham, for his helpful explanations, and guidance in the experimental setup, and practical discussion. I am intensely indebted to many people who made my time in the EECE School, at the electronics Lab use the design Tools and taught me how to use the Measurement equipments. Namely, Mr. Brian Smith, Mr Stephen Robson, Mr. Darren Mackie, Mr. Jack Noble, Mr. Jeffrey Warren, and Mr. Graham Ewart, the Staff of ITC for their support during my study. Ultimately, the staff of Mechanical workshop for their support and helpful during my PhD. Second, I acknowledge with thanks the support provided by the scholarship from the Higher Education Ministry in Libya to study and complete my degree.i must thank friends in H.E.M in Libya, the UK regional section, and also all the staff in Libyan Cultural Affairs in the Libyan Bureau in UK, I am specially indebted to thanks of all my colleagues in the general post telecommunication company, and the higher professional electronics institute. I would like to thanks Newcastle University for its support and good facilities to study. Finally, I would like to dedicate this work to my wife, my parent and family for the extraordinary sacrifices and their constant encouragement through of my study and emotional support whenever needed during my time at Newcastle University. Finally, I thank my friends for the support they have given me in so many ways. PhdThesis 2010 iii

5 TABLE OF CONTENS Abstract Acknowledgments Table of Contents... I II III Chapter I 1. Introduction Biodevices Technology Implant Technology for Medical Applications Implant Cochlear Technology Intraocular (Retinal) Implant Brain Implant Device Pacemaker Device Wireless Capsule Endoscopy Media Absorption, Side Effect and Technology Limitations Skin Tissue Attenuation Electromagnetic interference ISM Band Frequency for Medical Applications Acquisition Neural signals Medical Telemetry Chips and applications Chapter Summery Motivation of Thesis Thesis Organization.. 21 Chapter II 2. Background and Literature Review Implantable devices modulation schemes Analogue Modulation Background Introduction to Analogue Modulation PhdThesis 2010 iv

6 TABLE OF CONTENS 2.2 Background of Principle Digital Modulation Introduction to digital modulation ASK Modulation background ASK Demodulation Technique Principle of n-psk modulation Binary Phase Shift Keying Demodulation of BPSK Qaudrtuer Phase Shift Keying Demodulation of QPSK Quadrature Signals Generation Techniques Direct Digital Synthesizer (DDS) PLL (Voltage control Oscillator) LC VCO tuning oscillator Ring Oscillator Quadrature Phase Shifter and Mixers Types of Phase shifter Balance phase shifter RC-CR RC- polyphase network Active Balun CG-CS Active Balun Modulator Mixers Active modulator mixres Summary of Modulation Schemes Topologies Chapter III 3. Inductive Coupling link, Power Amplifier and Transmit circuit Inductive Coupling Link Theory and Background for inductive coupling link Theoretical Derivations Hypothetical Methods simulation and measurements PhdThesis 2010 v

7 TABLE OF CONTENS Inductive Coupling Link Efficiency Mutual and Coupling Coefficient for inductive link Lab Characterization measurements for mutual coupling Lab Measurements for Wireless Received Power Misalignment Investigation for Inductive Link Misalignment Analysis and Lab measurements Implant Coils Surgical Investigation Conclusion of the inductive coupling Link Power Amplifiers Introduction to Power Amplifiers Class E Power Amplifier theory simulation and design Class F Power Amplifier theory design and simulation Automatic frequency control for class F power amplifier Simulation and Lab measurements for Power Amplifiers Comparing measurement results for power amplifiers Summary of Power Amplifiers Implant Received Power Simulation and Measurements RF DC Received Power Investigation Voltage Multiplier Schottky Diode Rectifier RF-DC-CMOS Bridge Rectifiers Dickson Charge Pump Voltage Regulator Charging Pump voltage convertor Dc-Dc switches converter Switch Regulator Simulation of the RF-DC rectifiers Experimental Lab measurements Results Summary of receiving power rectifying Low Frequency Using Inductive Coupling Topology LSK Modulation Investigation and design Simulation and Lab Test Measurements Data Measurements Over Inductive Coupling Link Conclusion PhdtThesis 2010 vi

8 TABLE OF CONTENTS Chapter IV 4. Proposed VHDL Modulators Synthesis and Evaluation Biomedical Transmission Background The Biomedical Applications Using FPGA/CPLD Technology Investigation of the Low power device Dynamic Power Calculation for FPGA/CPLD Configration of CPLD and FPGAs devices JTAG interface technuqies BPSK VHDL Direct Digital Modulator Modulator Methodology Design Module Modulator Simulation BPSK Modulator MATLAB/Simulink Simulation VHDL BPSK Modulator Design and Simulation QPSK VHDL Direct Digital Modulator Module Method Design Module simulation QPSK Modulator MATLAB/ Simulink simulation Synthesis VHDL QPSK Modulator and Simulation Carrier Phase Shifter Modulator Efficient design PSK Modulator Digital Module Method Design Module Simulation PSK Modulator MATLAB/simulink VHDL 8PSK Modulator Synthesis and Simulation Experimental Lab Measurements for VHDL Modulators BPSK Modulator QPSK Modulator PSK Modulator Filters Investigation for Medical Purpose LP Filter Design and Simulation BP Filter Design and Simulation PhdThesis 2010 vii

9 TABLE OF CONTENTS Filter Lab Measrements Results Summary and Results Chapter V 5. Biodevices System Overview Biodevices System and Experimental Lab Measurements Downlink Reader Unit Lab Measurements for ASK modulator Hybrid Power Amplifier Class F/E Control Logic Circuit (A) Design of The Control Logic Circuit with VHDL (B) PN-Code Sequence Generator Background PN-Sequence Generator with VHDL code Prototype Implant Device (PID) ASK Demodulator Receiver (RX) Control System Unit (Reader) Frequency Control System (A) Frequency Control System (B) Measurements for TX/RX for n-psk signal over The Inductive Coupling Summary of the Biodevices System Chapter IV 6.0 Conclusion Thesis Results and Future Work Down-Up Link System Suggestion for Future work List of Abbreviation and Symbols References References Appendixes Appendixes PhdThesis 2010 viii

10 Chapter 1 Introduction

11 Introduction Chapter I S emiconductor chips are used today not only in communication or control systems, but also in our bodies, for diagnostic or monitoring signals, such as electroencephalograph (EEG), and electrooculography (EOG). They are used to understand electrical brain activity, with the nervous system behavior, and process it within implant circuitry [44] [46] [47] and [68] [75]. Generally, the investigation of the brain function has been targeted by many researchers and universities in the past and this century [114]. The human brain maintains over 14- billion nerve cells; 9-billion of these are distributed over 64 sections in the brain [210]. These bulk networks are being investigated by researchers and neuroscientists who have began to use bundles of tiny wire cables and multi electrode arrays, for monitoring and analysis of the many neurons in the brain, which are essential to understand the neural substrates of many physiological and pathological brain diseases, such as epilepsy and paralysis. The transcutaneous wireless telemetry implant is one of these technology solutions applied in biomedical applications, used to avoid a susceptible path to infection in the body and reliability problems. This eliminates the needs for tethering wires or implantable batteries [45] [50]. The research is continuing to develop many different types of electronic biomedical devices which may give prosthetics for treatments of a range of other wide ailments, such as blindness, quadriplegia, epilepsy and Parkinson s diseases [161]. On the other hand, these electronic devices are used especially in biomedical applications. These characteristics are imperative because the devices are difficult to access and the consequences are serious if the devices malfunction or fail, which requires knowledge of material behaviour and media. This chapter gives an overview of biomedical device topologies that are used in medical treatment in hospitals, clinical, telemedicine, and healthcare. Finally, there is a summary of the applications of transcutaneous biodevices, which are based on wireless infrastructure and a study of most of the applications for the magnetic field applied to the human body. 1

12 Chapter1 Introduction 1.1 Biodevices Technology Biomedical devices technology has been recently used for medical applications in the human body, by monitoring or recording many signals such as electrocardiogram (EKG), electroretinogram (ERG), and electromyography (EMG) [154] and [164]. Many research groups at institutes and universities are focusing on biomedical circuit devices. Predominantly these are to understand disorders of brain behaviour and processing it within the implant circuitry. These biodevices may solve many biomedical disorders, such as epilepsy and Parkinson s disease, which are caused by many factors. Typically, a wireless biomedical device consists of two parts, a reader that transfers a power RF signal, when the biomedical electronics device is swallowed or surgically implanted in a subject/patient, and can control the device from outside the body through an inductive coupling downlink, using a variety of modulated energy forms like electromagnetic energy [137]. On the other hand, the implantable device can communicate with exterior world by up-link, whether over inductive wireless coupling or UHF links to transmit the acquired data from the body [100] [ 96]. General examples of applications for the human body are shown in Figure (1.0). Intraocular Cochlear Implant Bladder Implant Pacemaker Figure (1.0) Implant technology applications in the human body 2

13 Chapter1 Introduction Conceptually, most biodevices are bi-directional systems which transmit RF signal carriers when they are swallowed or surgically implanted in a subject/ patient. They can communicate with biological or physiological parameters which are transferred through different medium types between two locations including air space, water and biological tissue (blood, fat, bone, etc) [43],[48]. The classification types of most common Passive/Active wireless telemetry applications and purposes are illustrated in Figure (1.1) [151] [193]. Telemetry Wireless System Passive Active Satellite Telemetry RF Coupling Optical Coupling Endoscopy Capsule Implant Bladder Sensor Sensors System Identification System Visual System RFID Temperature Sensor Pressure Sensor Neural Recording Biomedical Telemetry Wireless Sensors Implant Cochlear Pacemaker Retina Implant Implant brain Sensor Implant Electrodes Sensor Figure (1.1) the active and passive wireless telemetry types and applications 3

14 Chapter1 Introduction 1.2 Implantable Technologies For Medical Applications Implant technology has developed via further investigation and studies on human diseases in combination with work on electronic circuits. One of these technologies which is now used wireless implantable sensors; this new technology application is derived from the transcutaneous implant telemetry devices inside the body. It has been recently used for medical applications in the human body; one of these application examples is rehabilitation for replacing the damaged organs by biomechanical electronic devices to do the same function [154] [155] [159] and [160]. Almost all conventional wireless telemetry has limited applications, and this chapter describes most of the applications topology using inductive coupling as based in our work, whilst chapter three covers the background and design of the inductive coupling link and data over a magnetic link. The basic system consists of a bi-directional data transmission channel through the skin tissue of the patient. The data acquired from the matrices of sensors are converted into digital form modulated signal and retransmitted into a reader unit for analysis and processing (Up-link) [82] [105] and [175]. The general bio-communication architecture system for collecting data from the nervous system is described in Figure (1.2) as an example based on the work in the this thesis. Figure (1.2) the bio-communications system architecture 4

15 Chapter1 Introduction Implant Cochlear Technology Cochlear technology uses wireless coupling coils through human tissue, with the interior implant inside the head of a patient, and the exterior part outside the body [67] [148]. The exterior part picks up the sound from around a microphone, amplifies it and manipulates this sound by a speech processor, and then retransmits it through the inductive coupling. However, the interior coil is implanted surgically, and placed to get the optimum coupling with the exterior coil. The modulated RF signal offers the DC-source for the implant electronic circuits, and the electronics used in the implant cochlear device need to be of low power consumption and high reliability [109]. When the demodulated data are converted into electrical signals for the cochlear nerve, the electrical pulses are sent to the brain. The brain analyses these electrical pulses as received information, which enable the patient to understand and respond to sound, and can enable disabled patients to hear. Generally, the principle of cochlear implant technique has been shown in Figure (1.3). Typically the acoustic band frequency for humans is between 300~ 3400 Hz, the transferred data through the coils are low rate, which is a few kbps [70] [144]. This kind of technology overlaps with the work presented here because of the inductive coupling link, for the implant coil design. Figure (1.3) the cochlear implantable coil 5

16 Chapter1 Introduction Intraocular (Retinal) Implant One of the main growth areas in application research is retinal implant or Bionic eye technology, to help blind patients or retinal disease sufferers with their sight, and help people get a sense of their surroundings. This technique replaces and strengthens the damaged optic nerve (ganglion cells). It provides light and image to the brain s vision system for normal processing [112] [76]. The RF antenna foe inductive coupling is used to communicate with the exterior part reader, which supplies the implant with the required DC power, and transfers the image data from the video camera. Moreover, a tiny implant coil on the surface of the eye receives the wireless signals from an external camera, which the patient wears on a pair of spectacles that contain a camera, transmitter and wearable computer to process the signal from the camera. The camera stimulates the normal eye which converts the view into an electrical image signal modulated to transfer over wireless coupling link into the implant coupling inside the eye. Light and image signals are received through a pair of coils and received by an array of electrodes surgically implanted on the retina. The array delivers electrical signals to the nerve cells in the eye, mimicking the role of light-sensitive cells lost in degenerative retinal disease. The general architecture of a retina implant is shown in Figure (1.4). Figure (1.4) Principle architecture of the retinal implant device [198] 6

17 Chapter1 Introduction Brain Implant Device Brain-stimulation devices for treating depression have faced unexpected setbacks, to help millions of people who fail to respond to antidepressant drugs. The brain pacemaker device is implanted in the chest of a patient, with leads that send electrical impulses into parts of the brain. They have already been approved to treat movement disorders such as epilepsy, and Parkinson s disease tremors and depressed patients have improved significantly [117] [175]. Figure (1.5) shows the brain stimulator pacemaker construction for the patient, surrounding the vagus nerve [218]. In particular, children suffering from dystonias can benefit from brain pacemaker surgery. However, a brain pacemaker implantation is only advised in cases when the aforementioned drugs and combinations thereof do not lead to satisfactory treatment results and in patients less than 70 years of age. Additionally, the brain device is powered with a long life battery. One of the development solutions introduces a wireless power coupling technology to avoid additional regular surgical operations to replace the old battery, and which may cause the malfunction of the device when the battery is replaced. The wireless technique offers full control for the device and improves the performance, and gives more flexibility for the patient remotely. Figure (1.5) the brain pacemaker implant device [218] 7

18 Chapter1 Introduction Pacemaker Device In recent years there has been a high rate of surgery for artificial heart implants and cardiac pacemakers for monitoring and controlling irregular heart rhythms, especially for babies and the elderly. A newly developed artificial heart is called the intelligent smart artificial heart, created in order to realize the safe treatment and effective control for patients [154]. However, wireless inductive coupling can be used to communicate between the pacemaker and artificial heart using a wearable reader outside the patient [159] [160]. This avoids the surgical procedure for replacing the battery. Typically it provides the energy and control data, gathering back data from the implant pacemaker device. We demonstrate in Figure (1.6) the wireless application for a pacemaker or artificial heart. The new technology using Bluetooth can provide a simple interface with the patient, where the information can be accessed by mobile phone or interface with a web network to connect them to the Hospital or clinic. Obviously, electrical magnetic interference (EMI) may be one of the main effective causes, and could be a defect of the highly sensitive devices, which work in, near or interface with magnetic environment field such as RFID magnetic area [72]. Pacemaker Artificial Heart Figure (1.6) the wireless communication for artificial pacemaker device 8

19 -- Chapter1 Introduction Wireless Capsule Endoscopy The wireless capsule endoscopy (WCE) is based in a vitamin size pill which captures the images of the digestive tract, while it is transported passively by peristalsis. The device consists of an image sensor, an illumination module, a radio frequency transmitter and a battery [203] [157]. The architecture diagram of a capsule endoscope is shown in Figure (1.7). The WCE is used to perform a painless diagnosis inside the gastrointestinal tract. The test requires a patient to ingest, after a one night fast, the WCE, which is carried by peristalsis through the digestive area. During the transit the pill takes images from the CCD camera system, which are transmitted to an antenna placed outside the patient s body. The second generation of WCE uses magnetic fields generated for controlling the capsule from outside the body in certain directions [76]. The received electromagnetic energy is converted into a power supply for the capsule that is capable of localizing the device and determining the location of the pill inside the patient's body. Figure (1.8) describes the movement of the capsule inside the patient body, which communicates with wireless transmission to the PC. Figure (1.7) the Architecture of Endoscopy Capsule [203] Figure (1.8) the Endoscopy System [76] 9

20 Chapter1 Introduction 1.3 Media Absorption Side Effects and Technology Limitations Generally, there are an increased number of wireless applications, with most of the biomedical devices being augmented by the wireless environment techniques. The biomedical electronics devices use inductive magnetic communication for controlling or monitoring the acquisition back data from the patient. The magnetic flux that crosses the patient's skin is coupled with the implant coil inside the body. The body attenuates the magnetic field, which is dependent on the frequency used for coupling [143]. Table (1.0) illustrates the electrical properties of the body at ISM frequency [201], and the occupational exposure level of the electrical and magnetic fields varying with time are shown in Table (1.1) [211]. Table (1.0) the Electrical data of biological tissue used at 402MHz [201] Biological Tissue Permittivity ( r ) Conductivity Mass Density ( s / m) ( g / cm 3 ) Brain Skin Fat Blood Bone Muscle Table (1.1) Permitted level of exposure for electric and magnetic fields over frequency [211] E-field strength H- field strength B-field Equivalent plane wave Frequency range 1 ( V m ) 1 ( A m ) ( T) 2 power density S eq ( Wm ) 10

21 Chapter1 Introduction Skin Tissue Attenuation One of the objectives of this thesis is to investigate the body skin attenuation for electromagnetic fields. Most of the studies for electromagnetic radiation exposure of the biological tissue cover the mobile phone radiation effects for a human body. The interactions of the radio frequencies are not specific to a certain frequency; the exposure field is characterised by the frequency, intensity and polarization. For microwave radiation it is essential to compute the absorption rate (SAR) for high EMF power [211]. At low frequency working in biomedical device applications, the RF EMF generated by the transmitter coil toward the human body, received by a small loop coil as implant part, is less than a few Watts. In practice, the area where the type of coil is located at the external layer of the skin is the critical place to be considered for reduced attenuation. However, the body tissue layers affect the absorption of electrical and magnetic energy. A generic body model is defined consisting of planar layers of skin, fat and muscle tissue. Fat tissue has very low water content and therefore a significantly lower permittivity and conductivity ( r = 5.5, σ= 0.05S/ m), whereas muscle tissue has permittivity and conductivity of ( r = 55.0 σ= 0.95S/m) [72]. The skin tissue varies from 0.4mm to 2.6mm thick. These values include the epidermis and dermis and cover an age range from newborn to 60 years. On other the hand the fat layer thickness takes into account all possible effects due to impedance matching in the body layers. The layered body tissue is shown in Figure (1.9). The main factors affecting the attenuation for electromagnetic signal through the patient skin can be expressed in equation (1.1) [210]. 2 [ 1 ( ) 1] (1.1) 2 where: - (ω) is the angular frequency - (ε) is the permittivity - (σ) is the conductivity - (µ) is the Permeability Figure (1.9) Different layers for the skin [209] 11

22 Chapter1 Introduction It clear that the greatest effect of RF energy as a result of exposure to electromagnetic fields at relatively low levels (below 10 mw/cm 2 ), is on the eye and the gonads. Those are particularly susceptible to heat, and have been extensively investigated [139]. The radiation at frequencies above 800 MHz can produce injury to the eye and this type of injury depends on the frequency, and millimeter waves can produce keratitis. Cataracts develop after a sufficiently long exposure to power densities above 100mW/cm 2. The biological effects are related to the intensities of the fields within the living body, not to the external intensity of an exposure field. The internal fields are a complex function of exposure conditions and other parameters. The internal fields are frequently described in terms of the Specific Absorption Rate (SAR), which expresses the rate of energy absorption (e.g., at a given location, or averaged over the whole body) and is proportional to the square of the internal electric field intensity. The proportionality constant depends on the electrical properties of the tissue. The average SAR for a whole body, far-field (far away from the radiator) exposure depends on the field frequency, intensity, direction, subject-to-source configuration, subject's size and shape, and presence of other objects. Particularly with metal objects in the immediate vicinity, increased absorption occurs in various places inside the body, resulting in so-called "hotspots". For human beings maximum energy absorption take place between 30 and 100 MHz, depending on the body size and the environment [174]. For an average man isolated from ground the frequency of the maximum absorption is about 80 MHz. However, for the SAR the important parameters are absorbed energy in the area where the type of antenna is located, the outer layer of the skin current distribution and the distance between reader transmit coils and the receiver coils, in near field radiation of transcutaneous wireless coupling. The SAR is usually averaged either over the whole body or over a small sample volume typically (1g or 10g of tissue) and has units of Watts per kilogram. It can be calculated from the electrical field within the tissue as defined in the equation [219]: SAR 2 E 2 where: W kg - (E) is the Electrical field strength - ( ) is the conductivity of tissue - ( ) is the sample of mass density of tissue (1.2) 12

23 Chapter1 Introduction Electromagnetic Interference (EMI) The electromagnetic inductive coupling link has been used in biomedical applications, and the implant device coil can receive any transmit signals around it. That could cause the device to malfunction, if it is resonant at the same received frequency [72] [115]. Hence, it is difficult to shield the inductive coupling, which is an open transformer, to protect the implant microelectronics device from undesirable magnetic fields. It is required to develop a suitable solution to minimize the risk for the patients. Typically, the low frequency field induces currents in the human body that can have an effect on the sensory, nerve and muscle cells. The greater field strength, the more pronounced the effects [217] [196]. On the other hand, the high frequency fields heat the human body, and the degree of the absorption of electromagnetic waves is a function of the frequency and intensity of the field and the type of tissue. The organs with lesser blood flow are the most endangered, e.g. the eyes. In contrast, the heart and brain are better at handling heat due to their better blood flow [187]. However, the strength of field decreases at increasing distance from the source of radiation. In addition, the electrical charges absorbed by the body (static charge) could cause malfunction of electronic devices. Figure (1.10) demonstrates the most common sources around the patient which could cause effects. Wireless Phone Wireless HIFI Wireless Transmitter Mobile station Wireless Control Mobile Phone Microwave Wireless Alarm Microwave Station Mobile station Wireless PC Satellite Figure (1.10) the most common EMI interfaced into the human body 13

24 Chapter1 Introduction ISM Band Frequency For Medical Applications The implant biomedical system is under rapid development for many applications. There are demands for a higher data rate over the wireless environment that requires a high bandwidth and high frequency carrier. A new unlicensed Industrial Scientific and Medical ISM frequency band (402~405 MHz) was recently reserved for medical implant communication system by the FCC Federal Communication Commission, and recommended by ITU-R [192] [210]. This band seems attractive providing low body absorption at these frequencies comparing to other frequencies. Figure (1.11) demonstrates the most common frequencies covered in biomedical wireless applications. However, the frequency for transcutaneous telemetry devices rises up into the microwave band, which is shared with other wireless applications. Typically other applications use the microwave frequency band (2.45 GHz-5.8GHz), for example the satellite telemetry for animal tracking and microwave tomography for medical image analysis, and widely used devices such as RFID, Bluetooth, car alarms, microwave ovens and wireless home phones, which are operated at 2.45GHz, may cause interference effects for various implant devices. Disadvantages of using the microwave frequency in the human body, concern certain frequencies which have biological effects such as thermal damage or overheating of the blood or tissue [139]. Conversely, the chosen carrier frequency is most important for designing the electronic implant system, for less interference; our chosen frequency was 135 khz as RF power carrier frequency in our application, whilst our target frequency is 402MHz for the implant device. Proposed ISM Frequency Figure (1.11) ISM frequency bands used for medical applications 14

25 Chapter1 Introduction 1.4 Acquisition of Neural Signals To acquire and record neural signals, such as Electroencephalography (EEG) or electromyography (EMG), to assist understanding of the brain behaviour signals, requires processing of signals within active integrated electronic implant circuitry [114]. The EMG has an amplitude of only 1mV so to detect it an amplifier is needed and filtering is required for the noise or electromagnetic interference. Generally, the noise is generated by many common applications such as power lines, fluorescent lights, computer and monitors, and that is added and amplified with the EEG signal will often swamps the EEG signal [105] [140]. Figure (1.12) demonstrates the frequencies with respect to amplitude for different acquisition signals from the body. The Utah microelectrode array captures the respond commands signals from neuron cells, processing and coding this information and re-transmitted to the reader unit or interface PC. Eventually Utah electrodes are brought out to a small printed circuit board with multiplexer brought out to a micro tech connector [44] [150] and [151]. The architecture of the Utah microelectrodes arrays (UEA) is demonstrated in Figure (1.13). The UEA total is (10 x 10) array of 100 platinum tipped silicon extra cellular electrodes, and amplifies the neural signal from each electrode. This data is digitized and transmitted over an RF link mounted on the chip [168] [137] and [161]. It is necessary to increase the conveyed bit rate, and reduce the effects of the interference or increase signal to noise ratio (S/N), where the neural signal is less than 500μV. Figure (1.12) the frequencies and amplitudes of body signals 15

26 Chapter1 Introduction Finally, samples of signals captured by Utah microelectrodes are presented in Figure (1.14). Figure (1.13) the architecture of Utah microelectrodes array [151] Figure (1.14) Captured signals from Utah microelectrodes [196] 16

27 Chapter1 Introduction 1.5 Biomedical Telemetry Chips and Applications In recent years, many researchers have developed different packages of miniature implantable devices. To study the complex neurons involved in scientific phenomena such as cochlear disease, epilepsy, and aggressive behaviour, it is necessary to observe the electrophysiological activity in real time. Figure (1.15) shows the prototype samples of fabricated chips for medical purposes, and there are different chips for medical solutions such as blood pressure sensors, bladder sensor, and cochlear implant, retina and sphincter sensor [156]. However, there are many medical instruments that use electronic devices, such as insulin pumps and breathing activity monitor. There are still many biodevices under investigation for improving the power efficiency and coupling link and using different schemes for maximizing the data rate with low noise and minimum size. The second research point is the interface technology with the medical device and networks or appropriate adapters such as PC or mobile phones. This gives to the patient the flexibility to use the devices remotely. Figure (1.16) shows the biomedical device interfaces for communication and flexibility of technology for patient use [48] [49] [177]. Figure (1.15) the layout of different medical chips [49] Figure (1.16) the medical care interface communication 17

28 Chapter1 Introduction 1.6 Chapter Summary This chapter has shown an introductory summary of the recent and previous study cases and researchers working on biomedical implant telemetry devices applications. Briefly, it describes the disorders and ailments of the human body such as epilepsy, paralysis, Parkinson s disease, and nervous system disorders. It has briefly summarized the key design elements of most of the design factors for electronic implant devices that are commonly used in wireless communication. The Table below (1.2) shows the main comparison parameters between data rate and communication distance, for different biomedical applications. They use different modulation schemes over the wireless coupled link and different RF carrier frequencies. The term near field communication is used when signals are inductively coupled between reader and implant for data transmission. However, demand for a higher data rate for the acquisition data returned from the body is increasing, and requires an efficient modulation technique for achieving a high transfer rate and low power consumption. These are the main challenge factors in implant devices, and are therefore our goal in this work. For example, the human voice band is between 300~3400 khz; obviously it does not require a high RF frequency for manipulation. However, visual implants such as retinal implants or wireless endoscopy capsules, which work with image data and control signals transmitted in real time, deal with high speed data for transfer over a magnetic communication link. These types of technology may need a high rate modulator to encode the huge amount of information. Table (1.2) summary of the published research for implant devices TX- Carrier Frequency Data encoding Modulation Data - Rate Comm. Range Publication Year Publication References 125 to135 khz FSK 4kbps 20cm 2002 [201] 1.6-2MHz FSK 1.2kbps 3.5cm 2005 [179] 4 MHz ASK&PWAM 60kbps 2.8cm 2004 [128] 13.56MHz BPSK 1.12Mbps 1.5cm 2005 [135] 2MHz ASK 8bps 0.6cm 2005 [150] 27MHz FM 9bps 1-2cm 1998 [45] MHz FSK 20kbps 1-2cm 2005 [145] 868 to 928 MHz FM Low rate 91cm 2005 [151] 3.2 GHz FM Low rate 2.5 cm 1995 [204] 18

29 Chapter1 Introduction The previous table (1.2) compares the main research approaches for implant devices design. Most implantable biomedical devices have attributes of small size and high reliability, long retention rate, with very low power dissipation and field conformability. Clearly, most of the published works by researchers are using in analogue modulation and high carrier frequency, where the communication is still very short distance. So we consider in our work these points for introducing a new design for improved performance. Figure (1.17) shows the different biomedical devices applications and compares the power dissipation for each device with respect to data rate over communication range between telemetry device and reader over inductive passive coupling [67] [ 94] [ 158] and [164]. Endoscopy Capsule Retinal Cochlear RFID Pacemaker Figure (1.17) comparing the power dissipation for biomedical devices with respect to data rate 19

30 Chapter1 Introduction Finally, most of the acquisition data signals have been summarised, which can be observed or captured from the human body. Predominantly, this is generated by organs such as the heart under different conditions or is measured from the nervous system to communicate with the brain and perform the motion of the body's reaction with respect to the external world as shown in Figure (1.18). These are signals can be recorded monitored or captured from the human body. However, the new tele-medical health help care technology is able to access a web network that offers to the patient the facility for interface with hospital and their doctors remotely. Acquisition signals Capture Signals Pacemaker Cochlear Endoscopy Capsule Retina Blood Pressure Tester Blood Glucose Monitor Finger pulse Oxymeter Figure (1.18) the acquisition and capture of signals from the body 20

31 Chapter1 Introduction 1.7 Motivation of Thesis The main challenges in biomedical devices are strictly for a higher transfer rate, and transmitting over wireless communication. This mainly needs an efficient system to hand over the information with minimum error; enhanced encoding of information is the key factor to protect the original data especially with data acquisition returned from the human body, converted into digital information. Furthermore, the amount of health care data is increasing. It is called BIOSTEC which includes Bio-signals, Bio-medical devices, and Bio-health. Mostly the recent and previous reports and research in this area have studied the behaviour of diseases of the human body, such as epilepsy, brain, nervous system disorder; focusing on improving the prosthesis or treatment for it. This work tries to study and investigate the problem of low data rate over a given spectrum bandwidth. The challenge for design of a modulator is to transfer a high data rate from the implantable wireless device into a reader unit, over a digital channel at industrial scientific medical (ISM) frequency band. In addition, we need to work with new technologies to design an efficient and optimum system, to improve the low data rate for conventional biodevice systems. 1.8 Thesis Organization In this thesis we describe the current state of the research on a low power wireless telemetry system for medical applications. A study of existing biomedical device technologies and their key applications is presented. A brief assessment of future trends for wireless telemetry with a focus on emerging technologies with different digital modulation scheme techniques is given This thesis has been split into six chapters as: Chapter 1: This chapter describes the general knowledge overview of the bio-telemetry and biomedical devices applied for medical applications. For example, implant telemetry, telemedicine, and healthcare, which describe the types of implantable sensors and acquisition signals data from the human body. Most of the researchers working in this area mention the behavioural diseases, specifically focusing on the transfer of data over wireless environment using inductive link 21

32 Chapter1 Introduction solutions. We summarise in detail the main design parameters for a wireless inductive coupling link for biodevices technology. In addition, these are demonstrated, described and concluded in figures, graphs and tables. Eventually, we try to clarify the applications of most biodevices working with wireless transfer data and the biomedical devices applications. Chapter 2: This chapter focuses on analogue, digital wireless techniques for quadrature modulation, and coding the information signal. These are necessary as background for the digital modulator design in this thesis. We explore the basic principle of analogue and digital modulation categories, studying analysis mathematically and investigating different techniques. Methods which are commonly used for wireless applications may be suitable for biomedical implantable device purposes. The thesis also focuses on the appropriate modulation and demodulation techniques and the effect on power dissipation which includes the shared wireless received power with other parts in implant device, in a battery less system. Most of the common analogue and digital modulation schemes applied in biomedical devices, which are reported in many papers and journals, are reviewed, studied, and partially simulated. Summaries of the main modulation topologies appropriate for biomedical applications are the background of our work. Chapter 3: The third chapter presents the background of our work, the challenges, and tries to classify in four sections that can be specified as: first section: inductive coupling link. Obviously, this describes the background of the inductive coupling link and the principle of the magnetic coupling, covering the mathematical calculation for maximum transfer power, and optimum coupling coefficient between reader and implant, synthesis of power amplifier for transmission over the inductive link. The second part generally reviews the power amplifiers and emphasizes the power requirement to transfer the magnetic flux. That presents the new synthesized design for hybrid power amplifier transmitter link for class E and F power amplifiers. The third part covers the wireless power investigation to provide the essential DC voltage for implant devices inside the human body. 22

33 Chapter1 Introduction Finally, the last part demonstrates the wireless system that transmission of the high data rate over a wireless inductive coupling link. Chapter 4: The fourth chapter demonstrates our new work approach, which describes the main work for the proposed modulator. The VHDL programming code is used to generate n-psk digital signals. A new simple design for BPSK, QPSK and 8PSK modulators architecture modulators is applied for implantable telemetry applications. The modelled modulator has been designed and simulated and performance was evaluated by measurements. The design has low power consumption and size for biomedical applications. Furthermore, the advantages of this modulator are that it can be reconfigured and upgraded to enhance the data rate. Chapter 5: The fifth chapter concludes the hardware work in the thesis describing the complete system design. Generally, the work was classified in two main parts: reader units and implant device. The evaluation lab measurements were performed for each part of project, concluding with the hardware and the measurement results discussion. Chapter 6: The last chapter concludes and summarises the completed hardware work in this thesis: simulation, measurements and results discussion. A simulation-based comparison of several basic control algorithms has been carried out for controlling a different magnetic technique. This achieves good performance with auto-control and moderate complexity. Finally, the work described in this thesis can be improved and extended in many ways as mentioned in the suggestions for Future Work. 23

34 Chapter1 Introduction Publications The following publications arising from this thesis work have resulted in posters and submitted publications. A. Posters 1. Gihad Elamary, Graeme Chester, Jeff Neasham High Bandwidth Transcutaneous Wireless Telemetry The second event of the poster competition at North Umbria University (Supported by UK GRAND) UK on 03/05/ Gihad Elamary, Graeme Chester, Jeff Neasham Implantable telemetry devices Newcastle University medical school poster competition on 05/05/ Gihad Elamary, Graeme Chester, Jeff Neasham Implantable Electronics telemetry Devices Graduate Poster Conferences Competition at Leeds University. (Supported by UK GRAND). 09/07/2007 B. Conference papers 1. Gihad Elamary, Graeme Chester, Jeff Neasham Experimental Digital BPSK Modulator Design with VHDL Code for Biodevices Applications. Porto-Portugal,14/17.January BIOSTEC_Biodevices-2009.IEEE 2. Gihad Elamary, Graeme Chester, Jeff Neasham A Simple Digital VHDL QPSK Modulator Designed Using CPLD/FPGAs for Biomedical Devices Applications, London-UK 03/12/2009/ WCE_2009. ICEEE. 3. Gihad Elamary, Graeme Chester, Jeff Neasham An Analysis of Wireless Inductive for Higher Data Rate Biomedical Telemetry Using a New VHDL n-psk Modulator 16th ICECS th-16 th /12/2009. IEEE 24

35 Chapter 2 Literature Review for Analogue and Digital Modulations Applied in Biomedical Applications

36 Background and Literature Review Chapter II 2. Implantable Devices Modulation Schemes B IODEVICES have increased rapidly in recent years; there has been a relentless push for a higher data rate and lower power consumption, augmented toward the wireless infrastructure environment. Principally, the gathered acquisition returned data from the body is defined as up-link, while the downlink provides the essential RF power signal and control information into the implant device. However, the modulator and demodulator are targeted for synthesis with low power consumption, and simplicity of circuits for implant devices [104] [136]. The magnetic field influence from a reader is modulated; subsequently a simple demodulator is use to detect the data at the implant part. The most common and simple modulator used is amplitude shift keying (ASK) [57] [65]. Typically, different RF schemes are applied for powering the implant downlink and back modulation from the body. Up-link techniques will be described in this chapter. In Figure (2.0), we demonstrate the most common analogue and digital modulation techniques applied for implantable communication that will be compared to our proposed VHDL-QPSK modulator design discussed in chapter four in detail. Figure (2.0) Modulation techniques applied to most biomedical devices 25

37 Chapter2 Analogue Modulation Background 2.1 Analogue Modulation Background Introduction To Analogue Modulation Analogue modulation schemes are generally limited in biomedical applications. There are few reported papers implementing the analogue modulation such as amplitude modulation (AM), frequency modulation (FM) and pulse width modulation [115], [125]. The analogue schemes can be classified into two categories; the pulse shape modulation (PSM) and the pulse time modulation (PTM). The classification hierarchy of the most common analogue modulation formats applied in telecommunication coding is described in Figure (2.1). One of the simplest applications of this format is pulse amplitude modulation (PAM), in this technique the amplitude of individual, regularly spaced pulses is varied in accordance with the amplitude of modulating signal. Such a format is inefficient with bandwidth, and does not deliver the signal to noise ratio (S/N). On other hand, the demodulation of PWM is complicated at implant device applications [137] [184]. Practically, the ASK modulation is more suitable than FM and AM at implant device [190], which uses a simple demodulator for reproducing the data. The second goal for designing the ASK demodulator is to reduce the effect on the implant device performance since it is sharing the same source as wireless power [136]. Obviously, the conventional analogue modulation is not appropriate for the most of biomedical devices as large circuits are needed and this causes high power dissipation, which is the main disadvantage of this scheme. Analogue Modulation FM / AM Pulse Time Modulation Pulse Shape Modulation Isochronous An-isochronous PAM PSM PWM PPM PIM PIWM PFM SWFM Figure (2.1) demonstration of the hierarchy of analogue modulations 26

38 Chapter2 Digital Modulation Background 2.2 Background of Principle Digital Modulations Introduction to digital modulation This section explains briefly the digital modulation techniques applied for biomedical devices. Generally, the transmissions of digital information are increasing at a rapid rate, which are used in several biomedical applications, to communicate between implant and reader. The most common modulation schemes are ASK, PSK, BPSK and QPSK employed in near field communication or satellite telemetry, RFID and commercial smart cards [1] [184]. Typically, there are other digital modulators, which not discussed in this thesis [9] [27] [216]. However, we describe in Figure (2.2) the classification hierarchy of the most common digital modulation formats [199], and investigate most of the common digital modulations, which are appropriate for medical application in this work. We are considering the simple implementation circuit, in reader unit or at implant devices, and these are analyzed and simulated where used to design a digital modulator that is suitable for medical purposes. However, in this thesis we choose pulse shape modulation techniques and selected the QPSK modulation as more appropriate to implement within digital hardware. Digital Modulation ASK FSK Pulse Time Modulation Pulse Modulation Isochronous An-isochronous PSM n-psk OPPM PCM DPWM DPPM MPPM BPSK QPSK 8PSK 16PSK RZ NRZ DPIM DPIWM IM Manchester Code Miller Code AMI RB NRZL NRZI Figure (2.2) demonstration of the hierarchy of the most common digital modulation schemes 27

39 Chapter2 Digital Modulation Background ASK Modulation Background One of the simplest digital modulations is amplitude shift keying (ASK) or OOk (On/Off keying); these are commonly employed in wireless systems such RFID and biomedical device applications. It is a simple modulation and demodulation scheme with simple hardware implementation, known as one-dimensional modulation, where no carrier is presented during the transmission time. This conserves the power consumption of the modulator [65] [104]. The principle of ASK transmission is shown in Figure (2.3) and the constellation diagram is depicted in Figure (2.4) [10]. The mathematical expression for ASK modulation is presented in equations (2.0) and (2.1) respectively, where b(t) is defined the binary message and c(t) defined the carrier signal E represents the bit energy and the b T is defined by the bit duration. b S ASK ( t) b( t) c( t) (2.0) Where E binary 1 2E b b b( t) and c( t) T cos( ct) b 0 binary 0 S ASK 2Eb cos( ct) (2.1) T Figure (2.3) Principle of ASK modulation Figure (2.4) Constellation diagram of ASK signal 28

40 Chapter2 Digital Modulation Background The spectrum of an ASK signal is shown in Figure (2.5) which demonstrate the upper side band (USB) and lower side band ( LSB) of the transmitter signal. Figure (2.5) Spectrum of the ASK signal The second method for generating an ASK signal is by changing the modulation depth which is expressed by [(A-B)/ (A+B)*100%] as shown in Figure (2.6), where A, B represents the maximum and minimum amplitudes of modulated signal waveform. The Fourier series coefficients of pulse signal with amplitude of (a) and duty ratio of D given by the function is even so the (b) coefficients are all zero [28] [ 39] and [40], whereas the Fourier coefficient of the fundamental frequency is a function of duty ratio D. From this ratio we can control the duty and control ASK depth by modifying the pulse duration K as shown in Figure (2.7) where the duty ratio is (D = K/T). For example, the ASK modulator can be designed at 10% of modulation depth by having fixed carrier signal amplitude that provides stable power transfer and independent data modulation; this is suitable to provide constant RF signal into an implant device. These advantages give high readability for DC voltage at different distances from the reader coil at the implant part. Compared with other demodulators such as AM and FSK or FM, the ASK demodulator is practically a more simple design for implant parts. However, if we are considering this modulation for implant design, the ASK modulation suffers from a low data transmission rate. Consequently, that is not appropriate for this work as an up-link modulator for implant parts. ASK is also most susceptible to the effects of non-linear devices, which may compress and distort the signal amplitude. Typically, to avoid such distortion the system must operate in the linear range away from the point of maximum power. 29

41 Chapter2 Digital Modulation Background where most of the non-linear devices behaviour occurs. Figure (2. 6) the pulse controlling in the modulation depth Figure (2.7) the ASK modulation depth ASK Demodulation Technique The demodulator technique in biodevices is still a challenge with the implant devices, for ultra low power circuit operation [113] [116] [158]. Principally, the ASK received signal is demodulated by an envelope detector after a tuned circuit at resonant frequency, the demodulated signal then passes through a LPF. Due to high input signal at short range, typically a few centimeters, there is no need for an amplifier as a simple Schmitt-trigger is able to provide and shape the output of the demodulator, and buffered [57]. The block diagram of common ASK demodulator is presented in Figure (2.8). The ASK demodulator will be discussed further in detail in chapter (5). Figure (2.8) the block diagram of ASK demodulator [57] 30

42 Chapter2 Principles of M-PSK modulation 2.3 Principle of n-psk Modulation Binary Phase Shift Keying (BPSK) This chapter reviewed how different types of digital modulation schemes are in use in wireless communication for the biomedical modulation techniques in our work studied. The most common digital schemes appropriate in biomedical transmission are briefly described such as: PSK, BPSK and QPSK [54], [102]. However, it is an important challenge to transmit and read the data from/to exterior world body with minimum noise. Typically, numerous different types of modulations are applied for transmitting signals using either analogue or digital modulation. The power consumption is a very important factor in a battery-less system. In practice, the modulator is the critical part of the design in most biomedical device that could reduce the implant performance. The first simple digital modulation scheme is the binary phase shift keying (BPSK), which offers a practical circuit implementation. The carrier shifted by influence the input binary data for transmitting 1-bit, which dose not change the phase carrier sin( t), while there is change for the carrier phase by sin( t) for 0-bit. However, the BPSK is only able to c modulate 1-bit/symbol, which may not give high enough data rate, where the bandwidth (BW) is limited [10], [27]. Conceptually, in digital communication, the information signals are usually binary data, which needs to be converted in to a NRZ signal for encoding the data, and the carrier is continuous wave (CW) sinusoidal signal. The principle of the BPSK Tx modulator is demonstrated in Figure (2.9); it includes a filter for output signal for harmonic suppression. c Figure (2.9) the block diagram of the BPSK modulator 31

43 Chapter2 Principles of M-PSK modulation The binary data selects one of the two opposite phases of the carrier; the carrier signal is shifted by the input data information. The result of this process is to provide a BPSK signal, which is illustrated in Figure (2.10). Graphically, this can be represented by two dots on the constellation diagram [53] [73]. Figure (2.10) the BPSK waveform with respect to binary state The result of this modulated BPSK signal can be expressed mathematically in equation (2.2); where the phase shift (t) is given by input data m (t) represents the input stream of data with a value of for logic (1). ( t) i, with i = 0 or 1 represents the input bit. The binary ARF for logic (0) and ARF 2Eb SBPSK ( t) m( t) cos( ct) (2.2) T b There is a wide sinc response in the frequency domain around the carrier frequency. The power spectral density for BPSK signal can be mathematically expressed in the equation (2.3) [54]: S BPSK ARf Tbit sin [( c) T / 2] ARf T bit bit sin [( c) Tbit / 2] ( ) (2.3) [( ) T / 2] 4 [( ) T / 2] c bit c bit The spectrums of the transmitted BPSK signal is shown in Figure (2.12), where the T bit is the bit period, and the width of the main lobe, referred to as the null-to-null bandwidth is found to be twice the bit rate R : b 32

44 Chapter2 Principles of M-PSK modulation BW BPSK 2 2Rb (2.4) T b Figure (2.11) Spectrum for the BPSK Signal Demodulator For BPSK There are many BPSK demodulation methods and techniques such as the Costas loop, remodulation or inverse modulation, multiply filter divide method, square loop and pulse detection [63], [ 99]. We describe the most popular and simple techniques for demodulating the BPSK, the classic type is the Costas loop demodulator, which is widely used in wireless communication and is described in Figure (2.12). The system involves two parallel tracking loops operating simultaneously from the same VCO (Voltage-Controlled Oscillator) The first loop is the in-phase loop I, and the second, called the quadrature loop Q uses a 90 degree shifted VCO. The result of Q and I multiplier outputs are filtered by single pole Butterworth low pass filters. Then, Q and I filter output are multiplied together and the product is scaled and filtered to produce the loop error used to control the VCO. The loop error should settle to a value when the loop is locked. A negative loop error decreases the VCO increment resulting in a lower VCO frequency, and similarly a positive loop error increases the VCO increment resulting in a higher VCO frequency [51]. The second method of BPSK demodulation is the coherent receiver using an anti-parallel 33

45 Chapter2 Principles of M-PSK modulation synchronization loop [51] [110]. There are many techniques in this method, which have been described and one of these techniques is for demodulating the BPSK received signal. The block diagram of anti-parallel synchronization loop circuit is shown in Figure (2.13). It contains a dual loop with a 180 phase shifter in the lower loop. The phase detectors used for this anti parallel loop utilize two multiplier type detectors, and a DC offset V dc at each detector. These DC offsets are introduced using two voltage summers, which play an important role for the operation of these anti-parallel loops followed by two switches, an inverter and a comparator, as a control circuit [60],[74]. Figure (2.12) the Costas loop demodulator for BPSK Figure (2.13) the Anti-parallel synchronization loop demodulator for BPSK 34

46 Chapter2 Principles of M-PSK modulation Different topologies have been used to improve the bit error rate (BER) at the receiver, which indicates the demodulator performance with respect to signal noise-to-ratio. In BPSK the phase of the constant amplitude signal is switched between two values due to two possible data signals S1 and S2 corresponding to binary 1 and 0 respectively; typically, the transition phase is 180. Mathematically the average probability of symbol error can calculate the analytical probability of detector error for BPSK demodulation at ( R / 2 ) is given in equation (2.5). e R b E 1 b P e 2 erfc (2.5) N0 E b is the energy per bit for BPSK symbol rate one bit, N0 is the noise power spectral density, and the complementary error function ( erf ) is defined by: erf ( x) x e x dx (2.6) erfc( x) 1 erf ( x) (2.7) Hence, the BPSK has double the ( E b / N0 ) for BFSK signal, this is obvious when comparing the bandwidth of BPSK with respect to BFSK. The BFSK requires twice the bandwidth of BPSK for the same data rate. This means that the probability of false decision in the BFSK is double its BPSK counterpart [89]. The bandwidth increases with the increase in the number of bits per symbol; this affect the efficiency of the demodulator. The channel bandwidth required to pass M- array PSK signals is expressed in equation (2.8). b B BPSK 2 (2.8) T b T is the symbol duration that is related to bit duration by (2.9) gives: R 1 b Tb, substituting this in equation B BPSK 2Rb (2.9) log 2 M 35

47 Chapter2 Principles of M-PSK modulation R b B bits / Hz (2.10) B where the B defines the bandwidth efficiency we substitute equation (2.9) in the equation (2.10) which yields: log 2 M B (2.11) Quadrature Phase Shift Keying (QPSK) The efficiency and bandwidth in the wireless communication are mainly important and the quadrature carrier multiplexing system has been proven to be effective for this purpose in such systems [66] [56]. The QPSK modulation is a 4-ary PSK signal, the phase carrier acquires four discrete states (45º, 135º, 225º, 315º) or (0º, 90º, 180º, 270º) as shown in Figure (2.14), which correspond to a pair of message bits. The symbol period is twice the bit period T 2T ; it is used for increasing the bandwidth and the spectrum efficiency. The binary data stream is divided into two separate streams in two-dimensional phase (I-phase), and (Q-quadrature). The RF signal can be represented in polar coordinates by magnitude and phase, in digital radio terminology, X is represented by I and Y replaced by Q. The (±90 º) degree shifter generates the quadrature signals; that yield the transition with respect to the input binary data as shown in Figure (2.15). s b S ( ct) QPSK Ac cos( ct) 2 Ac cos( ct) 2 A cos( ct) 2 Ac cos( t) c 2 Ac sin( ct) 2 Ac sin( ct) 2 Ac sin( t) c 2 Ac sin( t) c Figure (2.14) the transition with respect to binary data states for RF QPSK signal 36

48 Chapte2 Principles of M-PSK modulation Figure (2.15) Constellation diagram of QPSK signal All analogue or hybrid analogue/digital QPSK modulators work with the carrier phase shift angle (φ) as a key of modulation. The phase shifter is the most important part in the modulator to acquire two discrete signals sin( t) and cos( t) [172]. However, the NRZ format is essential c c for mapping (I) and (Q), the analogue QPSK signal can be represented mathematically in the equation (2.12). The transition of the RF carrier signal is influenced by the binary input data is depicted in Figure (2.16). Practically, it uses a Direct Digital Synthesizer DDS [23] [182] or a Numerical Control Oscillator to perform the carrier transitions [55] [166]. S 2Es ( t) [cos( ct ( i1) 2 ] T ( QPSK s s 0 t T, i =1, 2, 3, 4) (2.12) by using the trigonometric identity equation (2.12) can be rewritten for the interval defined in equation (2.13), where ( I ) and (Q )are expressed in equations (2, 14) and (2.15): S QPSK 0 t Ts as 2Es 2E s ( t) [cos( ct ( i1) 2 ]cos( ct) sin( i1) 2 sin( ct) (2.13) T T s s 2E Ts s I( t) cos[(2i 1) 4] 2E Ts s Q( t) sin[(2i 1) 4] (2.14) (2.15) 37

49 Chapter2 Principles of M-PSK modulation Figure (2.16) illustrates the QPSK waveform with respect to binary and NRZ states The typical analogue QPSK modulator that generates a QPSK analogue signal is demonstrated in Figure (2.17). Figure (2.17) the block diagram of conventional QPSK modulator 38

50 Chapter2 Principles of M-PSK modulation Obviously, the bandwidth of QPSK signal is shown in Figure (2.18), only half ( R / 2 ) of the BPSK for the same data rate as compared between them. The signal of QPSK has closer points to each other as illustrated in the constellation diagram in Figure (2.15). However, this causes it to increase the probability of error with respect to data and noise, which adversely affects the modulation quality [129] [131]. The advantage of QPSK modulation is that the carriersuppressed modulation decreases the spectral energy density, because the carrier energy is not in the frequency spectrum that makes it difficult for the receiver to recover it. It can be seen that most of the QPSK signal energy transmitted and the carrier is null (suppressed carrier) thus saving most of the energy of the carrier as shown in Figure (2.19). S QPSK Ab Tb sin [( c ) Tb ] Ab Tb sin [( c ) Tb ] ( BW ) (2.16) [( ) T ] 2 [( ) T ] c b The bandwidth of the main lobe for the bit rate R b and T b is the bit period, in equation (2.17): c b b BW QPSK Rb 1 2 Rb (2.17) 2 T b Therefore, the QPSK requires only half of the bandwidth of the BPSK for the same data rate. In addition, the adjacent points in the signal constellation diagram for QPSK are a smaller distance apart compared to BPSK, which increases the probability of error in the presence of noise, which may affect the modulator quality. However, the symbol energy ( E ) in QPSK is given in equation (2.18): E S 2 b A 2 (2Tb ) Ab Tb (2.18) 2 Furthermore, the technique can also be extended to higher modulation level such as 8-PSK. The phase shift for the carrier has eight possible states, (45º) in I/Q plane, and each symbol is composed of 3 bits as shown in Figure (2.19). In 8-quadrature amplitude modulation (QAM), there are 8 phases in the I and Q plane. It can extend to more modulation levels for example 16- QAM up to 256QAM both the phase and amplitude of the transmit carrier are varied [95], [111] and [32]. That means the separation between phase states becomes smaller and increases susceptibility to noise. s 39

51 Chapter2 Principles of M-PSK modulation Figure (2.18) the Spectrum density for QPSK Signal However, we describe M-PSK modulation, which is appropriate for our application for biodevices topology. The 8PSK is usually the highest order PSK constellation used, with more than 8 phases, the error-rate becomes too high and there are better, though more complex, modulations available such as quadrature amplitude modulation. Although any number of phases may be used, the fact that the constellation must usually deal with binary data means that the number of symbols is usually a power of two. Figure (2.19) the constellation diagram for 8-PSK 40

52 Chapter2 Principles of M-PSK modulation Demodulation of QPSK The demodulation techniques for QPSK are similar to BPSK demodulation as they are modified by the Costas loop [129]. The most popular and simple techniques for demodulating the QPSK can be described as; the Costas loop, re-modulation, and multiply filter divide method. While the re-modulation is stochastically equivalent to the hard limited Costas loop, the multiply filter divider method is always used in high data rate. However, many applications use the Costas loop, which may extend to lock onto a modulated QPSK signal with modifying the hardwarelimited signal as shown in Figure (2.20). The two low pass filters in the I /Q branches of the QPSK demodulator are followed by a limiter, which directly changes the filter output voltages to the highest level or lowest when there is a phase error. Provided that two independent binary data x (t) and y (t) modulate two orthogonal components of the carrier, where x (t) and y (t) have the values of (+1) or (-1) representing binary one or zero respectively. Practically, there are modern digital demodulators, which offer more reliability and simple design for either BPSK, or QPSK demodulators [118], [129]. Figure (2.20) the block diagram of the QPSK demodulator However, the main important factor for demodulator is measuring the BER typically to evaluate the demodulator performance efficiency and reliability. In order to achieve the same bit-error probability as BPSK the QPSK uses twice the power, since two bits are transmitted simultaneously, the MATLAB simulation, which compares BER between the BPSK and QPSK as shown in Figure (2.21). 41

53 Chapter2 Principles of M-PSK modulation Hence, the symbol error probability for QPSK can mathematically be expressed in equation (2.19), where ( P b ) is the bit error rate and ( Q ) represents the complementary error function the [32], [95] as: P e 2 1 (1 Pb ) (2.19) P b Q 2E N 0 b E b 2 E s P 2Q Q (2.20) b N 0 N 0 The probability of the symbol error for QPSK can be approximated as: E b P 2Q (2.21) b N 0 Power Efficiency for M-array: The power efficiency of M-array signal can be mathematically estimated, defined as power efficiency ( ) [9], [27]. In particular, it compares the nearest neighbours approximation as in p equation (2.22), where the analogue of M-array signal can defined as power efficiency as in equation (2.23). d min P N Q (2.22) e dmin 2 d min p (2.23) E b 2 We can rewrite the equation (2.22) which gave the nearest neighbours approximation as expressed in equation (2.24): P e N dmin Q E p 2N o b (2.24) 42

54 Chapter2 Principles of Quadrature Technique Figure (2.21) Simulation for the BER comparing between BPSK and QPSK 2.4 Quadrature Signals Generation Techniques There are several techniques for generating the desired phase shifter with different circuit 0 topologies, to generate sine and cosine with 90 shift. In this section, the most common circuits and phase generators in wireless techniques will be briefly described with their characteristics, advantages and limitations. Typically as background for our proposed digital modulator, we investigate the appropriate alternative topology applied for biodevice applications Direct Digital Synthesizer (DDS) Direct Digital Synthesizer DDS performs the same function as a numerical controlled oscillator (NCO) [55]; basically it is a technique using digital data and mixed with analogue signal, it is used especially for a precise fast frequency and phase tunable output [189] [83]. It generates signals at different phase carriers waves one ( sin( t) ) or ( cos( t) ) [23] as shown in Figure (2.22), the architecture block diagram of DDS. The phase is calculated between increment points (memory location) skipping technique and a constant interpolation of the stored signal, which runs at a constant update clock rate as the increment phase points (number of sampling per 43

55 Chapter2 Principles of Quadrature Technique waveform cycles), and the output frequency is increased, as shown Figure (2.23). However, the DDS is easily reconfigurable to change the channel spacing and bandwidth, and allows the implementation of several digital schemes. Figure (2.22) the architecture of DDS Block diagram Figure (2.23) the Phase changing diagram PLL Using Voltage Control Oscillator Phased lock loops (PLL) have been used either in analog or digital implementations [191]. Synthesized for digital applications and data synchronization, frequency synthesis modulators and demodulators act as multipliers for generating the desired carrier frequency [124] [220]. However, the general architecture of the PLL is shown in Figure (2.24); it is composed of a voltage-controlled oscillator (VCO) [106], phase detector, frequency divider and low pass filter. 44

56 Chapter2 Principles of Quadrature Technique Figure (2.24) the principle architecture for PLL diagram [220] LC-VCO Tuning Oscillator Many biomedical transmitter or receiver circuits use the LC-VCO. This can provide good performance at low cost and low power consumption [106]. The low noise VCO can provide a wide tuning range with low power consumption and low phase noise. The LC oscillator has loosely, a tank combined with a noiseless energy restorer that keeps constant oscillation amplitude. This is a most important factor for LC-VCO circuits and decreases the power dissipation and phase noise [152] [170]. The circuit diagram for the LC VCO circuit is demonstrated in Figure (2.25), where the phase noise can be calculated by the formula [173]: 2KT f 0 L( f ) 10log (2.25) Pdiss, tan K 2Qtan kf Where we define Boltzmann s constant ( K ), the ( P is absolute temperature in degrees Kelvin,( Q tan k diss tan k, ) is the signal power in watts, and (T) ) is the quality factor for LC circuit. The performance of the VCO is expressed by the widely used Figure of Merit( FOM), which is defined in equation (2.26) as: f 0 PD FOM L{ f } 20log 10log (2.26) f 1mW where( L{ f })is the measured phase noise at the frequency offset ( f ) from the oscillation 45

57 Chapter2 Principles of Quadrature Technique frequency of ( f 0 ) and ( P D ) is the power disspation in (mw). Figure (2.25) the LC-VCO principle of circuit diagram Ring Oscillator The other kind of simple oscillator used in biomedical applications is the ring oscillator. The association in closed loop, of an odd number of inverters, constitutes the realization of a ring oscillator. Use of this oscillator type avoids the use of inductances for frequencies up to several MHz [158]. The principle of the ring oscillator is described in Figure (2.26). Figure (2.26) the ring oscillator principle The oscillator is achieved by the association, in closed loop, of an odd number of inverters interlaced by capacitance as shown in the above figure. The number of inverters and capacitance values permits us to adjust the oscillation frequency to the desired value. 46

58 Chapter2 Principles of Quadrature Technique This frequency can be calculated by the mathematical expressions in equation (2.27), (2.28), (2.29) and (2.30) respectively, where ( tp HL ) and ( tp LH ) represent delay times respectively to the fall and the rise time of every inverter, and V DD is represent the source voltage. f tp Osc HL 1 N.( tp tp ) (2.27) HL WP p LP dd LH 4C (2.28) K. V tp f LH Osc 4C (2.29) K. V Wn p LP dd Wn 3. K n ( L ). V p dd (2.30) 16. N. C 2.5 Quadrature Phase Shifter and Mixers Types of Phase shifter Balance phase shifter Conceptually, both the modulator and demodulator in analogue schemes are required to generate 0 / 2 or 90 out of phase signals in each quadrature carrier pair as demonstrated in Figure (2.27). The accuracy of splitting the phase signal will affect the modulator s characteristic performance [124]. There are varieties of baluns applied in modulators and mixers, to convert an unbalanced single input carrier signal to a pair of balanced signals. 90 Phase Shifter 180 Balun Figure (2.27) the balun phase shifters block diagrams 47

59 Chapter2 Principles of Quadrature Technique One type of simple balun is the central tap transformer that is illustrated in Figure (2.31), which works at low frequency up to a few GHz, working on the principle of magnetic induction. The input signal is split between the output signals with a 180 phase shift with zero dc power. The disadvantage of the balun is that it is physically large for medical applications especially in implant device; hence, it is not appropriate for this work. Figure (2.28) the diagram of a simple balun using a transformer tap centre RC-CR The phase shift for the carrier wave can be provided by different topologies of circuit design, ultimately considering low phase and amplitude error. The simplest is (RC- CR) resistance, capacitor network, which has a small footprint in the circuit and zero DC power consumption. It has a wide margin for overcoming phase errors [97]. The integrating and differentiating (CR) circuit is shown in Figure (2.29). The RC phase shifter consists of a pair of R resistance and C capacitor, with the values chosen to yield a transfer function that has constant magnitude for all 0 the frequencies and provides phase difference between their output signals of90, which 0 provides a simple technique to shift the carrier signal by 45. The phase difference between the two outputs is cut off frequency 1 RC for all desired band frequencies, whereas the amplitudes are equal only at a 48

60 Chapter2 Principles of Quadrature Technique RC- polyphase network Figure (2.29) shows the RC-Polyphase network diagram 0 In general, the polyphase network has an all pass response with the desired 90 phase difference appearing at the cut off frequency of 1 RC, where the difference inputs are shifted by c / 0 45 toward each other before they are combined [66]. However, to use integrated polysilicon resistance exhibits a large tolerance more than 20%, for small resistance values, whereas high tolerances are critical, as discrepancies will change the cut off frequency introducing phase errors at the desired frequency. The variable resistance of an NMOS transistor based in the triode region is used with the resistance controlled by a tuning voltage V Tune applied to the gate of an NMOS transistor as shown in Figure (2.30). Figure (2.31) shows the RC circuit of the polyphase network. Figure (2.30) the RC-polyphase network diagram 49

61 Chapter2 Principles of Quadrature Techniques The effective resistance (R) is approximately given by: 1 R W ncox ( VTune VT ) L Where ( ) is the electron mobility, ( C n ox (2.31) ) is the gate oxide capacitor per unit area, (W) and (L) are the width and length of the transistor, ( V T ) is the threshold voltage. Obviously, from this equation (2.31) he resistance value is inversely proportional to the tuning voltage ( V Tune ) and it can vary to adjust the cut-off frequency Active Balun Figure (2.31) the NMOS FET resistance working as variable resistor The active baluns used the FET transistor to create a signal out of phase from the input signal, which can be very compact at low RF frequencies comparing to the transformer tap centre. Generally, the FET transistor will inherently add the thermal noise to the output signal about 1 / f [92]. This will draw dc current and increasing the consumption power of the modulator. The following is a simple active balun using a single FET transistor, shown in Figure (2.32). Figure (2.32) the single FET phase shifter circuit 50

62 Chapter2 Principles of Quadrature Techniques The input signal to the FET is transferred in phase to the source and 180 out of phase at the drain in low input frequency signal. The voltage gain of the FET can be analyzed as the voltage outputs V out1 andv out2. The relation betweenv out1 and V input can be expressed in equation (2.32) as: V V out1 input 1 R s g m Rs g (2.32) 1 m Rs g m The same process for the relation betweenv to out2 V can express in equation (2.33) as: input V V out2 input 1 g 1 Rs g m d ( g mrd ) (2.33) m R 1 R s g m where g m represents the transconductance of the FET and R s represents the resistance at the transistor source; finally the R is the resistance in transistor Drain. Obviously, these equations d will give phase independent of the component values. For accurate equal amplitudes, the condition R R must be satisfied. Moreover, there are other parasitic capacitances in the FET, s d which can contribute further to phase imbalance at higher frequencies as depicted in Figure (2.33). Figure (2.33) Single FET parasitic capacitance at high frequency 51

63 Chapter2 Principles of Quadrature Techniques CG-CS Active Balun The active balun has better performance and less error in phase. The transistor configuration used is a common-gate, common-source (CG-CS). The common-gate transistor amplifies the input carrier signal in phase, while the second common-source amplifies and reverses the phase; this is shown in Figure (2.34). Figure (2.34) the CG-CS Active Balun FET phase shifter circuit With matching the gain of amplifiers, the outputs can be of equal amplitude. The input impedance for the first stage common-gate FET is approximately given by the relation1 /g, m which yields a low input resistance close to the ( 50 ). The biasing source resistance R Bias should be considered in the design to avoid affecting the input impedance or attenuating the input signal [54, 97]. 2.6 Modulator Mixer In communications, the mixer is the main part in the modulators, which converts a signal IF to another frequency RF signal in the up-converter case. A mixer can be up-converter or down converter by multiplying by local oscillator LO; there are many techniques to implement the mixers. We can classify them into two types, active mixers and passive ones. The active mixers have an associated gain, whereas the passive mixers can achieve a fixed gain or have loss. 52

64 Chapter2 Principles of Quadrature Techniques Active Modulator Mixer In active modulator mixers, the Gilbert cell mixer is a very common mixer applied in modulators, which lends itself particularly well to monolithic integration and has several advantages, including high port-to-port isolation and spurious signal cancellation because of its signal and double balance structure [71] [ 90]. However, more stable mixers are double balanced mixers, also known as Gilbert Mixers, which are preferred over the single balanced implementations. The Gilbert cell eliminates local oscillator LO-to- intermediate frequency IF, and RF-to-IF feed through which can increase linearity, furthermore susceptibility to supply voltage noise can be decreased [10] [34]. In the real implementations for mixers, the LO input signal can be a square wave signal or sinusoidal signal. This may due to high abrupt switching characteristics for the CMOS transistors, which improve performance and reduce the noise. The local oscillator LO sinusoidal signal is used because it has a very steep slope at high frequencies. Generally, the Gilbert mixer is shown in Figure (2.35). V dd IF+ R L R L IF- BB RF M3 M4 M5 M6 LO+ LO- IF RF RF+ M1 M2 RF- L s L s LO I ss Figure (2.35) the Gilbert mixer working in RF circuit 53

65 Chapter2 Summary 2.7 Chapter Summary of Modulation Schemes We have explored the basic principle of analogue and digital modulation categories in this chapter, and investigated different techniques used in a wireless communication. Most of the modulations, which are commonly used in wireless applications, were reviewed and they may be suitable for biomedical implantable devices. In general, we have focused on the appropriate digital modulation and demodulation techniques applied either in the reader unit or at the implant device. However, we can classify the conclusion of this chapter into three sections: Analogue modulation schemes We conclude that all types of analogue or hybrid analogue/digital n-psk modulators work with phase shift carrier angle ( ), as the key element for the digital modulation in this work. The phase shifter is the most important part in the modulator, to acquire two discrete signals sine and cosine. In practice, most common applications use the Direct Digital Synthesizer or Numerical Control Oscillator to generate the RF carrier signal. The conventional analogue modulators have high circuit complexity and high power dissipation; these disadvantages are unsuitable for implantable medical purposes. Regarding the advantage of digital modulation, it offers a digital synthesis flexibility, reconfiguration, and upgrade, when compared to analogue schemes. We can conclude that most of the analogue modulations are not appropriate for implantable purposes, as the digital modulation is the target in this thesis. Digital modulation schemes The digital schemes, which are used in biomedical devices, are more reliable than analogue modulation as they have many advantages such as less power consumption and hardware implantation, in addition to less circuitry size. Summary of the modulations applied for biomedical purposes We conclude with the most common factors to design a digital modulator for medical implant devices, where the dissipation power consumption by modulator is in the range of (0.55~ 0.75mW) from the total of the wireless received power at implant device, and the operating voltage is in the range of (1.8~3.3 V). The second challenge point in this work is to design a higher data rate modulator for coding the acquisition data returned from the body, which is a 54

66 Chapter2 Summary function of the modulator design and the carrier frequency for communication between reader and implant device. Generally, there is a comparison in Table (2.1) below of the most common parameters between analogue and digital modulations, as published, and these were discussed in chapter one. Finally, these introductory analyses for our proposed modulator design will be the background for coding data for medical implant devices. Combining the hardware with the software, which is capable to reconfigure a digital modulator, will be discussed in chapter four in detail. Power Data Operation Communication Consumption Carrier Rate Voltage distance power AM Full Low rate 3.3~5V Unknown Unknown FM Null Low rate 3.3 V Up to 9 cm Unknown FSK Full Low rate 3.3V Up to 3.5 cm Unknown ASK Full Up to kbps 2.5~3.3V 1~2 cm Unknown BPSK Null Up to Mbps 2.5~3.3V ~2 cm Unknown QPSK Null Up to Mbps 1.8~3.3V Unknown Unknown DPSK Null Up to 2Mbps 4.5~5V Up to 2.5cm ~8.4mW Table (2.1) comparison for most modulation types in wireless implantable electronic medical devices Proposed Modulator Our proposed Modulator Target Figure (2.39) the proposed modulator target design inside the implant device 55

67 Chapter 3 Inductive Coupling link Power Amplifier And Data Transmission for Transcutaneous Telemetry

68 Inductive Coupling link, Power Amplifier and LC Antenna Design 3. Inductive Coupling Link 3.1 Theory and Background for Inductive Coupling link W IRELESS inductive coupling is an attractive developing technology for biomedical applications, which use magnetic coupling as the communication environment, that is common with RFID techniques [1], [126]. Practically, the RF short-range communication transmits a low power, which is less than a milli watt, radiated RF power signal from reader coil antenna, which is mostly designed to offer fixed sinusoidal carrier amplitude, that provides a stable wireless transfer power. The stability of the RF signal gives a high readability for DC voltage at the implant device in terms of the distances from the reader coil [121] [122]. However, the biodevice system is composed of two coils: one implant integrated and isolated inside the human body, the other located outside the body (Reader). To have better power transfer efficiency of inductive coupling link, both sides of the link are tuned at the same resonant frequency f o. In most cases, the primary circuit is tuned in series resonance to provide a low impedance load for driving the transmitter coil, where the secondary circuit is almost invariably parallel, and uses an LC circuit for better driving of a nonlinear rectifier load. Figure (3.0) demonstrates four resonance possibilities for connections in a passive system. Many formulas approximate for how many turns are required to achieve a specified inductance L. For example, the equations in Table (3.0) give the (N) turns based on loop radius (a), the loop height (h), the loop width (b), (d) wire diameter (R), (r) radius of loop coil and magnetic inductance L. Unfortunately, these equations are only an approximation for ideal conditions. In practice, the number of turns can change based on the properties of wire being used and the shape of the coil. An approach that is more practical is to measure the inductance during construction and add turns until the specified inductance is reached. However, measuring inductance accurately requires a highly specialized and expensive inductance meter [7] [6] [12]. Practically, the resonance frequency f o can be calculated in the equation (3.0) [2] [3] and [4]. 56

69 Chapter3 Inductive Coupling Background L N 2 Formulas Reference [ln( 8 R R ) 0.2] [103] 0 r a L 2.9ln K D N [133] L 2 2 r N ( 2r2.8d )*10 5 [176] 0.31( an) L 6a9h10b 2 [205] Table (3.0) the mathematical inductor formulas f o 2 1 (3.0) LC Figure (3.0) the four possible resonance circuits in inductive coupling 57

70 Chapter3 Inductive Coupling Background Theoretical Derivations There are several issues to be considered in the design of an inductor for generating magnetic fields. The mathematical analysis and simulation are most important for designing an ideal inductive coupling for estimating the received power. Different mathematical analysis methods have been investigated for solving and deriving the equations for calculating the received power at the implant device. These methods are for evaluating the received power by a load R Load at the implant circuit. In addition, the load resistance is varying over a wide range, at different values for optimum received power. There are many mathematical analysis methods, which can be considered for calculating the received power, and magnetic coupling coefficient [5] [6]. In this chapter, different types of methods are investigated for solving equations to calculate the received power for inductive coupling at the load resistance. Four different types of analysis methods are investigated, as shown in Table (3.1). These theoretical methods are used to calculate the approximation of the received power at the load resistance ( R Load ) that is equivalent to the implant circuit. Figure (3.1) illustrates the lumped equivalent of the inductive coupling circuit. A. Mesh coupling analysis circuit B. Loose coupling analysis C. Reflected impedance analysis D. Network circuit analysis Table (3.1) investigated mathematical methods for inductive link calculation A. Mesh Coupling Analysis Circuit Figure (3.1) the basic lumped equivalent inductive coupling circuit 58

71 Chapter3 Theoretical Inductive Coupling Calculation We describe the mesh equation analysis as the first method for deriving the equations and calculating the received dissipated power by load resistance ( R Load ). We supposed the reader voltage and the implant voltage could be calculated in equations (3.0) and (3.1) respectively: V V reader implant 1 Rs j( Lreader ) I reader jmi implant (3.1) C reader reader j MI Z I (3.2) implant implant where the implant impedance Z ln can be expressed by: imp at Z implant RLoad 2 Rload ( Limplant C2 ) 1 (3.3) jl implant By dividing the denominator and numerator in equation (3.3) by ( j Limplant) Z implant RLoad (3.4) 2 RLoad( LimplantC 2) 1 jl implant Applying to the equations (3.1) and (3.2) Cramer s ruler for the matrix can be written as: V V reader implant Z reader jm jm I Z implanti reader implant (3.5) At the resonance condition the inductor reactance and reactance of the capacitor are both equal, 1 where j 0. We substitute into the equation (3.3); this yields the implant impedance: L implant j C 2 Z implant R L (3.6) oad Form the equation (3.5) we can derive the currents and the voltage at the load resistance to get the power consumption delivered by Load, and the reader current can be driven as: I reader V reader jm Vreader RL R (3.7) L RreaderRL M 59

72 Chapter3 Theoretical Inductive Coupling Calculation The implant current can be calculated in equation (3.8) as: I implant RL Vreader Vreader RL jm R (3.8) R R 2 M 2 L reader L where the implant load power can be given in the equation below: 2 P ( I ). R (3.9) implant implant load B. Loose Coupling Analysis The next mathematical method is the loose coupling analysis circuit, where as shown in Figure (3.2), the circuit is serial to parallel connection (SPCC). This can be obtained by modifying the lumped equivalent circuit module in Figure (3.2) as shown in Figure (3.3). Figure (3.2) the basic lumped equivalent inductive coupling circuit Figure (3.3) the modified circuit where ( CR Csimp C2 ) 60

73 Chapter3 Theoretical Inductive Coupling Calculation The impedance of the reader circuit can be approximated as: Z reader R s 1 jc ( R ( R LT jl )( 1 jcsr 1 1 LT T jcsr T jl ) R ) eq jx eq (3.10) Where, the real and imaginary parts are defined by equivalent impedance, Req and Xeq. R eq Rs [(1 LT CSR) ( RT CSR) ] R 2 2 LT LT (1 LT CSR) R CSR X (1 LT CSR) ( RLTCSR ) eq (1 L C ) ( R C ) C T SR LT SR 1 (3.11) However at resonance condition X eq 0 and o, where the tuned capacitor C 1 is given as: (1 o LT CSR) ( RLTCSR ) C o ( LT o LT CSRRR CSR (3.12) Instead of the reader coil with the parasitic capacitor ( C 0 ), at low frequencies, that yields ( 1 C1 2 o L r ), as usual for a series RLC circuit. The impedance of the equivalent circuit on the implant coil part is given by: SR Zimp 1 RLimp jlimp 1 jc R R L (3.13) R eq 2 Rimp RL ( RLRimp ) 2 Limp RL ( R Limp CRRLrRLr ) (2Limp CRRLrRL ) (3.14) X eq RL ( LimpC RRLr Limp CR ) ( R Limp CRRLr2RLr ) (2Limp CRRLr RL ) (3.15) At resonance, ( X eq 0 ) and ( o ), this yields the ( C L Lr R 2 2 o LLimp R Lr ) where the value of the capacitor is ( CR Csimp C ). By applying KVL for the reader, circuit Figure (3.3) 2 r V R I ( R jl ) jmi reader s I jc1 Lr Lr r imp (3.16) I Lr I r I ( R jl ) jmi Lr Lr r Limp 1 (3.17) jc1 Substituting the Equations (3.16) and (3.17) gives: V reader R s I Lr ( R eq Cr j ) jmi (1 ) (3.18) eq imp C 1 61

74 Chapter3 Theoretical Inductive Coupling Calculation Cr Where Req RL (1 ) and r C 1 X eq L r 1 C1 L r Csr C1 Applying Cramer s rule for the array matrix, we may write to determine the currents of the circuit ( I ) and ( r I implant ) for the coupling circuit of Figure (3.3): V 0 reader Re q jxeq jm Rimp jl r C jm (1 C R R L jc R 1 R jc L st 1 ) I I Lr Limp (3.19) Vreader Req jx 0 jm eq. Cst j M (1 ) ILr C 1 (3.20) R eq jx eq Iim imp imp RL CR where ( R eq R Limp ( ) ) and ( X eq L imp 2 2 imp equation (3.20): 1 CR 1 CR ) apply the matrix, inversion to the I Lr A 1 jb Req jx imp eqimp Cst jm (1 ) C imp x 0 1 jm R eqreader jx eqireader V 0 reader (3.21) 2 2 Cst where ( A imp Req Req X eq X eq M (1 C ) ) and ( B imp reader imp reader 1 X X eq R imp eq X imp eq R imp eq ) reader after analysis of the matrix we get the implant current by: I implant jmv A reader imp (1 jb X CSR C1 ) (3.22) The voltage across the load resistance can be given by: V RL RL CST jmvreader (1 ) jcr C1 RL I Lr 1 1 A jb 2 2 imp X 1 C (3.23) jcr RL From the above analysis, the power dissipated by the load resistance (at the implant circuit) can be calculated as given in the equation: P implant 2 VRL (3.24) R Load 62

75 Chapter3 Theoretical Inductive Coupling Calculation C. Reflected Impedance Concept Analysis The third method for solving the coupling analysis circuit is by using the reflected impedance concept. That gives the primary current circuit ( I reader ) and the secondary current at implant circuit ( I implant ), since both reader and implant circuits are resonant and, under this condition, the received power has been optimised at the load resistance. Figure (3.4) shows the lumped equivalent inductive coupled circuit for the reflected impedance analysis. Figure (3.4) the lumped equivalent circuit for reflected impedance The loop equation for the reader circuit is: V reader Z * I jmi (3.25) 1 reader implant 1 where Z R j( ) V implant 1 s L reader Creader jmi I *( Z jl ) (3.26) 0 reader implant L imp we can obtain the implant current ( I implant ) from the equation (3.26): I (3.27) j M imp I reader ZL jl imp where we substitute the equation (3.27) in the equation (3.26) that yields: V V reader reader jm Z1 * Ireader jm ( I reader* ) (3.28) Z jl L imp 2 2 M Ireader( Z1 ) I reader ( Z 1 Z ref ) (3.28) Z jl L imp 63

76 Chapter3 Theoretical Inductive Coupling Calculation The reflected impedance can be expressed as: 2 2 M Z ref Z jl L imp Mathematically, the load impedance at implant circuit can be given by: Z L 2 L 2 L j C2 RL 1 C2 RL (3.29) R C R (3.30) The equivalent circuit for the implant part is substituted by ( Z ) as shown in Figure (3.5). ref Figure (3.5) Equivalent impedance circuit at load part To calculate the total impedance of the circuit, we are using the equation (3.31) and the equation (3.32) that yields the total impedance of the circuit as expressed in equation (3.33). Ztotal Z 1 Z ref (3.31) Z Z total total ( M ) [ Rs j( Lreader C )] Ω (3.32) reader Z j( L ) L imp ( M ) [ Rs j( Lreader )] (3.33) Creader 2 RL C2 RL j j( L ) imp 1 C R 1 C R The reader current can be calculated from the equation (3.29) and the equation (3.33): V reader Ireader Amp (3.35) Ztotal The implant current E I 2 implant Amp (3.36) Z2 2 L 2 L 64

77 Chapter3 Theoretical Inductive Coupling Calculation D. Network Circuit Analysis The last mathematical method for analysing the inductive coupling circuit is by applying the network circuit analysis method, as shown in Figure (3.6). This considers the internal resistance of the coil R coil ; the circuit was converted to the equivalent for more simple analysis as demonstrated in Figure (3.7). However, this circuit is divided into four complex impedance circuits, for calculating the voltage and the current passed through the load impedance ( R ). Load Figure (3.6) the inductive circuit converted to the equivalent circuit diagram Figure (3.7) the equivalent circuit can be simplified as shown 65

78 Chapter3 Theoretical Inductive Coupling calculation The mathematical steps below describe the derivation of the equations for analysis and calculate the circuit impedances as: 1 Z1 ( Rs RLR ) j( LR M ) C Z 1 (3.37) 1 ( R R ) j[ ( L M) ] (3.38) 1 s LR R C 1 Z2 jx M (3.39) Z R j ( L ) (3.40) 3 LR imp M Z Z 4 4 R jc R (3.41) 2 L 2 L C2 RL R C R (3.42) 2 L 2 L j C 1 C 2 R L 2 RL The total impedance Z T of the circuit can be calculated in an equation as: Z total Z1 [ Z2 ( Z3 Z4)] (3.43) E I1 (3.44) Z total I2 I3 ( Z3 Z4) I1 (3.45) ( Z2 Z3 Z4) Z I 2 1 Z2 Z3 Z (3.46) 4 Referring to figure (3.7), we can calculate the voltage ( V 4 ) cross the circuit Z4 as: V 4 I4 Z4 (3.47) Obviously, since we get the voltage V 4 we can calculate the power dissipated by the load resistance, given in the equation below: P implant 2 ( V4 ) (3.48) R load 66

79 Chapter3 Theoretical Inductive Coupling calculation Hypothetical Methods Simulation and Measurements A. MATLAB Simulation Four methods have been simulated to calculate the dissipated power by the load impedance at implant circuit. The optimum received power was calculated by the mesh coupling analysis circuit, loosely coupled reflected impedance analysis, and network circuit analysis. The MATLAB model has been mathematically validated by simulation and verification of the inductive coupling design and calculation for the optimum power transfer over wireless coupling link. Our coil values are selected by the design parameters for the perfect inductance with respect to the chosen centre frequency at 135 khz. The reader coil is given as L reader 450H, where the implant is L implant 450H. The analyses were performed with different loads ( R Loads), the simulation values given were between 6500~ 8500 Ω for the selected coils. Figure (3.8) demonstrates the optimum captured wireless power, which can be dissipated by the load resistance. Figure (3.8) the MATLAB/ Simulation and measurement comparison for Optimum received Power with different methods 67

80 Chapter3 Theoretical Inductive Coupling calculation B. Lab Bench Measurements The prototype inductive coupling link has been evaluated by lab measurements. Comparing the four theoretical methods calculations from Figure (3.8) it can be seen that there were slight differences between the reflected and network analysis methods, while the other two methods showed a significant difference in the calculation for the estimated wireless received power. Practically, the coil is a critical element of the design for both links. Although many methods and simulations were conducted, to choose the best inductor in this work for the prototype, the optimum method was the inductive coupling circuit. The Lab measurements obtained at L implant and L is equal to 450.8H where appropriate coils are selected to get the best transfer implant power and optimum mutual coupling. Obviously, in Figure (3.9) the theoretical received power decays at a constant rate, where the measured values are given better at closed positions and reducing at separation distance from 1~7cm. This has clarified that the robust link is not possible when there is a large distance between two antenna coils. However, as the received power is a function of many parameters, we simulated and compared the received power between four different computation theories to improve the inductive coupling design as shown in Table (3.2), which demonstrates the theoretical power efficiency. Figure (3.9) shows a comparison of theoretical methods and measured received power at Load (8500Ω) 68

81 Chapter3 Theoretical Inductive Coupling calculation Theoretically Calculated Methods for Received Power R Load Distance Loosely Coupling Mesh Coupling Analysis Circuit Analysis Circuit Reflect Impedance Analysis Circuit Network circuit analysis Watt [%] Watt [%] Watt [%] mw [%] 0cm cm cm cm cm cm cm cm cm cm cm Table (3.2) a comparison of the methodological analyses However, the experimental measurements were performed with different coil designs for optimum received power with different load resistances. A sample coil at (450.8 µh) is demonstrated in Figure (3.10). The optimum received power over separation distance at maximum 10cm, where the reader coil was designed at 10cm in diameter and implant coil is 3cm. Figure (3.10) the optimum received power for the choice of coil at reader and implant 69

82 Chapter3 Theoretical Inductive Coupling calculation In addition, the transmitter coil was designed with 10-gauge wire size, which was chosen since it has the highest self resonance frequency compared to other gauge sizes. The self-inductance of coil is 450µH, the winding resistance about (0.8Ω) and the estimated parasitic capacitance is (100pF). However, the reader and implant coils designed in the Lab test bench are shown in Figure (3.11) and the reader unit is shown in Figure (3.12) respectively. Figure (3.11) Fabricated transmitter and receiver coils Figure (3.12) Reader unit for inductive coupling link with coils 70

83 Chapter3 Mutual Inductive Coupling calculation Inductive Coupling Link Efficiency Mutual and Coupling coefficients for Inductive link The magnetic field is the key parameter in a proximity communication system that uses inductive coupling, which is one of the possible system to communication for biomedical implants. The maximum magnetic flux that is passed through the implant coil is obtained, when the two coils reader and implant are placed in parallel with respect to each other. This situation results in maximum range reading and maximum induced voltage in the implant coil. However, the coupling coefficient between the two coils is maximized in the above condition. The reading distance has physical limitations: one of the limitation factors in low passive wireless coupling is misalignment, where the maximum reading distance is determined by RF power and signal interference. Typically, the reading distance is only a few centimetres. Because increasing the power and frequency is not always practical, the common solution to increasing the reading distance is by modifying the coil used for magnetic inductive coupling. Generally, the bigger radius of the loop antenna will result in a greater reading, but is limited in physical size. Many investigation efforts are in progress to improve the received power in the implant coil. Figure (3.13) demonstrates the relation of magnetic coupling between two coils reader and implant, as a function of distance and alignment of angle. Reader Coil Implant Coil Figure (3.13) the geometry for inductive coupling and orientation between two coils 71

84 Chapter3 Mutual Inductive Coupling calculation Practically, the electro-magnetic interference will become too great for a large loop coil to function correctly. The main challenge of coil antenna design is to determine the optimal number of turns: the number of turns determines the magnetic inductance of the loop coil. However, the loop coil antenna of the transmit reader emits an electromagnetic field of the strength ( H (x) ), produced by current ( I R ), this can be defined in a mathematical equation as: 2 I r N r Rr A H x) [ ] 2 2 3/ M (3.50) 2( R x ) ( 2 r The magnetic field density is expressed in the equation as: B H 0 (3.51) Where substituting equation (3.48) in equation (3.49) it yields: 0I r N r R B x) 2 2 2( R x ) 2 ( r 3/ 2 r [ T] (3.52) Firstly, the transmitter coil antenna is tuned at the centre frequency and matched with the source. The maximum transmission efficiency is typically independent of the tuning distance; if the circuit is detuned from the resonance frequency, it will drop dramatically. Figure (3.14) shows the geometry of magnetic coupling analysis design for the reader coil. B(x) Figure (3.14) the loop coil geometry compared to magnetic flux 72

85 Chapter3 Mutual Inductive Coupling calculation Obviously, the geometry of the coupling link needs to consider the coil sizes for biomedical applications. Figure (3.15) demonstrates the percentage of the size relation between reader and implant coils. Theoretically, there are several formulas for computing the mutual inductance and coefficients of coupling, when considering the orientations of the coils. The magnetic flux which produces the induced voltage on the implant coil gives the equations below (3.53) and (3.54) shows the computed mutual coupling (M) formulas [108],[115]. The second factor is the coupling coefficient (K) between two coils reader and implant; it is expressed in equation (3.55) and (3.56) respectively. M 1 A B d A2 H 2d A2 I I Re Re I ader ader A2 Reader A2 (3.53) M ( x) K( x) L reader * L implant (3.54) K K 2 Rred 2 * Rimp 2 2 Rred * Rimp* Rred X 3 / 2 r 2 *cos N 2 0 R i R N Rred X 3/ Li * LR S i (3.55) (3.56) Figure (3.15) the comparison of coupling coefficient between the implant and reader coils 73

86 Chapter3 Mutual Inductive coupling calculation Lab Characterization Measurements for Mutual Coupling The lab measurements for optimum coupling coefficient between reader and implant over different distances is demonstrated in Figure (3.16). It shows the diameter of the reader coil and the modified implant coil diameter fixed at 3cm, for measuring the optimum diameter size of reader coil. The best inductance has been approximately 450.8μH, where the best diameter has been given between (8 ~12 cm). Table (3.3) illustrates the mutual and coupling coefficient between theory and measurement for optimum design of the system. L reader Figure (3.16) the coupling coefficient percentage between coils Coefficient K(5cm) Mutual Inductance M(5cm) L implant Calculated Measured Calculated Measured 65.4 μh 5.68% 19.4% 3.58μH 12.4 μh 62.7 μh 95.5μH 6.90% 25.7% 5.10μH 15.8μH 95.6μH 350μH 5.350% 20.75% 16.5μH 25.9μH 350μH 459μH 5.809% 25.95% 26.5μH 39.9μH 453.8μH 550μH 8.60% 26.01% 18.90μH 125μH 556μH 650μH 6.70% 24.09% 24.95μH 250μH 655μH 933.1μH 8.95% 25.19% 30.01μH 150μH 953.1μH Table (3.3) comparison of theory and measured values of the mutual inductance and coupling coefficient for inductive link at distance (5cm) for different inductances 74

87 Chapter3 Measuremnets for Wireless Received Power Lab Measurements for Wireless Received Power For comparison, the simulation and measurements were made to evaluate the optimum inductance value tuned at our choice carrier frequency 135 khz. The testing was performed over various coils, the practical measurements were for the inductance between 62~650μH that demonstrates the optimum received power at 650μH. In the first condition, the reader coil was fixed at 64μH, whilst the better wireless received power was at 650μH at implant coil as shown in Figure (3.17). In second condition, the implant coil was fixed at 933.4μH, where the better wireless received power was at 657.6uH, as shown in Figure (3.18). Optumim Received Power at with differenct Coils 3.50E-02 Power Amplitude in "Watt" 3.00E E E E E E-03 Lreader=64µH Frequency~135 CTC 0cm 1cm 2cm 3cm 4cm 5cm 0.00E uH 150uH 250uH 350uH 450uH 550uH 650uH Implant Coils " µh " Figure (3.17) the best receiving power over different implant coils Optimum Received Power at Differences Coils 1.20E-01 Power Amplitude "Watt" 1.00E E E E E-02 Lreader=933.4µH Frequency~135KHz CTC 0cm 1cm 2cm 3cm 4cm 0.00E+00 L=64µH L=450.8µH L=657.6µH L=528µH L=781µH L= 953.1µH Implant Coils in "µh" Figure (3.18) the best receiving power over different reader coils 75

88 Chapter3 Measuremnets for wireless received power From the previous measurements, we chose the coils values between 425~465μH for this work. These values were considered in the calculation for the best inductance value for the reader and the implant coils design. Figure (3.19) shows the load measurements and matching impedance for the implant-tuned circuit, which where tested under different loads from (50-20kΩ) over short distance up to 10cm. The second measurements were performed by selecting the coils driven with the power amplifier: the improvement area for the received power driven by Class F power amplifier was as shown in Figure (3.20), giving up to 0.95 Watt at 5cm. Figure (3.19) Measurements for maximum receiving power over different Loads Figure (3.20) the improvement receiving power with driven with class F power amplifier 76

89 Chapter3 Misalignment investigation Misalignment Investigation for Inductive Link Biodevice applications, which use magnetic coupling for communication, can suffer from many problems, such as short-range, loss of coupling and attenuated power. One of the main problems of the inductive coupling is the misalignment between coils. To achieve the best results, a high RF received power, and matched impedance is needed. In addition, the orientation angle for coils and the magnetic field is restrained by many factors, such as azimuth and elevation angles for the implant due to coil movement, which was studied for different rotating possibilities for implant coil angles (0, 45,) and (90 ), as demonstrated in Figure (3.21). Generally, for reducing the misalignment between coils and improving the receive power, the suggested solution is to split the implant coils into two parts, as shown in Figure (3.22), as this that will harvest the most magnetic flux intensity. Figure (3.21) the misalignment analysis between two coils Figure (3.22) Optional solution for splitting the implant coils in to two parts 77

90 Chapter Misalignment Analysis and Lab Measurements Misalignment investigation The prospective design in Figure (3.22) was analyzed and created into a circuit. The lumped equivalent circuit module for the reader and dual implant coils are shown in the Figure (3.23), where the magnetic coupling coefficient and the mutual coupling shared the transmitted magnetic flux from the coil reader. We analyzed these relations of magnetic coupling coefficients in mathematical form. By analysis of the coupling coefficient between three coils, the coupling relation between M L N L and L impl1, L impl2 can expressed in the equation: reader 1 impl1 2 impl2 K1 and K 2 reader N reader Lreader N reader M N (3.62) The mutual coupling relation of coil L impl1 and L impl2 is given by the equation: L M 3 impl1 Nimpl 1 M N 4 impl2 K1 and K 2 (3.63) N L N reader impl2 From the above equations, we can substitute and get the mutual inductance between coils as: L M R L reader 2 2 K K1 L R Lim 1 im1 M M1 K1 L R Lim 1 (3.64) M L L R 2 2 im K 2 2 K2 L R Lim2 M M 2 K2 L R Lim2 (3.65) Figure (3.23) Lumped equivalent circuit with dual for inductive coupling module 78

91 Chapter3 Misalignment investigation Lab measurements were performed for the proposed coils as demonstrated in Figure (3.24), for misalignment, which are using two separated coils to test and improve the efficiency of wireless received power. Both coils A and B were identical 450.8µH, where the reader coil was equal to them in inductance ~ 950µH. The results shown in Figure (3.25) obviously indicate that the wireless received powers are constant and compensated by one of the coils, which provides a stable power at the implant. However, new techniques have been performed and are described in Appendix A. Implant-Coil A Reader Coil Implant-Coil B Figure (3.24) the RF inductive coupling lab measurements for dual coils Dual received power PLR,PLL Coils Received Power in "Watt" 8.00E E E E E E E E E+00 LL-coil Orientation Receive Angle in Degree LR-coil VLR-P VLR-P VLL-P Figure (3.25) the RF inductive coupling Lab test for dual coils 79

92 Chapter3 Implant surgical investigation Implant Coil Surgical Investigation There are many uses for surgical implant devices inside the body, which are dependent on the device and the purpose. The epidermis of the body is sensitive to the exterior world, like heat, touch, etc. Coils for implants are inserted between epidermis stratums, which affects the absorption of electrical and magnetic energy. The high magnetic field ensures minimum local tissue heating exposure, and absorption by body organs, such the eye and the brain. The coils are carefully located at contorting less sensitive surgically safe areas. These factors are affected by the attenuation of the electromagnetic field through the patient s skin and therefore attenuation needs to be calculated with respect to frequency. However, this was discussed, in chapter one, in the absorption relation to frequency and the possibilities for minimum SAR. We illustrate in Figure (3.26) below the possibility of surgical implants and manipulating coil alignment, which use the same location for pacemaker devices that combine between the UHF and Low Frequency solutions. Figure (3.26) demonstrates the combined solution for implant coil location 80

93 Chapter3 Implant surgical investigation Generally, the location of the implant is critical, and subject to the size and function of the device. For example, the pacemaker or brain implant device are located under the skin on the right side of the chest. The coils are carefully located at contorting less sensitive surgically safe areas, which includes considering the factors affected by the attenuation of the electromagnetic field through the patient s skin. However, we described in the Figure s (3.27), (3.28) and (3.29), the minimum possibilities of surgical implants and manipulation coils alignment respectively. Figure (3.27) illustration of the first possibility for dual implant coils locations in the back 81

94 Chapter3 Implant surgical investigation Figure (3.28) the second possibility for implant coils at the front Figure (3.29) the third possibility for single implant coils on the back 82

95 Chapter3 Conclusion of inductive coupling Conclusion of Inductive Coupling Link This chapter culminates with the key design in our work the inductive coupling link. A wide range of papers that have been published in this area have studied and investigated the inductive coupling link topologies, covering the coils theory simulation and evaluated measurements. The most important element of inductive coupling is how to design the appropriate inductor and choose the right value for optimum coupling with appropriate design for biomedical purposes. In practical measurement, it is noted that the spiral flat coil at the reader has spread the magnetic flux generated by the transmitter coil and gives less communication distance compared to other shapes, where it is appropriate in the implant part. The spiral coil harvests the electromagnetic field more than other shapes, described in this chapter and that offers stable DC voltage in the implant. The lab test measurements were evaluated with coils in the range 60µH~950µH; we obtained the best values for the reader coil between 425 µh and 650 µh. In addition, extra work and measurements was done for synthesis of a better coil at values 650µH~950µH in the reader section with different diameters and shapes. The results were given for the optimum RF transmitted and perfect received power where the two coils are identical. However, the best coil is 450 µh for both reader and implant coils, at 10cm and 3cm in diameter respectively in this work. This provides the optimum performance with the power amplifier; in addition, the test measurement was performed to evaluate the characteristic of the implant coil under different loads, at different distances maintained over 5cm~10cm between coils. The bio-coil was evaluated for performance under conditions for implantation in water bearing (bottle) saline; where it was introduced between the two coils, this result in no loss of the power transfer. A saline water bottle was used to simulate the body environment. Extra investigation for inductive coupling link is described in appendix A. The energizing and communication between the reader and implant moving as part of the body was accomplished through antenna coils. The efficiency of the transfer voltage can be increased significantly with the high Q of resonances circuits tuned at serial to parallel circuit. A second solution was synthesized for a tracking control system that auto adjusts for optimum condition for magnetic coupling and orientation of coils, which will be discussed in chapter five. 83

96 Chapter3 Introduction to power amplifiers 3.2 Power Amplifiers Introduction to Power Amplifiers The power amplifier plays an important role in low and high frequency bands. It amplifies the input signal to a certain power level, which drives the transmit circuit. The power efficiency is one of the key factors in the design of the power amplifier (PA). Ultimately, when it comes to the power efficiency class E and F, amplifiers have a better output efficiency compared to these conventional amplifiers, such as class A, B, C, and D [180]. A concise comparison of the efficiency between different types of power amplifiers is shown in table (3.2.1). However, we studied the principles of the power switch amplifiers that have been designed and which are appropriate for the biomedical purpose. Generally, the class D power amplifier is a switching amplifier that converts a low-level analogue input signal into a high power, and it consists of three main stages: the input switching stage, the power amplification stage, and the output filter stage, as illustrated in Figure (3.30). To achieve this technique a Pulse width modulation (PWM) takes the input signal, and converts it into a higher (triangular waveform) switching waveform, which uses a comparator. When the voltage at the inverting input is bigger than at the non inverting input, the output voltage is low, and when the voltage at the inverting input smaller than that at the non-inverting input, the output voltage becomes high [125]. In addition, the PWM technique was used in the control part in our work in chapter five. Finally, the output of the comparator was connected to the power amplification stage; this was an external MOSFET in a full-bridge configuration. The MOSFET was either full ON or full OFF and the power dissipation was minimal, allowing maximum power to be delivered to the TX circuit. The switch frequency was much higher than the input signal band, which allowed high frequency out-ofband. Power Amplifier Types Efficiency Class A ~ 35% Class B ~ 50% Class C ~ 65% Class D ~ 80% Class E ~ 90% Class F ~ 95% Table (3.2.1) comparison of the class power amplifier s efficiency 84

97 Chapter3 Introduction to Power amplifier Figure (3.30) illustrating the principle of Class D power amplifier The output stage had a passive filter to remove high and spurious frequencies. In addition, this passive load network was designed to minimize current and the voltage overlapping Class (E) Theory and Design In general, class E power amplifier technique is commonly used in wireless power transmission for biomedical and biotelemetry applications. The implant system needs a highly efficient power amplifier to transmit the RF power signal, which modulates according to the control information from the reader, into the implant device. Hence, the class E is a more suitable PA as an element driver for the transmitter coil, with theoretical 100% efficiency (only ideal switch): the actual efficiency is about 90~ 95% [145]. A simple class E consists of a single pole MOSFET transistor switch with a shunt capacitor C 1 parallel with series circuit R1, L1, C2 that achieves a constant current from the supply source. Furthermore, rising and falling voltage waveform is required for PA operation. In addition, it added the parasitic drain source capacitor of the MOSFET transistor C ds. The periodic pulse signal or PWM circuit that drives the MOSFET transistor is demonstrated in Figure (3.31). The high efficiency of class-e can be achieved by reducing the transistor switching losses; the transistor is turned ON when the drain voltage has come back to zero, reducing the turn ON loss zero voltage switching. The drain voltage is also raised from zero at the time of turn ON, which allows for slight returning without losing efficiency. These two above states are the operation for PA presented in Figure (3.32), which describes the waveforms of the voltage and the current in switch time [146]. 85

98 Chapter3 Class E power amplifier Pulse Signal PWM Generator Figure (3.31) the principle circuit of the Class E amplifier Figure (3.32) waveforms of the voltage and current switch conditions [145] For the design of the Class-E amplifier consider the switch Q is OFF and the voltage ( V q ) can be expressed as: 86

99 Chapter3 Class E power amplifier I d Vq ( t) ( st a (cos( st) cos)) (3.66) C s q Where ( s ) is the carrier frequency, ( I d ) is the dc portion of the drain current, and (a) is constant, the voltage ( C ) is given by solving the equation: q dvq Cq I d ( 1 asin( t)) (3.67) dt In order to avoid power dissipation due to either shorting of the capacitor, or voltage drop, which is crossed it, during the switching or when the MOSFET turns ON. For the switching transistor there are two other conditions can be declared as. T dv s q Ts V q ( ) 0 and ( ) 0 (3.68) 2 dt 2 Using the equations to solve for the constants, these have been calculated as below: a and arctan( ) The capacitor voltage ( V q ) and it is current ( I d ) can be defined as: I d Vq ( t) (( st) a (cos(( st) ) cos)) in 0st (3.69) C s q V ( t) 0 in t (3.70) q 0 s I ( t) 0 in t (3.71) q 0 s I q ( t) I d ( I asin( st)) in st 2 (3.72) From the above equations (3.69) and (3.72), we can calculate the load impedance at the resonance frequency as: Z l V ql j49 e (3.73) i w C ql s q According to the circuit R, L, C load 1 2 at the power amplifier, Figure (3.33) shows the principal load circuit of the network, which can be analyzed as a series input impedance for 0 87

100 Chapter3 Class E power amplifier simplifying the calculation. Eventually, the load impedance of the impedance network circuit can be mathematically calculated as: Z load 1 j s Lload Rload (3.74) jw C s load Figure (3.33) the load network circuit of Class-E PA The component values of the load network can be obtained by matching the real and imaginary parts of the equations (3.75) and (3.76) respectively: C q 1 QLR and L 2 load (3.75) 2f 0 2f 0R( 1)( ) 4 2 The choke inductor RFC can be expressed mathematically as: 1 (3.76) C L RFC ( k 2 s ) q where the k factor is the resonant ratio, to obtain a high power output drain efficiency, we can choose the value of the quality factor of coil (Q=100), and the value of (k=1.412). However, the quality factor of the load network affects the bandwidth of the RF transmitting signal at the reader. According to these facts, we can write the equation to calculate the values of CE-PA circuit, the load network component as: R L and C (3.77) R L 1 1 and C (3.78) 2 0 C RQ L 0 88

101 Chapter3 Class E power amplifier The Quality factor of a self-inductance can be obtained by the equation below: Q Coil L0 (3.79) R Coil The Quality factor of the tuned circuit (Load Network) can be obtained by the equation below as; Q network L2 C1C2 (3.80) R We substitute the values in the equations (3.79) and (3.80), where the carrier centre frequency is working at (135 KHz). This gives the elements values for Class E-PA circuit tabulated in table (3.2.3) to compare between the theory and measured values. In practice the internal resistance of the coil ( R Coil ) is added in the calculations of the R-value. Calculated values Simulated values Measured values L C C o 150 H 25nF 3.08nF 450 H 150 H 23nF 2.8nF 450 H 150 H 32nF 3.7nF 460.8H Table (3.2.2) shown the values of CE-PA L o Class (F) Theory and Design The second PA is the class F that is commonly used to amplify the RF signal, which is given a high efficiency and low power consumption and dissipation: it can achieve a higher power compared to other traditional class amplifiers [35] [32]. The fundamental operation of a class F amplifier is similar to Class E PA as a switch power amplifier. The input square wave signal drain voltage is rich in odd harmonics, predominantly the 3 rd and 5 th harmonics that resonate at (3 f 0 and 5 f 0 ); the tuned filter network will remove the odd harmonics and the output RF signal, that provides a sine wave. Generally, it consists of three parts, the input matching circuit, switch transistor, and RFC filter network circuit. The output filter is used to control the harmonic content of its drain voltage or drain current waveforms thereby shaping them to reduce power dissipation by the transistor, thus allowing removal with a simple filter. The passive load network is designed to minimize current and voltage overlapping and for overall efficiency, the switch frequency is much higher than the input signal band, which allows high frequency out of band components to be removed with a simple filter. 89

102 Chapter3 Class F Power Amplifier The architecture of class F power amplifier circuit has been shown in Figure (3.34). PWM Generator Figure (3.34) the principle components of Class F amplifier circuit The tuned circuit at the fundamental resonance can be defined in the mathematical expression as the L1C2 tuned at central frequency. However, the power amplifier components can be defined in the mathematical expression as: L1 L N (3.81) 2 N 1 C1 C N (3.82) 2 N 1 The 3 rd Harmonic can be calculated for the tuned circuit as: L1 L2 (3.83) 3 C1 C2 (3.84) 3 The fundamental LC tuning tank circuit can be calculated for the tuned circuit as: L 1 R (3.85) Q 0 90

103 Chapter3 Class F Power Amplifier C 1 Q (3.86) R 0 The accurate removal harmonics from the input square wave signal gives the accurate sine wave output form with the LC tank circuit components. The transmitter coil voltage and the current in Figure (3.38) can be defined as: V Coil 2V DD ct sin (3.87) I Coil 2V DD cos ct (3.88).. R The power consumption estimation for the coil driver can be given in a mathematical equation as: P Carrier 8 V 2 4. R 2 DD K N1. 1 (2K1) 2 (3.89) Automatic Frequency Control for Class F Power Amplifier Method (A) In practice, there are different methods which can be implemented for monitoring the RF transmitter, using the feedback control techniques. There follows a design of a simple control system to auto-correct the RF signal using VCO frequency that offers the stability of output power, for Class F- PA. It provides constant voltage at the implant device. This method is simple to implement for reducing the reader Hardware. The feedback system consists of an amplifier for the RF signal passed through a square circuit (multiplier) filtered at the centre frequency. The RF signal is converted into the digital signal, which converts the captured transmit signal into the digital form. The phase comparator is used to compare the digital TX signal with respect to the fundamental transmit pulse signal by VCO. We selected the PLL (HEF4046) [211], for synthesis of the fundamental frequency oscillation square signal at 135 khz, the basic proposed control system using PLL techniques is shown in Figure (3.35). 91

104 Chapter3 Class F Power Amplifier Figure (3.35) the proposed Feedback Control block diagram for Class-F- PA Therefore, to analyse the feedback interface signal to VCO, we defined the phase comparator and VCO K 0 signals, and the output e(t) error pulse phase difference, as demonstrated in Figure(4). The mathematical analysis can be expressed in equation (3.36). e( t) r( t) y( t) (3.90) K d Figure (3.36) showing the analysis feedback signal for PLL VCO Method (B ) The misalignment in reader coil or the shifting in fundamental frequency at the transmit reader effects are respectively, that it affects the received power and reduces the efficiency of the implant device. In this work, we have introduced the PWM techniques, used in class D power amplifier. This technique could be useful for auto-rf frequency correction for transmitting RF power. There are two different techniques for generating a PWM signal, with the microcontroller 92

105 Chapter3 Class F Power Amplifier and programmed VHDL code in FPGA; both proposed methods are for designing a robust controller for class E power amplifier with PWM. However, we can compare this to the conventional methodology using PLL VCO for transmitting amplified RF signal. The modified block diagram in Figure (3.34) for the Class-F- power amplifier is shown in Figure (3.37). The pulse width of the PWM waveform varies proportionally to the input signal and the output voltage signal. A Class-F PA controller adjusts the supply voltage of the Class-F power amplifier. The output voltage of the controller is equal to ( V s D V ) where the duty cycle (D) of the PWM pulse is controlled by the PWM generator which is proportional to the RF input signal. However, the application of this facility in microcontroller for generating the PWM signal offers flexibility for updating the data and auto-correction for PWM signal output and the stability for the RF power amplifier. Significantly, that improves the implant performance condition, which is the main goal for our proposed work. The practical implementation and the discussion for controlling concept of feedback with PWM will be covered in chapter Five. c cc Figure (3.37) modified the block diagram of the Class-F- power amplifier 93

106 Chapter3 Simulation and Measurements for Power Amplifies Simulation and Lab Measurements for Power Amplifiers A. Simulation of Class-E Power Amplifier The module of class E power amplifier was simulated with the MATLAB/Simulink environment, for evaluating the performance of the CE-PA. This is illustrated in Figure (3.38), where the carrier frequency located in this work is 135 khz pulse signal, with a constant drain supply voltage at 5V. Eventually, for simulating the power amplifier in MATLAB/Simulink, the transfer function of tank circuit needs to be evaluated, and this can be expressed in the transfer function in equation (3.91). V V out input [ S LC C SRC C 1 2 (3.91) R SL 1 SC 2 1] SC Figure (3.38) the simulation of Class-E- PA with MATLAB/Simulink 94

107 Chapter3 Simulation and Measurements for Power Amplifier B. Simulation of Class-F Power Amplifier The module of the class F power amplifier was also simulated with the same tools MATLAB/Simulink environment, for evaluating performance for CF-PA as demonstrated in Figure (3.39) the carrier frequency is the same as class E, which is 135 khz. The simulation waveforms results are shown in Figure (3.40); the top signal is the input pulse signal oscillating at 135 khz, where the bottom is the output of PA. Figure (3.39) Showing the simulation of Class-F- PA with MATLAB/Simulink Figure (3.40) showing the simulation result waveform of Class F PA at Frequency 135 khz 95

108 Chapter3 Simulation and Measurements for Power Amplifier C. Lab measurements of the Class-E Power Amplifier This section provides the measurements which were collected using prototype Class E-PA, designed and tested for comparing the performance with the simulated Class E-PA results. The simulation waveform result for the class E-PA is shown in Figure (3.41), where the tuned carrier frequency is approximately between 133~135 khz, with amplitude (340V PP or V 120V) at the rms drain supply voltage constant at 5V. However, the simulation waveform result is shown in Figure (3.42) for the output power amplifier at the reader coil, where the measured transmit, power in this case is (2 Watt). Figure (3.41) the switch (Transistor) voltage of the power amplifier Figure (3.42) the output voltage of Class-E power amplifier 96

109 Chapter3 Simulation and Measurements for Power Amplifier D. Lab measurements of the Class-F Power Amplifier The second measurement for our proposed prototype power amplifier was Class E-PA. It has been tested using an Agilent scope and spectrum analyzer in order to analyse the parameters of the RF transmitted signal with the measurement waveform result, shown in Figure (3.43); the spectrum of transmit signal is demonstrated in Figure (3.44). The tuned carrier frequency is approximately ~134 khz, with RF amplitude at (397 measurement output for transmitted power is approximately (3Watt). V PP ) or (140 V rms ), where the lab Figure (3.43) the output voltage of Class-F power amplifier at reader coil (Tx RF signal) Figure (3.44) the spectrum of carrier frequency at 135 khz 97

110 Chapter3 Simulation and Measurements for Power Amplifier Comparing Measurements Results for Power Amplifiers The class E-PA and classes F-PA influenced the practical measurements for wireless received power at implant, as shown in Figure (3.45). The transmitted power for Class F-PA compared to Class E-PA was slightly improved at the implant device, where the range communication distance also improved. The second measurement was performed to test the monitor control system for RF power amplifier, which was compared with and without frequency control circuit as demonstrated in Figure (3.46). Figure (3.46) the comparing of received Power between Class E and F power amplifiers Figure (3.47) the comparison of AFC control systems for Class PA 98

111 Chapter3 Summary of the Power Amplifier Summary of Power Amplifiers This section concludes with a summary of the second important element, which is the power amplifier. We reviewed the most common power amplifiers used in wireless applications such as RFID. Our main goal was to synthesize a highly efficient amplifier, which is reliable for medical purposes. Eventually many parameters have to be considered in the design such as the temperature, frequency stability and maximum transfer power. We chose the switching power amplifier in our work, as it was appropriate for the applications in this thesis. Principally, we studied and investigated the most common switch power amplifiers in detail and simulated them with MATLAB/Simulink tools. However, the two-switch power amplifiers class-e and class-f were selected by combining these two power amplifiers in a hybrid design, to reduce the hardware layout and improve the performance efficiency of the transmitter power amplifier. The first prototype for the feedback control system was synthesized with the PLL technique; additionally circuits were designed to convert the transmitted RF signal into a digital RF signal. We introduced the PWM techniques to control the transmit RF-signal using the microcontroller or FPGAs to generate the pulse width modulation pulse width. Generally, the full details for hybrid power amplifier design and controller circuits will be explained in chapter five. The preliminary measurements for RF power amplifier without controller showed instability at the reader coil. The frequency was changed with respect to distance, especially when the coils were moved closer together (1-2cm apart), where the carrier frequency shifted from 135 khz up to 142 khz. In addition, from the measurement we obtained the results that the power amplifier was also affected by this movement objective around the transmitter coil, or any other coupled coil near it. Finally, a summary of the measurements for our proposed chosen switch power amplifiers. Shows that the first amplifier is class E, which is used for transmitting ASK signal, whilst it provides the essential power for the implant device. The second proposed PA is class F, which is synthesized for providing the RF power signal for the implant device. The implant received continuous RF power from both amplifiers, according to the transmit data from the reader. 99

112 Chapter3 Wireless Received Power 3.3 Implant Received Power Simulation and Measurements RF-DC Received Power Investigations A wireless inductive coupling link is a common way for communication via electromagnetic fields in biomedical telemetry. It transfers the RF power and data wirelessly between reader and a battery-less implant [82], [100]. The biomedical devices require very efficient RF signal converter or rectifier into DC voltage, which provides the essential DC voltage for medical sensors or electronic circuits. Predominantly, the essential required voltage for the sensors and electronic device are delivered to the implanted unit by RF transmitted signal, over a short distance of a few centimetres. However, the most common technology used a signal diodes rectifier or MOSFET transistors in bridge rectifier connection. We investigated most of the circuits, which are designed with passive devices, and tried to mathematically analyze and simulate them. The appropriate rectifier circuit design for biomedical device microcircuits as studied. In addition, the matching impedance between the tuned circuit and rectifier circuit was the main reason for loss of power, which reduced the stability and the variation of the response time of the rectifier. However, there were further factors contributing to the loss of power such as misalignment of coils and detuned antenna at the carrier frequency, increase of the reading distance, and poor circuit design. The block diagram in Figure (3.55) shows different circuit types used for power rectifying based on wireless communication, or RFID and the biomedical implant devices topologies. Types of Voltage Rectifiers RF-DC Linear Regulator Rectifier Switch Regulator Voltage Multiplier RF bridge Rectifier Charging pumps Dickson Multiplier Figure (3.55) illustrates the different types of power rectifying topologies applied for biomedical device 100

113 Chapter3 Wireless Received Power Voltage Multiplier There are many passive techniques using the voltage multiplier (VM) which double the output voltage and stabilize it. There are different circuit topologies for performing the VM: the most common type of voltage multiplier is the half-wave series multiplier, and it is called the voltage Doubler or voltage Tripler [153]. Generally, the basic VM circuit is composed of capacitors and diode connected in several stages as a network, to step up the voltage amplitude in passive devices and rectifies the RF signal from AC to DC voltage, as shown in Figure (3.56). However, this technique is not suitable for all the biodevices applications, because the capacitors and diodes sizes consume a large space in the implant circuit. In addition, the stability and DC voltage out is not appropriate as a wireless source for circuits in passive implant devices. Figure (3.56) the voltage doubler circuit [153] The circuit in Figure (3.56) was developed and modified to use the N-MOSFETs, designed for passive RFID tags in the metal CMOS technology [178], [154]. One of the disadvantages in this topology is that it is not appropriate for far field communication and the power loss in the voltage multiplier is unavoidable. However, the efficiency of the VM so far reported is about 15%~30%, which is a result of conduction loss and dynamic loss. Figure (3.57) voltage multiplier based on NMOSFET [178] 101

114 Chapter3 Wireless Received Power The second type of voltage multiplier uses the CMOS bridge technology cells, which are applied in several stages, with each cell made up of four transistors. In order to minimize the power consumption of the multiplier circuit the equivalent input capacitance of the VM must also be minimized [151]. The block diagram of Voltage Multiplier has been described in Figure (3.58). However, the technique is used in many RFID applications, which may be appropriate for biodevice circuits. Figure (3.58) the bridge voltage multiplier cells circuit [151] Schottky Diode Rectifier The Schottky diodes are fabricated using a Titanium (Ti/Al/Ta/Al)-silicon (n-type) junction in a 0.35μm standard CMOS process [48] [127]. The larger the area, the smaller the turn-on voltage for a given current drive requirement, and the efficiency will be higher. However, a large capacitance would limit the maximum operating frequency of the multiplier. To design a Schottky diode bridge, it is necessary to consider the size of coupling capacitors. The bridge rectifier circuit for passive biomedical device is shown in Figure (3.59) Figure (3.59) illustrates the measurement of AC & DC voltage without Load 102

115 Chapter3 Wireless Received Power RF-DC_CMOS Bridge Rectifies The structure of the MOSFETs Bridge is illustrated in Figure (3.60) which consists of two n- MOS and two p-mos FETs [1][128]. The output voltage is according to the level of the received RF signal. This technique has suffered from the response time where the received RF signal is low and drop of the output voltage below the threshold case causes this kind of RF-rectifiers to reduce the implant device efficiency. Figure (3.60) the RF-DC CMOS Bridge rectifier circuit Dickson Voltage Multiplier The Dickson multiplier was used to gain of the voltage from the bridge circuit as shown in the schematic in Figure (3.61). In most new circuits, the diodes are silicon-titanium schottky diodes. These diodes have very low series resistance, and low schottky junction capacitance of approximately (500 ff). However, it is essential for these diodes to be connected to the antenna pins using poly-poly capacitors to reduce the loss power [152]. Figure (3.61) the block of Dickson Multiplier [155] 103

116 Chapter3 Wireless Received Power The output voltage of the charge pump diode is calculated in the equation (3.92), where the ( V t ) is the voltage drop by the diode, (diode connected MOSFET as the charge device in place of the diode) and N is the number of stages: V out ( V V ) N (3.92) dd t As shown the above equation the voltage gain V V ) decreases and the output voltage ( dd t becomes lower than the value obtained by the diode connected MOSFET charge pump. Therefore, the output voltage of the Dickson charge pump cannot be a linear function of the number of stages and its efficiency decreases as the number of stages increases. To increase the Dickson charge pump efficiency it can be constructed using coupled voltage doublers consisting of four power FETs (n-mos), and four power FETs (p-mos) [45] [46] definitely, which occupy a large area and auxiliary needs circuits, which are not appropriate for implant medical devices Voltage Regulator Optimum performance of the converter is obtained through a compromise of achieving the correct output voltage and using as little power as possible. The voltage regulator must be used to regulate the input voltage fed to the chip to achieve the desired operating conditions. The linear technique can be used for controlling the output voltage, and the band gap based reference voltage can be compared to the output voltage and used for controlling the regulator feedback loop [2] [4]. Practically, there are different topologies based in the voltage regulator such as basic series regulator, basic shunt regulator, and regulator with fold back current limiting. One of the disadvantages of a voltage regulator is that it has high a dissipation of power and quiescent current as a linear, where the power is limited, especially in implant devices. In Figure (3.62) we can see the circuit of a voltage regulator. Figure (3.62) the circuit of voltage regulator [4] 104

117 Chapter3 Wireless Received Power Charging Pump Voltage Converter The charging pump voltage converter is a DC-to-DC convertor (also called switch capacitor voltage conversion) [135], which uses the capacitors to accomplish energy storage to create a high voltage. The charge pump circuits are composed of several stages, which are capable of high efficiency in the range of 90%. Generally, the local oscillator operates up to several megahertz. However, it needs few external components to hold the charges and begin transfer in the voltage conversion process, since it does not use inductive components, thus EMI generation is kept to a minimum which reduces the noise. The switching cycle of the first input half voltage is charged during the second half of the switching cycle and the input voltage is stored on the charge pump capacitor, it is inverted and then applied to an output capacitor then the load. Thus, the output voltage is essentially the negative of the input voltage, and the average input current is approximately equal to the output current. The switch frequency has an impact on the size of the external capacitors required, and higher switch frequencies allow the use of smaller capacitors. The block diagram of the charge pump is shown in Figure (3.63). Obviously, this technique could be appropriate for biomedical devices [136]. Figure (3.63) demonstrate the circuit of charging pump [136] DC-DC switch converter The other important element type used in biomedical devices is the DC-DC switch regulator, which is the critical component in the implant device, for provides the stable DC voltage. 105

118 Chapter3 Wireless Received Power The simple DC-DC design can reduce the size; in addition, high power can be delivered with less self-power consumption for the implant circuits [181]. Investigating the simple DC-DC design controlled by FPGA or CPLD for stabilizing the DC voltage received from the bridge circuit, we can see in Figure (3.64) the basic design for the dc-dc charging pump circuit. Figure (3.64) the circuit of dc-dc charging pump [181] The converter is driven by switched gate control pulses for gate-g1 and gate-g2, which are complementary to each other. However, when the gate-g1 is high, the Q1 is turned ON and Q2 is OFF, and as a result the current of the inductor L1 ramps-up and the capacitor C2 is charged, and produces a voltage, which also goes up. Consequently, when the gate-g1 goes OFF and the gate-g2 is ON, the capacitor C2 is discharged. The process is repeated and the cycle of the control signal determines the output voltage. However, the completed circuit of the RF-DC and DC-DC converter is shown in Figure (3.65). In addition, the load circuit is determined according to the number of electrodes and the implant component, which is connected to the DC-converter. Conversely, there are other topologies used for better efficiency for controlling light and heavy load. In the implant, the space and size are limited additional circuits could increase the power consumption and reduce the efficiency of the performance for the implant. For example, Discontinuous Conduction Mode (DCM) is use for the light load [120] [186]. 106

119 Chapter3 Wireless Received Power Figure (3.65) demonstrate the RF-Dc to Dc switch converter Switch Regulator The main goal of the switch regulator design is to have as much current delivering capability as possible. It is designed to consume as little power as possible itself. The principle of the switching regulator circuit is shown in Figure (3.66). Obviously, the basic circuit is composed of a few components, compared to the linear regulator. For example, the circuit works according to the switch conditions, as ON or OFF, where the switch is ON closed circuit the coil L tends to have rising current that generates an electromagnetic field inside its core. In this situation the diode, D, is open, when the switch is re-opened the coil L discharges and the diode becomes conducting for a closed loop circuit. However, the consumption current of the switch is about 60µA, which is ¾ of the total current consumption of output voltage. The small capacitor and transistors of the voltage switch regulator have been designed on the prototype along with overload protection circuit, which will limit the maximum induced voltage from the RF coils and avoid creating a high field that may interfere with the normal physiological activities in the body. In practice, there are different techniques for switch regulator such as step-up converters or step- Down converters, from different brands for Switch Regulator (SW) [213], which use step- Up switch regulator from the Linear Technology package (LT 1930) [194]. 107

120 Chapter3 Wireless Received Power We studied and investigated this topology for medical application. However, the practical circuit is shown in Figure (3.67) connected with bridge signal diodes. Figure (3.66) the principle of switch regulator circuit Figure (3.67) the switch regulator connected with the inductive coupling circuit Simulation of the RF-DC Rectifiers A. RF-DC Rectifier In practice, there are many tools and packages provided by the brands, and power rectifier designs. The radiated RF power received by a small inductive loop coil at the implant device is 108

121 Chapter3 Wireless Received Power less than milli Watts. The RF-DC rectifier uses Voltage doubler techniques built with the MATLAB/Simulink environment to evaluate the performance of the circuit design. The RF carrier frequency is 135 khz. However, the VD circuit is shown in Figure (3.68). The simulation of the waveform results for the circuit is illustrated in Figure (3.69). One of the disadvantages of this technique is that sensitive to time responses (charge time), and also the power drops down according to communication distance and load circuit. However, the circuit was built in and tested, which had gave the same results as the simulation. Figure (3.68) the simulation of the voltage doublers circuit with MATLAB/Simulink Figure (3.69) Simulation Result for voltage doubler output waveform 109

122 Chapter3 Wireless Received Power B. DC-DC Switch Rectifier The simulation circuit was processed with MATLAB/Simulink for 50% duty cycle, the values of the circuit were selected as shown in Figure (3.70), where the circuit values were (VIN=5V, L=10uH, C1=10uF, C2=10uF) and the oscillator frequency was 1MHz. However, the lower control frequencies will reduce the processing time, where the voltage reaches the steady state at 1ms, so the output voltage was changed according to duty cycle of the control pulses; as the duty cycle becomes large, the output voltage increases. The simulation results of the DC-DC converter are shown in Figure (3.71). In practice, it can generate the appropriate frequency by CPLD or FPGA and control of the duty cycle. Continuous powergui g m D S Mosfet i + - I1 L = 10 uh + - VC v U = 5V 10uF g m 10uF 50 Ohm D S Mosfet 1 Scope 2 Vd1 + - v Pulse Generator 1 Pulse Generator Figure (3.70) Simulation of the DC-DC converter block diagram Figure (3.71) Simulation waveform of the DC-DC converter according to duty cycle 110

123 Chapter3 Wireless Received Power Experimental Lab Measurements Results Different types of power rectifier circuits were simulated and synthesized, in order to choose the best techniques for this work. In the lab experiment, we used the signal germanium diode in our prototype design as a high voltage signal diode to rectify the RF signal crossed by magnetic flux Φ, which is proportional to the distance between reader and implant coils. The resonance frequency of the circuit is tuned at ~135 khz, and the measurements for the optimum received power at the implant part are shown in Figure (3.72). The second target is the design of an appropriate DC-DC converter, so we investigated different circuits for our purpose. The best solution for our work used Switch Regulator (SW) topologies. This is demonstrated in Figure (3.73) which shows the comparison of the measurement results between the RF-DC rectifier, voltage regulator and step down switch regulator over short distance. Figure (3.72) comparison measurements for DC-voltage at implant device Figure (3.73) the measurement of AC & DC voltage without Load 111

124 Chapter3 Wireless Received Power Summary of Received Power Rectifiers In implanted biomedical devices technology, the wireless received power is valuable, and needs an efficient circuit for converting the incident electromagnetic into voltages. Hence, the power rectifier circuit is the critical element implant design, and many innovations for integrated power rectifier solutions have been explored for RFID purposes. The RF to DC circuits were synthesized for biomedical devices such as voltage Doublers, Voltage Multiplier, Dickson Multiplier and Switch Regulator topologies to be used in biomedical devices. We investigated these different methodologies for rectifying the wireless RF signal in to DC voltage, which were simulated and bench tested for better design performance. However, we compared the best solution for rectifying the wireless RF signal and selecting the full-wave rectifier. Obviously, this has the benefits of a voltage-doubling rectifier, which minimizes the total area needed for the filtering capacitor. On other hand, there are disadvantages in using four diodes instead of one or two, as the efficiency is degraded due to power loss in the diodes. Generally, the regulator provides very small power and the voltages are unstable, and we know that stability and low power dissipation are the targets for DC voltage circuits in passive implant devices. In lab bench measurements, the RF-DC CMOS circuit was tested, which provides low voltage and suffers from poor matching between the LC-tank tuning circuit and the rectifier. Obviously, from the graphs it can be seen that the CMOS bridge circuit has low output efficiency. The Switch Regulator provides a very steady voltage at different distances up to 15 cm without load and 3.3Volt, and the power dissipation is less than 4.5µW. In addition, it has a small footprint size in implant devices. Finally, the table (3.2.4) summarises most of the RF rectifier s studied and investigated in this work. Table1 (3.2.4) summary of most of the power rectifier DC circuits for electronic medical devices Techniques Output DC Max Input Power Power Voltages Voltage dissipation Efficiency Dickson multiplier Up to 1.6V ~7% Voltage Multiplier Up to 2.5V 35Vpp ~5µW ~16% Voltage Regulator 3.3 V 25V ~35µW ~5% DC-DC switches converter 3.3V 55V -- ~15% Charging pump converter Up to 3V 100V -- ~9% Switch Regulator 3.28V 75V 2.5 µw ~35% 112

125 Chapter3 Wireless Transmitter over Inductive coupling link 3.4 Low Frequency using Inductive-coupling Topology LSK-modulation Investigation and design To design an efficient passive inductive coupling, capable of transmitting data, the appropriate modulation techniques to be used over the transcutaneous wireless coupling need to be considered. Demands are relentless for a higher transfer rate for bidirectional communication as control signals or gathering the acquisition returned data from the body. This requires an efficient modulator scheme to achieve a higher transfer data rate and low power consumption for biomedical purposes. Generally, Figure (3.77) demonstrates the typical digital schemes applied to biodevices in our work. In addition, we have tried investigate different types of techniques to amplify and transmit the RF signal such as LSK Load Shift Keying [136]. The first module is designed by using ASK modulation technique in our prototype biodevice system. The reader unit contains the ASK modulator and the auxiliary parts, the RF power amplifiers are driven by the class E and F tuned in series resonance circuit L 1C1, where the received data has a parallel resonance circuit L 2C2. However, the implant part consists of two coils, L 3 C3 coupled power spiral coil tuned in parallel resonance, and transmitter coil data L 4C4. The LC transmitter driver, modulated by data using CPLD/FPGAs, programmed with VHDL code, generates either BPSK or QPSK; digital signal and the digital demodulators BPSK and QPSK, both are programmed in VHDL on the CPLD chip. Practically, the ISM is a limited frequency band, where the carrier has become higher and the parasitic capacitance affects the transformer coupling behaviour. Considering this in calculation of the values of coils and capacitors, this can be seen in Figure (3.78). Figure (3.77) Proposed digital schemes over inductive link system 113

126 Chapter3 Wireless Transmitter over Inductive coupling link Figure (3.78) the equivalent coupling circuit The parasitic capacitances are added for calculation, which are associated with components of the coupling transformer circuit. Hence, the quality factor of both tuned circuits is the key parameter for passive telemetry system performance and the power efficiency is subsequently critically affected by the coils quality factor Q. Practically, for better performances, the Q-factor for the transmitter circuit should be twice the bandwidth frequency [169]. However, the impendence at resonance frequency ( f o ) at implant circuit is provided in equation (3.88). Z L R C R (3.88) 2 L o 2 L j o C2 RL 1o C2 RL The quality factor for the self-coil can calculate by equations (3.89) and (3.90) it can expressed mathematically as [145], [153]: Q imp 2 2 d f ol (3.89) Qimp oc2 R (3.90) L In practice, the reader needs a bandwidth that is at least twice the data rate, and Q factor of the LC circuit twice of the bandwidth BW of TX signal, that for full recovery of data at implant device [45]. Bandwidth 2Q (3.91) 114

127 Chapter3 Wireless Transmitter over Inductive coupling link Simulation and Lab Test Measurements Data measurements Over Inductive Coupling Link In the previous part, we discussed in detail the lab measurements for an inductive coupling link as the provider of power and data via an electromagnetic signal. In this section, we evaluate the inductive link for data transmission only, the lab measurements were performed with inductive link measured as function of communication distance. However, the MATLAB/Simulink simulation spectrum of TX signals for n-psk modulators are demonstrated in Figure (3.79), which compares between BPSK, QPSK and 8PSK. The Lab test measurement for the proposed modulators over inductive coupling link is illustrated in Figure (3.80). Figure (3.79) the simulation spectrum of n-psk transmitted signals at carrier 12.5MHz Saline Water Reader Coil Implant Coils Figure (3.80) bench test measurements for the proposed VHDL Modulator over inductive coupling link 115

128 Chapter3 Summary of Wireless Transmission Conclusion Chapter three reviews the communication data between the implant and reader part. Different techniques have been investigated and evaluated for our work, and their many categories are covered in this chapter, such as inductive coupling, power amplifiers, received power rectifiers and wireless data transmission over inductive link. We can classify them in this summary as: Inductive coupling link The antenna coils for inductive coupling have different designs, and optimization challenges to achieve a high power transfer and coil size miniaturization. Usually, the implant coil is wound as a wire loop coil, where the reader coil is made of micro strip board or etched copper or aluminium and may be called a track loop coil. A Lab test measurement was performed to evaluate the characteristics of the data implant coils under different loads, at different distances maintained with over (5cm~10cm) between the transmitter and received coils antenna. The desired loop inductive or loop antennas in biomedical design often needs to consider the quality factor and are fabricated in minimum size at ISM frequency. However, additional information is located in appendix A for coils design. Wireless data transmission over electromagnetic field We investigated PCB antennas in our work, as appropriate solutions in high frequency. This technique has disadvantages because the free space area behind the antenna track is unused (ground plane area), where at higher frequency this could disturb the transmitting of the information if designed under the PCB antenna and that increase the parasitic capacitance and causes interference in the circuit. In addition, this reduced the functionality of implant device, which using the micro strip antenna for transmitting the data from the implant device into the reader unit. However, this technique it is not appropriate for this work, and so is not considered in this thesis. 116

129 Chapter 4 Proposed VHDL Modulator Synthesis and Evaluation for Biomedical Electronic Device Applications

130 Proposed VHDL Modulators Synthesis and Evaluation 4. Biomedical Transmission Background The bio-device field has growing rapidly in recent years, as there has been a demand for relent push for higher rates of data transmission and increase in medical functionality. This chapter will cover the new proposed technique achieved using either FPGA or CPLD to modulate data with VHDL programming code. The new telemetry system has been developed in order to fit the common characteristics of future high performance radio powered implantable stimulators. Typically, these require a high bandwidth for transfer of data to control a higher number of electrodes. Generally, the function of the neural prosthetic device is comprised of a hardware system that records the neural activity from the brain, or neural system, which decodes the control signals that can used to move the robotic devices or muscles. Eventually, modulation such as a Quadrature Phase Shift Keying (QPSK) and Quadrature Amplitude Modulation (QAM) are use to increase the bandwidth and the improve the spectrum efficiency in wireless communication. However, selection of the biodevice frequency working in the unlicensed ISM band is important as a carrier frequency, which is selected to reduce the noise and interference of the implant device circuit. Figure (4.0) shows the most popular basic analogue and digital modulations have been reviewed, which are published for biodevice applications, previously revealed in chapter two in detail. Wireless Modulation Schemes Analogue Digital FM FSK AM ASK PSK OOK BPSK QPSK 8PSK Figure (4.0) the most modulation schemes applied for biomedical devices 117

131 Chapter4 FPGA/CPLD Technology 4.1 The Biomedical Applications Using FPGA/CPLD Technology The FPGA and CPLD are an important technology in modern wireless communication, such as mobiles and wireless devices. The FPGA or CPLD can implement a full digital synthesizer that combines the hardware and software and offers superior speed; this facility tends to minimize the hardware design and reduce the power consumption of the system. These advantages may be useful in biomedical applications, where the size and the consumption of power are the significant challenges especially in implantable devices. Conversely, this technique is required in medical applications even at the reader or implant parts. Many researchers and companies, who are working toward the biomedical applications and a few reports, have published in this area. The demands placed on wireless communication circuits in biomedical devices are for low power dissipation, low noise, and high reliability. The Very high Speed Integrated Circuit Description language (VHDL) language has advantages for synthesizing the digital circuits and this technology may used for practical biomedical applications such as biotelemetry, telemedicine and healthcare. One of these applications in our work is introducing a new algorithmic synthesis for pacemakers, or brain implant devices, our proposed digital modulator for wireless inductive communication applications, which may be appropriate for use with CPLD technologies, which is shown in Figure (4.1). Figure (4.1) Proposed bioelectronics implant wireless interface system for pacemaker 118

132 Chapter4 FPGA/CPLD Technology 4.2 Investigation of the Low Power Device Many wireless applications today, which require a low power programmable logic solution, are a challenge because they require us to select an appropriate device. We studied and investigated different technologies, which work at ultra low power consumption; there are many brands for FPGAs/ CPLD technology on the market. These different technologies will be discussed, and three devices will be selected from different brands such as Actel, Altera, and Xilinx [198] [202] and [208]. Generally, the new ultra CPLD is provided by Altera MAX II CPLD, where as the cool runner is made by Xilinx, and the Actel provides the FPGA ultra low power. The static power comparison between three vendors is shown in Figure (4.2) and the dynamic power is the main key for circuit design especially for biomedical purpose as demonstrated in Figure (4.4). Generally, the different power components must be considered when selecting and evaluating different FPGAs or CPLDs brands as shown in Figure (165) below. Figure (4.2) comparison of static power for FPGA and CPLD [198] Figure (4.3) total consumption powers with FPGAs/CPLD [208] 119

133 Chapter4 FPGA/CPLD Technology 4.3 Dynamic Power Calculation for FPGA/CPLD For biodevice applications, the reduction of power dissipation makes a device more reliable, by minimizing the process time and current on the chip. It is important to consider not only how to calculate the power consumption, but also it is necessary to understand how factors such as input voltage level, input rise time, power-dissipation capacitance, and output loading affect the power consumption of a CPLD or FPGA devices [198], [202]. Typically, these include the components for input receivers, which must be de-rated if driven from TTL rather than CMOS external drivers as shown in Figure (4.4). We investigated different brands for CPLD, which have lower dynamic power consumption generally, and the power is found as the sum of all three components. In general, the power is analyzed in three portions static, dynamic and maximum allowed power. The static power of each component in the CPLD or FPGA is provided in the device data sheet. Generally, the total power estimated can be calculated as based on the number of specific components used. However, the goal of this investigation is to examine each design step and component of the modulator power consumption with the purpose of providing techniques to reduce wasteful power consumption. These techniques cover system partitioning, chip design, and implant layout. Figure (4.4) power component of typical CPLD/FPGA devices [198] 120

134 Chapter4 FPGA/CPLD Technology Configuration of CPLD and FPGA Devices Most of the FPGA and CPLD are required to upgrading and re-configuration the device from time to time. The FPGA technology does not hold the design even if the power is off, as this needs an external flash memory to save the code design and configuration process. The configurations of these FPGAs or CPLD are normally handled with special electrically alterable configuration PROMs, serial EEPROMs or with SRAMs that load the FPGA or CPLD with their design at system power up. However, most brands for FPGAs and CPLD technologies use interface Joint Test Action Group JTAG techniques to configure the FPGA or CPLD [197] [201]. Practically, the general JTAG connectors come in different forms, but do the same function. Figure (4.8) describes the most common different JTAG connectors for configuration of the FPGA and CPLD devices, typically from different brands. In addition, Altera is introducing a new technique for upgrading the device in real time; when the device is in operation, this is called in-system programmability (ISP). This feature enables quick in-field product updates without requiring the device to turn off to initiate reconfiguration. The separation of the flash configuration block and the programmable logic block in MAX II CPLD is controlled with a special pin at the device. The updated design can immediately be loaded into the device or can instruct it to wait for the next power cycle. Additionally, real-time ISP allows multiple designs to run on a single device and updates to occur independently without affecting each other. In the remote update, the application shown in Figure (4.5), the FPGA configuration design can be updated with only momentary disruption to the microcontroller I/O expansion. (a) (b) (c) (d) Figure (4.5) Shows JTAG connectors (a) Altera, (b) Xilinx, (c) Atmel, (d) Actel 121

135 Chapter4 FPGA/CPLD Technology JTAG Wireless Interface Investigation The difficult task at biodevices is re-configuration of the device where it is implanted inside the body. This involves a dangerous break in the working of the modulator if the configuration malfunctions in the device. Practically, JTAG wireless technology is not widely used in wireless protocols communication; this could be solved by replacing the four wires JTAG port with a radio channel, for testing and configuration purposes. However, for biomedical devices these have been already configured before the device is implanted inside the human body. The other solution uses self-configuration for the devices, which already have flash memory. Figure (4.6) demonstrates the general concept for wireless configuration based on CPLD topology for reconfiguration of the device, which can be replaced with a wireless solution, instead of using USB interface or byte blaster [207]. Furthermore, this technique offers a practical solution for modifying and upgrading the modulator, (inside the body), where the device is implanted after the surgical implementation. Figure (4.6) the prospective wireless protocol for the re-configurated device 122

136 Chapter4 VHDL Modulators 4.4 BPSK-VHDL Direct Digital Modulator Modulator Methodology Design In modern digital communication, the BPSK modulation is the most popular applied in modern wireless communication. In wireless applications, such modulation may also be used for medical purposes, such as satellite telemetry, biotelemetry, telemedicine and healthcare. Furthermore, endoscopy, retina and brain telemetry devices are mainly developing with a high data rate. There is a high demand for a higher data rate, because of increasing the electrode numbers for reading the nerve signal information or controlling data. In such applications BPSK has advantages over FM, AM, ASK and FSK modulations [115] [10]. The advantage of BPSK is having fixed carrier signal amplitude that provides stable power transfer and independent data modulation. This is suitable to provide a constant RF signal into an implant device. The advantage is high readability for DC voltage supply at different distances between reader coils and implant part. We propose in this part of thesis to develop VHDL code to generate a digital BPSK signal for improving modulator performance and increasing the data rate [131]. Compared to the other analogue modulators, this type of modulator provides digital synthesis and the flexibility to reconfigure and upgrade with the two most often used languages VHDL-and Verilog-based [16] [42] and [25] [119]. The analogue Binary Phase shift Keying signal can be represented mathematically in equation (4.1), while the input data and transition for carrier wave is shown in Figure (4.7). 2E SBPSK m( t) cos( ct) (4.1) T b Figure (4.7) the BPSK waveform with respect to (NRZ) data state 123

137 Chapter4 VHDL Modulators As demonstrated in Figure (4.13), the digital data is converted from analogue or already generated in digital form and, this is required to convert to the analogue modulator performance. For this technique, it is essential to convert the binary data m (t) into NRZ signal that maps the logic (0) to -1V (nominal) and logic (1) to + 1V. This data signal controls the transition shift ( 0),( ) for the carrier signal. That results in high power consumption for these types of analogue modulators, reduces their efficiency and limits their biomedical application. This also increases the hardware complexity of the circuit and produces a large physical device. The proposed modulator was developed with a VHDL description code to generate carrier shifts (0) and (180 ) which are controlled by the input binary data to perform the transition of the BPSK signal. The modulator consists of digital and analogue parts as depicted in Figure (4.8). The proposed modulator output signal at multiplexer (Mux) is in digital modulated form. It can be expressed as: Mux out carr0 PN carr PN (4.2) Figure (4.8) Block diagram of the proposed digital BPSK Modulator Compared to Analogue 124

138 Chapter4 VHDL Modulators The filter is essential for the modulator to complete the process (off-chip); the output signal produced by the filter has an analogue form. In this work, we investigated two types of filters, the first is low pass filter (LPF) and the second is band pass filter (BPF). The BPSK VHDL modulator output signal fed into the test filters; this will be discussed in this chapter in detail. Generally, the output is selected by the multiplexer then filtered with either a passive band pass filter or low pass filter to eliminate the high frequencies and the harmonics which are associated with the square wave signal, in order to provide the transmit analogue signal (Tx). The simulated random data signal (Data_in) that is generated by a PN sequence can be represented by the Fourier series analysis as expressed in equation (4.3), where the input carrier signal is a periodic pulse train signal, which mathematically can be expressed in equation (4.4) [171], [40] and [27]. n PN ( t) C p( t ) (4.3) n nt c sin((2k 1) ct)) Carrier ( t) (4.4) (2k1) 4 k1 The module system was synthesized and simulated with the MATLAB/Simulink environment [162] [28], and synthesized with VHDL programming code, and performance was evaluated by the hardware measurements. Figure (4.9) demonstrates the three methods considered for generating and evaluating the proposed digital modulator for the characteristic performance. MATLAB/Simulink Modulator VHDL Modulator Hardware Modulator FFT Figure (4.9) Diagram of evaluation methods for proposed modulator 125

139 Chapter4 VHDL Modulators Module Modulator Simulation BPSK Modulator MATLAB/ Simulink Simulation The BPSK modulator was designed and simulated with the MATLAB/Simulink environment to verify and validate the modulator specifications compared to the analogue modulators. For further work, the demodulator was constructed using the same tools to examine the performance of our proposed digital modulator. The modulator consists of a carrier source to produce a periodic pulse signal ( f carrier ), that feeds into the carrier phase shifter which generates two discrete states (0º), (180º), and is then interfaced to the multiplexer. The data source is generated by PN_sequence, the data mapping in BPSK is used only the Q signal. Subsequently, the output is selected by multiplexer, which provides a digital BPSK signal, and this signal is filtered with an analogue filter before being transmitted. This passes the fundamental frequency ( f carrier data ) and eliminates the high frequencies associated with the modulated signal. The presence of noise is simulated by adding an additive white noise (AWGN) channel. The architecture block diagram of Tx_Mod is shown in Figure (4.10). The simulated random data signal (Data_in) is generated by a PN-sequence that represents the data source for proposed modulator, at a bit rate of 2Mbps for simulation purposes. Figure (4.10) the simulation environment with MATLAB/Simulink for proposed BPSK modulator 126

140 Chapter4 VHDL Modulators The simulation result of the MATLAB/Simulink modulator is presented below in figures. Figure (4.11) The Spectrum of BPSK transmits Receives signals at carrier 12.5MHz Clearly, the spectrum of the transmitted RF signal presented in CH1, and the received RF_signal presented in CH2, and the presentation of noise (AWGN) is shown in Figure (4.11). The simulation results for modulator and demodulator are shown in Figure (4.12a), which presents the RX- BPSK signal. Whilst the signal in Figure (4.12b) presents the recovered carrier signal, and the demodulated data has presented in Figure (4.12c), the transmitted PN code sequence is presented in Figure (4.12d). In Figure (4.12e) is shown the demodulated received data. Finally, the simulation result for the Bit Error Rate (BER) of the designed demodulator is shown in Figure (4.13). Obviously, that presents the comparison between the theoretical calculation and the simulated TX signal from the proposed BPSK modulator. Figure (4.12) the proposed digital BPSK Mod/ Demodulator in MATLAB/Simulink Figure (4.13) The BER simulation diagram of Demodulator signal from the proposed BPSK Modulator 127

141 Chapter4 VHDL Modulators VHDL BPSK Modulator Design and simulation The new simple VHDL Binary Phase shift Keying (BPSK) modulator has been synthesized for transcutaneous biomedical devices applications. It is programmed with the Hardware Description Language VHDL code to generate the behavioral BPSK digital signal. The carrier frequency is about (12.58 MHz), which was generated from the local clock, which was working at MHz. The data information had reduced into 2 MHz and then fed into the PN-code generator, which is considered as information source. The behavioral simulation is shown in Figure (4.14), where the waveform simulation is presented in Figure (4.15). Carrier_Phase:inst1 mux_2:inst2 pin_name pin_name q signal_gen:inst PN_gen:inst3 Carrier_Phase:inst1:q PN_gen:inst3:PN_out output_mux~2 pin_name4 Carrier_Phase:inst1:q pin_name PN_out signal_gen:inst:pn_out PN_out pin_name1 Figure (4.14) the proposed VHDL BPSK modulator Figure (4.15) the waveforms simulation of the BPSK Proposed Modulator 128

142 Chapter4 VHDL Modulators 4.5 QPSK-VHDL Direct Digital Modulator Module Method Design Demand for a high data rate for the data returned from the body is increasing, and require an efficient modulator to achieve both a high data rate and low power consumption. In such applications, the QPSK modulation has advantages over other schemes, and double symbol rate with respect to the BPSK over the same spectrum band. This is contrast to analogue modulators for generating the QPSK signals, where the circuit complexity and power dissipation are unsuitable for medical purposes. This type of modulator provides a digital synthesis and the flexibility to be re-configured and upgraded with two of the most often used languages, VHDL and Verilog (IEEE standard), based as hardware structure languages described in [17] [31] and [42]. All analogue or hybrid analogue/digital QPSK modulators work with the phase shift of the carrier ( ), as the key of the modulation [129] [132]. The phase shifter is the most important element in the modulator to acquire two discrete signals sin( t) and cos in( t). Practically, it uses a direct digital synthesizer (DDS) or numerical control oscillator (NCO) to generate the carrier signal [189] [172]. However, in analogue modulation it is essential to use the NRZ format to map I and Q, that produces analogue QPSK signal, which can be represented mathematically in equation (4.5) and I/Q are defined in equations (4.6) and ( 4.7) respectively: QPSK ( t) I( t)cos( t) Q( t)sin( t) (4.5) c c 2E I( t) cos[(2i 1) 4] T (4.6) 2 Q t) sin[(2i 1) T E ] (4.7) ( 4 where: f c is the frequency carrier I (t) is the in phase of data Q (t) is the quadrature of data i is the number of M (M=2, marks this a BPSK,M=4 is QPSK) These types of conventional modulators are not suitable for medical applications, which are essentially working with the input data in NRZ signal form. The proposed QPSK VHDL modulator was programmed to generate a carrier phase shifter, to acquire four discrete states (0º, 90º, 180º, and 270 º), where the input data was split into two separate streams in-phase I, and quadrature phase Q, to map the carrier signal, which was interfaced to the multiplexer. 129

143 Chapter4 VHDL Modulators The output is selected by multiplexer to provide a digital QPSK signal, which passes via a passive filter before being transmitted that eliminates the high frequencies. Figure (4.16) demonstrates the proposed VHDL QPSK modulator compared to an analogue modulator. The digital QPSK signal of the multiplexer output can be represented in equation (4.8) below: Mux out I QC 0 I QC90 I Q I C180 I QC270 (4.8) Analogue Modulator Digital Modulator Figure (4.16) Block diagram of the proposed digital VHDL QPSK Modulator Comparing to Analogue QPSK modulator 130

144 Chapter4 VHDL Modulators To simplify the modulator design, were studied the principle of the QPSK analogue modulator, that is the main challenge for converting and designing the modulator in simple digital form. However, in analogue modulation when generating the QPSK signal and data are in NRZ signal format, it is essential to map the data into I and Q streams, which are influence the carrier signal according to the transition of the input data. These types of techniques are not suitable for biomedical applications; it is conventional modulators, which are essential when working with the input data in NRZ signal format. To convert the carrier, it is synthesized with a periodic pulse signal, which generates four discrete states (0, 90, 180, and 270 ), whilst the data mapping is described in different concepts. Figure (4.22) describes the first concept (A). The direct digital modulator is controlled by two streams I and Q of the carrier (0, 270 ) and inverted data is the controlling carrier (90, 180 ), then two carriers are combined together and subtracted in order to produce the QPSK signal. The critical point in this process is difficulty of converting the adder/substractor in full design of modulator in digital form. The second design concept (B) is presented in Figure (4.18), which describes the generation of the carrier signal method and the selectable switches to discrete phase shifts of the carriers. The data are mapped for generating I and Q streams, then interfaced into switches for transition of the carriers: the switches are represented by multiplexer, which produce a full QPSK digital signal. Figure (4.17) the concept (A) for generating direct QPSK digital modulator 131

145 Chapter4 VHDL Modulators The third design concept is shown in Figure (4.19), which shows how the carrier signals and data are generated individually; each phase of carrier signal is controlled by a single mapping of data then combined by multiplexer, to generate the desired digital QPSK signal. Figure (4.18) the concept (B) for generating Direct QPSK digital modulator Figure (4.19) the concept (C) for generating the Direct QPSK digital modulator 132

146 Chapter4 VHDL Modulators Module Simulation QPSK Modulator MATLAB/ Simulink The QPSK modulator was synthesized and simulated with MATLAB/Simulink to verify and validate the modulator characteristic and specifications. The modulator consists of the carrier source to produce a periodic pulse signal( f ), applied to the carrier phase shifter which is Carrier shifts the input into four different phase signals (0 ), (90 ),(180 ),(270 ) these four signals are interfaced into the multiplexer. Whilst the data source is generated with PN-sequence, it feeds into data mapping to generate I and Q signals that control the four phase different signals. The output is selected by the multiplexer, which provides a digital QPSK signal. This signal was filtered with an analogue filter before it was transmitted. Most importantly, it needs to pass the fundamental frequency ( f o data ), in addition to eliminates the high frequencies associated with the square signal. The architecture block diagram of the proposed Tx_Mod is shown in Figure (4.20), where the simulated random data signal (Data_in) is generated by a PN sequence. QPSK Modulator Shift _0 0 SHift _90 90 Carrier_out Carrier_in Noise Channel Carrier _source Shfit _ QPSK_out In1 QPSK_signal AWGN RF_link_Rx Shift _270 Carrier Shifter 270 I BPF AWGN Channel 1 RF_Tx I_Out Q PN_code PN_input Q_out PN_out Mux PN_generator Data _Mapping Mux_signal PN_code Data rate ~2Mbps--Carrier 12.5MHz Monitoring Signals PN_code Mux_signal RF_Tx RF_link_Rx PN_generatro Digital_QPSK Tx_singal Rx_sinal1 Figure (4.20) the simulation environment in MATLAB/Simulink for the proposed QSPK digital modulator 133

147 Chapter4 VHDL Modulators The result of simulink simulation for proposed modulator has shows in Figure (4.21) and the spectrum for the transmitted signal has demonstrated in the Figure (4.22). Figure (4.21) the QPSK waveform with respect to data state Figure (4.22) the spectrum of QPSK transmission and receipt of signal at Data rate 2Mbps, carrier 12.5MHz 134

148 Chapter4 VHDL Modulators Synthesis of VHDL QPSK Modulator and Simulation The proposed modulator was built using the Altera UP2 development kit board, programmed with the VHDL language for module design and analysis of the proposed QPSK modulator. In VHDL, there are two programming techniques to be described: these modulators as direct logic synthesis the structural and behavioural code. The simulated result of this modulator has been presented in two methods structural/behavioral. Figure (2.23) demonstrates the structural design of the digital proposed modulator, demonstrates the output signals indicating the carrier phase shifter (0, 90, 180, 270 ), this carrier frequency 12.5 MHz is generated by the local clock signal on the board, which operates at MHz. While the data source was generated with PN_sequence generator, it feeds to data mapping to generate I and Q signals to influence the four different phase carriers. The output was selected by multiplexer, which provides a digital QPSK signal. However, the behavioural code generated is shown in Figure (4.24), the frequency divider reduced to 2 MHz then used to generate the PN-sequence data (behavioural description). The output of PN code signal is interfaced to data mapping I and Q, these the carrier signal and data are interfaced into multiplexer to select the QPSK digital signal. However, the digital output signal passes through the LPF for harmonics separation (Off chip), which will be discussed in the filter section. Carrier 1CLK 7474:inst 1Q 74153:inst21 1D 2CLK 1QN 2Q 1C0 1C1 I180 2D 2QN 1C2 1C3 A 1Y Q-Signal I0 7474:inst5 B Data 1CLK 1Q Q2 1D 2CLK 2D 1QN 2Q 2QN Q1 I90 I270 Figure (4.23) Structural VHDL-code simulation for the QPSK modulator 135

149 Chapter4 VHDL Modulators The simulated result of this QPSK digital modulator is presented in Figure (4.25) which demonstrates the output signal waveforms indicating the transitions (90 ) ( 180 ) of the carrier signal (output of multiplexer), due to the data influence. Figure (4.24) the behavioral VHDL modulator simulation Figure (4.25) the simulation waveforms of VHDL QPSK modulator Carrier Phase Shifter Modulator efficient Design The carrier signal is the critical element in the design of the digital modulator, which affects the efficiency and the performance of the modulator. For a robust modulator design in digital techniques, the errors and delay in carrier signals are most important in the design. 136

150 Chapter4 VHDL Modulators The carrier phase shifter was programmed with VHDL code in structural design. The structural and behavioral blocks diagrams of the VHDL code for the carrier phase shifter are shown in Figure (4.26) and Figure (4.27) respectively. The simulation results for the synthesis of the carrier shifters suffer from the delay in signals. The waveforms of the carrier outputs signals are demonstrated in Figure (4.28). However, the delay time is critical in the inverted shift signals (180º) and (270º), this delay affects the transition of the output signal for the modulator. Obviously, the time delay in the phase shift carrier was calculated, and was about 5ns. This delay was due to inverters output of the carrier in the waveforms. However, the phase delay in carrier signals was measured to minimize the phase error. Figure (4.26) Structural VHDL Simulation for carrier phase shifter I270~0 A NOT1:U3 X my_dff1:u2 comb~[1..0] BUF (DIRECT) I180~0 I270 Carrier_in A NOT1:U4 X clk d q BUF (DIRECT) A NOT1:U1 X clk d my_dff1:u0 q BUF (DIRECT) I90~0 I180 I90 BUF (DIRECT) I0~0 I0 BUF (DIRECT) Figure (4.27) Behavioral VHDL Simulation for carrier phase shifter 137

151 Chapter4 VHDL Modulators 3 Figure (4.28) the waveforms delay in carrier phase shifters The modified design is presented in Figure (4.29), which cancelled the delay at outputs (zero delay) by modifying the VHDL code; the output waveforms result are demonstrated in Figure (4.30). The modified delay for the phase shifter code is illustrated in Appendix (B). Figure (4.29) behavioral Simulation of VHDL carrier phase shifter Figure (4.30) the simulation waveforms for modified carrier phase shifter 138

152 Chapter4 VHDL Modulators PSK Modulator Digital Module Method Design The higher level of direct digital modulations is the 8PSK. As a result of extending the symbol rate, the separation between phase states becomes smaller and susceptibility to noise increases. The 8PSK modulator is described as deploying, the highest order PSK constellation. The challenge in digital modulation schemes is for a perfect synthesis design to minimize the processing circuit with compatible hardware. In practice, there are different topologies to synthesize the 8PSK modulator, which is mostly used in mobile communication and in modern telecommunication. The modulator block diagram is shown in Figure (4.31), which is possible for synthesis with the FPGA technologies. The signal constellation usually deals with binary data that means the number of symbols, the symbols probabilities constellation diagram for the 8PSK modulator as shown in Figure (4.32). Figure (4.31) the diagram for 8psk modulator Figure (4.32) the constellation diagram of 8PSK modulator 139

153 Chapter4 VHDL Modulators Module Simulation PSK Modulator MATLAB/Simulink The 8psk proposed digital n-psk modulator was evaluated when generating a digital signal. This modulator was simulated with MATLAB/Simulink environment to validate the modulator specification of digital scheme. Generally, to compare the digital modulators, the three most common three schemes were overviewed. The first modulator is BPSK, which is composed of digital carrier phase shifter for discrete the phases (0 ) and (180 ), both signals are controlled by the input binary data to perform the transition of the BPSK signal. The second proposed modulator is QPSK, which consists of the carrier phase shifter, which shifts the input carrier into four different phase signals (0 ), (90 ), (180 ) and(270 ), and these are interfaced to the multiplexer. Whilst the data source is generated with PN-sequence, it feeds into data mapping to generate I and Q stream signals. The output is selected by the multiplexer, which provides the digital QPSK signal. The third proposed modulator is 8PSK, which is composed of eight discrete signals as (0,45, 90,135 ), (180,225, 270, 315 ). These carrier signals are controlled by the n binary input data through a counter to generate ( 2 8 where n=3), that performs the transition of the eight carrier signals data mapping. It is then interfaced into eight inputs multiplexer, and the output provides an 8PSK digital signal. However, we demonstrate in Figure (4.33) the principle of the proposed direct digital modulator 8-PSK. This type of technique simplifies the modulator to synthesize with FPGA or CPLD technologies, and may be useful for biomedical proposes. The multiplexer output for the digital 8PSK signal can be expressed in equation (4.9) below as: Figure (4.33) the principle of direct digital modulator 8PSK in FPGA/CPLD 140

154 Chapter4 VHDL Modulators Mux out C C D 0 D 0 D 1 D C D D C 270 D 0 D 0 D 1 D D C 1 2 D 2 45 D 0 D 1 D C D 0 D 1 D C 2 90 D 0 D 1 D 2 (4.9) The carrier phase shifter generates the eight phase clocks as (0,180,90,135, 45, 225, 270, 315 ), where the data mapping provides the essential transitions of the carrier. The multiplexer is a selectable switch which is interfaced from the carrier phase shifter and mapped data; the output provided is an 8psk digital signal. In practice, the modulator was synthesised in simulink as shown in Figure (4.34). However, the critical element for design a digital modulator is the carrier phase shifters, which generate the phase difference between carrier signals with minimum delay, where the delay is reduces the modulator efficiency in digital processing. The clock frequency for this type of phase shifter needs to be four times higher than the shifted frequency, where the carrier divided by ( / 4 ) to generate the phase shift between each carrier such as: sin( t / 4) ~ sin( t +7π/4). Furthermore, to generate the frequency 12.58MHz it needs the frequency to be about 50MHz. The FFT spectrum of the modulator is demonstrated in Figure (4.35). The simulation result for the 8PSK output waveforms of the proposed digital scheme is demonstrated in Figure (4.36). Clock1 -C- 6 D Q CLK!CLR!Q D1 AND Logical Operator AND D CLK Q Logical Operator 1 -C- 5!CLR!Q D6 AND Logical Operator 2 D CLK Q AND -C- 7!CLR!Q D7 Logical Operator 3 -C- 8 D Q CLK!CLR!Q D8 AND Logical Operator 6 1 QPSK _out AND Logical Operator 7 AND Scope Logical Operator 8 Data (-1)^ceil (u) Fcn2 1 4 S P5 AND Logical Operator 9 D CLK Q NOT L2 NOT L1 NOT L!CLR!Q D2 1 1 D Q CLK!Q!CLR D3 D Q CLK!Q!CLR D4 Figure (4.34) the simulation environment in MATLAB/Simulink For proposed 8PSK modulator 141

155 Chapter4 VHDL Modulators Figure (4.35) the spectrum of 8PSK transmission and receipt of signals at Data rate 2Mbps, carrier 12.5MHz Figure (4.36) the simulation waveform results for Proposed 8PSK modulator 142

156 Chapter4 VHDL Modulators VHDL 8PSK Modulator Synthesis and Simulation The 8PSK modulator was programmed with the VHDL code, and compared with two different synthesized methods, the structural and behavioral descriptions. The behavioral programming code simulation method of the 8PSK modulator is shown in Figure (4.37). The carrier frequency was generated from the local clock signal on the board, which operated at MHz. The information signal was reduced to 2 MHz by the frequency divider, and then fed into the random PN_sequence generator to generate a sequence of data for simulation purposes. The simulation waveform result for the module is shown in Figure (4.38), which demonstrates the transition of the digital signal for 8PSK modulator output. Carrier_8Phaser:inst mux8to_1:inst1 my_df:u0:q Carrier_8Phaser:inst:q my_df:u0:q~4 my_df:u2:q counter:inst2 Carrier_8Phaser:inst:q Carrier_8Phaser:inst:q Mux0~26 8_PSK_out Carrier_input Carrier_input my_df:u2:q~4 my_df:u4:q my_df:u4:q~4 Direction PN_gen:inst3:PN_out count_int[0..2] Carrier_8Phaser:inst:q counter:inst2:count_int[0..2] COUNT_OUT[0..2] my_df:u6:q my_df:u6:q~4 PN_gen:inst3 pin_name[1..8] Carrier_input PN_out Direction Figure (4.37) behavioral simulation for VHDL digital 8PSK modulator Figure (4.38) waveform simulation for 8PSK VHDL modulator 143

157 Chapter4 Experimental measurements for VHDL Modulators 4.7 Experimental Lab measurements for VHDL modulators BPSK modulator The Altera development kit conducted the measurements performance for the proposed BPSK modulator, to test the VHDL code modulator and compare the performance with the simulated BPSK modulation. The desired carrier frequency 12.5 MHz was generated from the master clock on the circuit board operating at MHz. The carrier phase shifter acquires two discrete phases (0º), (π), the PN-sequence code source generated with VHDL code inside the CPLD chip at 2Mbps. The Agilent digital demodulator (E8048A VXI) was used to receive the filtered RF BPSK signal. The lab measurement result is shown in Figure (4.39) for the spectrum transmitter signal. However, the measurements for the received signal were demodulated with Agilent (E8408A) after being passed through passive LPF for harmonics separation; the results are shown in Figure (4.40), the constellation diagram of the BPSK at demodulator. Figure (4.39) The Spectrum of BPSK transmitted signal at carrier 12.5MHz Figure (4.40) the constellation diagram of BPSK at demodulator using Agilent digital demodulator (E8408A) 144

158 Chapter4 Experimental measurements for VHDL Modulators Furthermore, the measurements were done over the inductive coupling link to test the proposed modulator, as shown in Figure (4.41), which demonstrates the Lab test bench for the BPSK VHDL modulator. The measurement result is illustrated in Figure (4.42) which shows the spectrum of the received signal through wireless coupling (a) and demodulated data (b). Figure (4.41) the preliminary lab measurements with (E8408AVXI) For the proposed BPSK VHDL modulator at over inductive link Figure (4.42) (a). The spectrum of Rx signal (b). Demodulated data (2Mbps) received from the proposed VHDL modulator over inductive link 145

159 Chapter4 Experimental measurements for VHDL Modulators QPSK Modulator The second lab measurement was provided for the QPSK modulator, conducted by the Altera development kit board, to evaluate the VHDL code modulator. The acquired four discrete states (0, 2,,3 2 ) for the carrier phase shifter were tested, to evaluate any phase error for the phase shifter signals. The source of data was generated with VHDL code inside the CPLD at 2Mbps. However, the measurement spectrum of the Tx-QPSK modulator is demonstrated in Figure (4.43) after the modulated digital signal was passed through the passive LPF. Conversely, the performance was measured using Agilent education version to demodulate the received signal using a QPSK Demodulator. The demodulated information data, which was transmitted by VHDL modulator, is shown in the constellation diagram for QPSK Rx signal in Figure (4.44). Figure (4.43) The TX Spectrum of the QPSK transmitted Signal at carrier 12.58MHz Figure (4.44) Constellation diagram of QPSK demodulator, received from the proposed VHDL QPSK modulator 146

160 Chapter4 Experimental measurements for VHDL Modulators The second lab measurements for the proposed VHDL QPSK modulator where conducted over a wireless inductive link, as depicted in Figure (4.45). The spectrum of the Rx QPSK demodulator (a) from the VHDL QPSK modulator, received over the inductive coupling link is illustrated in Figure (4.46), and (b) presents the demodulated information at 3Mbps. Reader Unit VHDL Modulator Figure (4.45) The Lab measurement for QPSK VHDL modulator over Inductive coupling link With Agilent, demodulator (E8408A) (a) (b) Figure (4.46) (a). The spectrum of Rx signal (b), demodulated data (3Mbps) Received from the proposed VHDL modulator at over inductive link 147

161 Chapter4 Experimental measurements for VHDL Modulators PSK modulator The third lab test measurements were performed for the 8PSK modulator, and were evaluated with MATLAB/simulation. The carrier frequency used the local clock signal, which operates at MHz, and uses MHz for the carrier and 2MHz to generate the PN-sequence as data source. The carrier phase shifter was measured individually for the efficiency performance and phase delay testing. In addition, the data mapping was tested before being synthesized in the completed 8PSK modulator. In this section, the measurements performance conducted using the same previous tools for testing the VHDL code for 8PSK digital modulator. The Agilent digital demodulator (E8408AVXI) used to receive the RF 8PSK signal, and analyzed using the parameters of the transmitted signals. Generally, the spectrum of the generated VHDLbehavioral code of the 8PSK modulator is illustrated in Figure (4.47), where the measured the constellation diagram is illustrated in Figure (4.48). Figure (4.47) The TX Spectrum of the 8PSK transmitted Signal at carrier 12.50MHz and data 2MBps Figure (4.48) Constellation diagram of 8PSK demodulator Received from the proposed VHDL 8PSK modulator 148

162 Chapter4 Passive Filter Design 4.8 Filter Investigation For Medical Purpose Wireless transmission, cannot transmit the digital signal directly through a band-limited channel with original format without harmonics separation [173] [40]. The outputs have BPSK, QPSK or 8PSK digital modulated signals (Square Wave Form). Therefore, we needed to investigate and synthesize an analogue passive filter for this purpose, with zero power consumption. Two types of filter investigated, the Low pass Filter LPF and the Band Pass Filter BPF; they are appropriate for our work. In the simulation, the Butterworth LPF gave a better performance than other types of LPF, to eliminate the frequencies harmonics from the modulated digital signal, and consequently the Chebyshev II BPF is gave a better performance than other types of BPF as the second choice for appropriate filters for biodevices applications. However, the output signals yields by the filters were in analogue form, as demonstrated in Figure (4.49), where the VHDL modulated digital signal is presented in equations (4.8) and (4.9). This square input signal is filtered to pass the fundamental frequency ( component. f data ) and remove the harmonics and DC S BPSK / QPSK S BPSK / QPSK Figure (4.49) Two filters types used for harmonics eliminatation Mux out carr0 PN carr PN (4.8) Mux out I QC 0 I QC90 I Q I C180 I QC270 (4.9) Three different types of digital modulators BPSK, QPSK, 8PSK were synthesised, and these schemes need an appropriate filter. It is essential to use an analogue passive filter off-chip to separate the harmonies and DC component, and reduce the circuit size and complexity, where the filter is implanted with the modulator in biomedical devices. Figure (4.50) shows different methods for the filtration. However, one of the disadvantages of digital filters is they need additional oscillation as sampling frequency, which increases the power consumption and size. 149

163 Chapter4 Passive Filter Design Additional investigation of the VHDL LPF showed that it needs a great deal of logic design and the kind of the CPLD chip that increases the power consumption [179]. Hence, as our target is a passive analogue filter, the simulation result is given for the Chebyshev I & II, if we select the BPF compared to others. The optimum LPF performance was the Butterworth type. Generally, the other types of filters are presented in table (4.0), rated as the best characteristic performance (BCP), or less characteristic performance (LCP), and weak characteristic performance (WCP), and not perfect performance (NPP), which compares the attenuation for harmonics separation (HS), that is the function in the filter order design. BPSK QPSK 8-PSK Figure (4.50) Different methods filters types used for harmonics elimination Investigated Filter Types for LPFilter and BPFilter Butterworth Chebyshev I Chebyshev II Elliptic Besself Carrier suppression Harmonics suppression Carrier suppression Harmonics suppression Carrier suppression Harmonics suppression Carrier suppression Harmonics suppression Carrier suppression Harmonics suppression LPF -18dB -12dB -15dB -20dB -15dB -20dB -15dB -15dB -10dB -15dB BPF -20dB -20dB -15dB -18dB -18dB -25dB -10dB -15dB -10dB -18dB Table (4.0) comparison of the simulation results for harmonics elimination for pulse modulated Carrier at frequency MHz, using different filter types 150

164 Chapter4 Passive Filter Design LP Filter Design and Simulation An LP filter was investigated and deemed appropriate for our purpose; the Butterworth LPF showed given enhanced performance compared to other types of LP-filters, to eliminate the harmonics from the BPSK or QPSK digital modulated signals. Generally, the block diagram of the passive filter with digital modulator is demonstrated in Figure (4.51). The transfer function of the filter is the main important factor for the filter design, which describes the filter specification. In a practical design to reduce the component circuits of the filter, we synthesized a low pass filter, which considered the data bandwidth and created less distortion by the filter. The proposed circuit diagram is shown in Figure (4.55), where the transfer function is expressed in equations (4.10), (4.11) and (4.12). Data input Modulated Signal Figure (4.51) the proposed passive filter design with digital modulator SQPSK ( j) H( j) (4.10) Mux ( j) out SBPSK ( j) H( j) (4.11) Mux ( j) out H( s) S 2 Figure (4.52) the second-order for LPF filter circuit 1 LC 2 2 SRC 2 C 1 C 1 (4.12) 151

165 Chapter4 Passive Filter Design The simulation indicated different performance between Butterworth and Chebyshev LPF, when considering the input impedance of the source instead of load impedance. There are three different cases as shown in (4.13). In communication circuits, the matching load impedance is 50Ω, with the antenna part, which is obtained by the maximum transfer power. Generally, the block diagram for matching impedance with antenna is shown in Figure (4.53). Input impedance is higher than > Load Input impedance is lower than < Load (4.13) Input impedance is = Load Figure (4.53) the matching simulation between filter and antenna Our prototype analogue filter was synthesized with a Butterworth 4 th order to filter the input of both BPSK and QPSK digital signals. The MATLAB/Simulink simulation is demonstrated in Figure (4.54), and demonstrates the response of the LPF filter compared with the Butterworth and Chebyshev I filters in 4 th order design. Figure (4.54) The LPF simulation with MATLAB/Simulink 152

166 Chapter4 Passive Filter Design BP-Filter Design and Simulation The BPF was the second choice for our work. Generally, the basic function of the filter is demonstrated in Figure (4.55). Different types of band pass filters are appropriate for our work; the Chebyshev I, II and Elliptic are the three filters, which were investigated. Our selected filter was an analogue passive Chebyshev II BPF Filter, LC filter 4 th order. The simulation result with MATLAB/Simulink FFT is presented in Figure (4.56), which compares the Chebyshev I, Chebyshev II and Elliptic performance and specification, showing that they give they a high separation, over 50dB. Band Pass Filter Filter f c H (s) 2 f c 3 f c 4 f c f c Figure (4.55) The BPF principle for attenuation of the harmonics Figure (4.56) The BPF simulation with MATLAB/Simulink for (Chebyshev I, Chebyshev II, Elliptic) Further, the simulations were performed with MATLAB/simulink to evaluate the filters specification for digital modulators signals. The five types of investigated filters were simulated and the analogue output signals are depicted in figure (4.57). 153

167 Chapter4 Passive Filter Design These are the analogue waveform signals after being filtered. Figure (4.57) filtered analogue waveforms simulation with MATLAB 154

168 Chapter4 Passive Filter Design Filter Lab Measurements Results We have investigated two prototype filters, the LPF and BPF, in simulation the BPF showed a better performance characteristic then LPF, especially with modulated signal. Conversely, the Lab test bench is illustrated in Figure (4.58). The Agilent (E8257D) function generator was interfaced to the Altera board that can generate a random PN-sequence as a data source. The second option is interfaced with a generator circuit for PN-sequence or programmed with VHDL code. The Agilent digital demodulator (E8048A) was used as a demodulator to demodulate the transmitted modulated signals from (BPSK) or (QPSK), in order to examine the performance of the proposed modulators. However, the Agilent scope (DS A) was used to capture the inputs signals before they were filtered; the desired carrier signal was generated from the master clock on the circuit operates at MHz. Generally, the function generator (Agilent E8257D) was used to generate a higher frequency in ISM band for testing purpose. However, in this section, we provide the lab test measurements for the proposed filters, to test the proposed VHDL code modulators. The waveform measurement result for the BPSK modulator is shown in Figure (4.59;, the top signal represents the PN code input signal, while the second signal represents the BPSK digital signal, and the third signal the filtered transmitted signal via LPF. Figure (4.58) LAB measurment for filters (LPF,BPF) for TX-QPSK digital signal 155

169 Chapter4 Passive Filter Design The second waveform measurement results for the QPSK digital modulator, the QPSK digital signal filtered by LPF, and the output analogue signal are presented in Figure (4.60). The LPF was synthesized at f cut f Carrier frequency without any distortion by the transmitter signal. data ; the calculated values are critical for the cut-off Figure (4.59) the output of VHDL BPSK modulator (Digital signal) and filtered signal at 12.5 MHz Figure (4.60) the output of the VHDL QPSK modulator filtered the QPSK TX signal by LPF 156

170 Chapter4 Summary 4.9 Summary and Results This chapter concludes the new design for our proposed digital modulators, implemented with a practical and simple direct modulators solution for biomedical applications. The synthesised technical approach for direct digital modulators will increase the data rate and improve spectrum efficiency. A summary is as follows: Synthesised Digital Modulators It is a challenge to convert the analogue modulator into digital forms and simplify the modulator, to be synthesised in the digital process and reduce the hardware circuit. However, the modules simulated in MATLAB/ Simulink environment have been successfully designed with VHDL programming code using Altera development kit. The target proposed VHDL modulator generates the QPSK signal directly from binary data, to be mapped for I and Q signals that control the carrier signal with a VHDL multiplexer code. The QPSK modulator was tested over the wireless inductive coupling, which gives better received data wirelessly up to 3Mbps over a distance of about 6.5cm. This technique offers a high data rate transmission over magnetic coupling link for biomedical devices, which requires a higher rate measured in real time. The lab measurement results for our proposed digital modulators BPSK, QPSK, and 8PSK are shown in Table (4.1). Practically, different CPLDs have been investigated as lower power consumption chips; the new ultra power is CPLD, which is provided by Altera MAX II CPLD (EPM240). Modulator Characteristic BPSK-Modulator QPSK-Modulator 8PSK-Modulator EVM % rms % rms % rms Phase Error deg 0 deg deg Frequency Error KHz KHz KHz Data rate over Magnetic coupling Total micro cells Altera (EMP3064) Power consumption of the modulator 1.3Mbps 2.5Mbps 3.5Mbps 10% 19% 25% 3.8mW 4.3mW 5.9mW Table (4.1) the lab measurements results for the specifications of digital modulators 157

171 Chapter4 Summary Filter Design for Biomedical Applications In general, the filter is the critical element in our design, where the size is important in the implant device, as the filter is implanted with the modulator in biodevices. Eventually, the passive filter was designed and simulated with MATLAB/Simulink. The LC Low pass Filter (LPF) and the Band Pass Filter (BPF) were investigated, simulated and synthesized. The simulation results for LPF Butterworth type showed better harmonics attenuation performance at about -25dB, compared to the Chebyshev I, and the Chebyshev II and Elliptic, which were simulated with the QPSK digital signal. Whilst the second choice was the Chebyshev II BPF Filter, which gave a better performance over other types of filters, as it had a high separation for the harmonics, over 50dB. Table (4.0) shows the simulation-summarised results for filter specifications for harmonics and carrier separations. However, the experimental measurements were presented at the carrier frequency 12.50MHz, and data rate up to 3.5Mbps, which presented better performance with bandwidth and carrier harmonics suppression over > 50dB for our prototype filters. Finally, different topologies have been investigated for filters, for example the digital filter has disadvantages, such as needing additional oscillation in sampling frequency, which increases the power consumption and size. Whereas the filters implementation with VHDL is limited with only LPF and required twice frequency for the sampling process and considerable power, the VHDL filter has disadvantages when working in low frequencies and using high gate counts inside the CPLD. Conversely, these types of filter are not considered in our work, compared to passive filters. 158

172 Chapter 5 Biodevices System Design, Management and Measurements

173 System Design and Management Chapter Five 5. Biodevice System Overview The biodevices communication system is magnetic proximity coupled between the reader and the implant part, which are tuned at the resonance frequency ( f o ). In this work we choose the frequency 135 KHz as the RF power carrier. Generally, the reader is usually fixed part system, where the implant is the movement part within the human body. The reader coil provides an electromagnetic field toward the implant coil which is inside the human body. This magnetic field is modulated by an ASK modulator that is for transmitting the control data to the implant device. The induced AC voltage at the parallel tuned circuit LC is rectified from the RF received signal to provide the required DC voltage. However, for the maximum magnetic flux to be harvested by the implant coil, both coils have to be placed in parallel with respect to each other. The mutual coupling between the two loops coils are maximized in this condition, that gives the optimum magnetic flux Φ. In practice, there are several factors that could be affecting the efficiency of the system such as the orientation of the antenna coils and misalignment. Generally, we demonstrate in Figure (5.0) the biomedical system block diagram. Figure (5.0) the block diagram of the biomedical system 159

174 Chapter 5 System Design and Management The completed module has been synthesized and testing with different test equipments for evaluating the performance, for our proposed modulator technique as depicted in Figure (5.1). Figure (5.1) the prototype module for the biodevice system using Inductive coupling link communication 5.1 Biodevices system and Experimental Lab Measurements Downlink Reader Unit In this section, where demonstrate the downlink part, which is the most important unit for delivering the RF electromagnetic power, into the implant through a wireless coupling link. The command information is conveyed to the implant, which is controlled remotely from outside the body. The Amplitude Shift keying (ASK) has been widely used in the wireless applications, such as RFID and Biomedical devices. 160

175 Chapter 5 Down Link transmission This is because it is a simple scheme and implies practical modulation and demodulation hardware. Comparing to the other schemes such as AM, FM or FSK where the demodulators are more complicated and consume a high power, as the demodulator is sharing the wireless received power with other circuits at the implant. The demodulator at the implant device is the most important element that is essential to be designed as a simple circuit and promoted for the low power consumption. In this chapter we will be introduce the ASK modulator as an alternative simple demodulator at the implant device comparing to the complexity of the demodulators used in biomedical devices. The amplitude of carrier frequency is modulated according to the logic state 0 or 1 of the data to be transmitted, where the depth modulation index can defined as a relation between the amplitudes of ASK signal as shown in Figure (5.2). The modulation index can be controlled by varying the relations between amplitudes (A+B) and (A- B), which represent the maximum and minimum amplitudes of the modulated signal. Generally, by changing A the amplitude and the duty cycle for the Fourier coefficient which of pulse signal D, that gives the change in modulation index as expressed in the equation (5.1), where the duty of pulse is D it can expressed in equations (5.3)and (5.4). However, the ASK modulator drives a class E power amplifier and is designed at 10% of modulation depth that provides a stable power transfer and independent data of modulation. In addition, this provides a constant RF signal into implant device; these advantages give high readability for DC voltage over different distances from the reader. Modulation index ( A B) ( A B)/100% (5.1) DutyRatio A/ n sin( nd) (5.2) D K / T (5.3) Where (K) is the pulse width, and (T) is the duration period time Figure (5.2) the modulation depth for ASK modulator 161

176 Chapter 5 Down Link transmission Lab Measurements for ASK Modulator The architecture block diagram of the proposed ASK modulator is demonstrated in Figure (5.3). Hence, the PN-sequence influences the switch transistor, which control Q2 and Q3 to drive the voltage into the class E power amplifier. The lab measurements are illustrated in Figure (5.4) which shows the input PN-sequence data (b), and the RF transmitted modulated signal (a). The ASK transmitted and received data are illustrated in Figure (5.5). In addition, the measurements of data have given up to 50Kbps, at carrier frequency 135 KHz. PN Codrce PC Figure (5.3) the block diagram of ASK modulator Figure (5.4) illustration of the ASK modulator (a), TX-PN code signal (b) 162

177 Chapter 5 Down Link transmission Figure (5.5) Tx PN data (a), (b) Demodulated data output Hybrid Power amplifiers Class F/E We introduce a new hybrid power amplifier (HPA) that uses the PWM technique to improve the power efficiency of the PA, and reduces the hardware implementation at the reader unit. The Hybrid-PA combines the tuning network circuits and uses a selectable switch to choose the desired amplifier. In our work we synthesized an ASK modulator for driving Class E-PA, which additionally provides wireless power, whether data is present or not. The control logic circuit has been designed to control the change over switches. It needs a control logic circuit (CLC), which is capable of controlling the selectable amplifier. Typically, the CLC drives the relay circuit. In addition, the feedback loop circuit captures the transmitted RF signal modulated or un-modulated, to monitor the carrier frequency signal, and perform the changeover between both amplifiers. The architecture block diagram of the proposed control system is demonstrated in Figure (5.6). The truth table demonstrates the state logic, where the circuit was synthesized and simulated in VHDL Table (5.0). Enc-E/F PC Relay1 Relay2 Relay3 Relay4 E-On PN/PC E-Off PN/PC F-On PN/PC F-Off PN/PC Table (5.0) the truth table of the proposed control circuit 163

178 Chapter 5 Down Link transmission ASK Mod Figure (5.6) diagram of the hybrid Class E/F power amplifiers circuit Eventually, the control command data can be interfaced from the PC to the reader through the ASK modulator, and also it can select one of the power amplifiers class E or F. However, the main goal of synthesis the hybrid power amplifier is to reduce the hardware circuit and better improves the transmitter s power efficiency. The control logic circuit can be implemented with a VHDL digital design, but generating the ASK signal is difficult to perform with the ASK modulator designed in digital form. However, the circuit can be divided into three parts: the ASK modulator, the RF carrier generator at 135 khz and power filters networks and the control auxiliary circuit which performed the control logic for the class power amplifiers selection E or F. Additionally, the PN-sequence and the control logic was modified and synthesized with VHDL for reducing the hardware circuits Control Logic Circuit (A) The logic control circuit was implemented with VHDL code to perform the function of table (5.0), that is, reducing the hardware circuits and it can be re-configured and updated. 164

179 Chapter 5 Down Link transmission Obviously, the control unit was synthesized with a microcontroller the first time and then we modified the design with CPLD, as appropriate for our application. However, the complete control circuit was synthesised with VHDL code and then simulated and loaded in CPLD to test the code of the circuit. Figure (5.7) shows the Inputs/Outputs implemented with CPLD, which are interfaced to the Error Detection Circuit (EDC). Relay 1 PC Relay 2 PA Selection Control Logic Circuit (VHDL) Relay 3 LED_E LED_PN LED_F LED_E LED_PC Figure (5.7) the Inputs/Outputs implemented with CPLD (EPM7128SL84-15) Design of the control logic circuit with VHDL (B) In the reader unit, there were many logic circuits to control the performance of the reader function with the implant device. The logic circuits were implemented with a CPLD chip by programming it in VHDL code; this was to reduce the hardware design, in addition to providing a fast implementation for the control circuit performance. The inputs were interfaced to a CPLD chip from the decision circuit to provide the essential transition logic for the control circuit. This provided selectable logic according to the distance and the orientation of the transmit coil, which changes the essential supply voltages for the power amplifiers. The block diagram of the complete control circuits is shown in Figure (5.8). The block diagram of the decision unit interface to the inputs and outputs CPLD chip is demonstrated in Figure (5.9) where the implementation of the truth Table (5.2) for the decision unit. Figure (5.8) the complete control units for voltage source to power amplifiers 165

180 Chapter 5 Down Link transmission The RF received signal was amplified and converted in to DC voltage, according to the intensity of the RF signal and the distance between the two coils. This output DC voltage was controlled by decision circuit. The VHDL code generated the control logic circuit as shown in Figure (5.10); the outputs were interfaced to voltage power supply circuit. That provided the appropriate output DC voltage according to the distance between coils and the orientations as (D0 ~ +5V), (D1 ~+9V), (D2 ~ +12V), and (D3 ~ +15V). The error detection circuit monitoring the input logic states and outputs from the decision circuit used four inputs excusive OR gate built in VHDL chip (EMP ) as shown in Figure (5.10). out out out out 1 x x x x x x x x x x 4 x x Logic outputs of the decision circuit out 1 out 2 out out 3 4 VHDL Control Logic Do D1 D2 D3 Figure (5.9) the Inputs/Outputs implemented with CPLD Output Logic Distance X0 X1 X2 X3 D0 D1 D2 D Table (5.2) Truth table of the decision proposed Control circuit 166

181 Chapter 5 Down Link transmission Figure (5.10) the code Inputs/Output with VHDL for the logic control circuit PN-Code Sequence Generator Background We used the PN-sequence as the data source in the reader part to simulate the command information, and to check the bit errors easily. The serial data stream was divided by a selected polynomial and the division remainder was transmitted at the end of the data stream as a Cyclic Redundancy Check Character (CRCC) [166]. Figure (5.11) demonstrates the example of the PNsequence for 16 polynomial codes. The polynomial can be generated by changing the binary select codes; this is given as example in Table. (5.3) below; at the receiver the same calculation should be performed to reproduce the sent data. If there were no errors in transmission, the new remainder will be zero. There are many common polynomial error detection techniques, as a read forward and reverse on the CRCC-16 and CRCC-CCITT functions. 167

182 Chapter 5 Down Link transmission Figure (5.11) the technique for generates PN-sequence data [166] Table (5.3) different PN-sequence techniques for error calculation PN code generation with VHDL code The PN-sequence algorithm was synthesized in VHDL code; there are many techniques to implement the code sequence. That is used as data source either in the reader part or implant to simulate the command information or as data source, and to check the bit errors easily. The synthesis of VHDL code for PN generators is demonstrated in Figure (5.12) and Figure (5.13) respectively, which uses two different codes to generate the PN sequence. Obviously, the first code uses the present state to reduce the logic gates to generate the PN-code. When compared to the second code, it reduces the consumption of power for the whole design inside CPLD. However, the VHDL code for PN sequence discussed in appendix B, along with the hardware circuit fabricated to generate the PN sequences data, and additional information is discussed in appendix C. Code selected X Y Z Polynomial generation Fwd CRCC -16 X X X Bawd CRCC -16 X X X Fwd CRCC-CCITT X X X Bawd CRCC-CCITT X X X LECC-16 X LRCC-8 X

183 Chapter 5 Uplink transmission present_state WideOr0 PN_out~reg0 PRE D Q PN_out clk clk seven six two ENA CLR zero Figure (5.12) the PN sequence generated by VHDL code (A) Figure (5.13) the PN sequence generated by VHDL code (B) Prototype Implant Device (PID) The second part in this chapter is the Up-link part, which is the important element in our work, where we evaluate our design for a high data modulator for biomedical applications. The implant device received the wireless RF power signal, which was delivered from the reader in magnetic modulated form. As described in the reader unit earlier, the Amplitude Shift Keying (ASK) was selected to transmit the information commands from the reader. It was recovered by the ASK demodulator in the implant device. However, the demodulator techniques in biodevices are still under investigation and challenges exist for many researchers to minimize the power and size, for improving the performance of the implant device. 169

184 Chapter 5 Uplink Modulation Our prototype PID consists of the RF rectifying signal to the DC voltage using signal Shtoky diodes, followed by switch regulator (SWR). This is attached to the ASK demodulator to encode the modulated signal from reader. The output voltage provided by SW was at about (3.28V) 5cm, apart, the maximum delivered current from switch regulator is about (15mA) as tested. The PID block diagram is demonstrated in Figure (5.14). The proposed modulator was synthesized with Altera chips ( EPM 3032, EPM3064) and configured for our codes to generate the (BPSK) (QPSK) and (8PSK). However, the accessories part of the implant was substituted by code as simulated data. However, the practical design work was done to design a digital demodulator instead of analogue demodulator, which is described in appendix-c, and which was also discussed in chapters two and four. The prototype for the implant device was designed and evaluated in Lab measurements for the proposed modulators (BPSK, QPSK) and (8PSK). We have described the general layout of the implant prototype device in Figure (5.14), which uses the inductive coupling link, for both directions of the communications. The maximum received power that was measured at the implant was about (95mW) at fixed voltage (3.28V) over communication distance about 4.5 cm. Proposed Modulator Figure (5.14) the target proposed modulator at implant device 170

185 Chapter 5 Uplink Modulation Tx Circuit Figure (5.15) the general layout diagram for the implant device Modulation Oepration Communication Consumption Data Rate Types Volatge distance of Power BPSK Up to 2.5Mbps 2.8~3.3V ~10 cm ~3.4mW QPSK Up to 3.5Mbps 2.8~3.3V ~9 cm ~4.4mW 8-PSK Up to 3.5Mbps 2.8~3.3V Up to 5cm ~5.4mW Table (5.1) the measurement results for our proposed modulators ASK Demodulator receiver (RX) The ASK modulation was described as an alternative simple scheme from demodulation, which is simple to implement in the implant device. Principally, the ASK demodulated received signal delivered from the class E power amplifier is demodulated by an envelope detector after a tuned circuit at RF resonant frequency. Then it passes through a low pass filter (LPF); due to a high input signal at short range, it may not be necessary to amplify the demodulated received signal. Thus, a simple Schmitt-Trigger was able to provide and shape the output of the demodulator which was then buffered. In our practical circuit, we used the MOSFET as a low pass filter followed by Schmitt trigger and inverter. The block diagram of the common ASK demodulator is shown in Figure (5.15) and the circuit diagram of the ASK demodulator is demonstrated in Figure (5.16) [104] [113]. The Lab measurements for the RF ASK modulated signal and the received signal, which are inductively coupled, is illustrated in Figure (5.17) at 10% of modulation index. However, the information data signal was interfaced from a variable PN sequence generator circuit, and then modified with PN-VHDL code. 171

186 Chapter 5 Uplink Modulation The measurement results for the transmitted PN-sequence and the received data were tested over different values up to (50Kbps) over the magnetic coupling at carrier frequency signal 135 KHz, which is demonstrated in Figure (5.18), showing the TX-PN-sequence and demodulated PN signal at the implant part. Finally, the ASK demodulator circuit consumed about (1.2 mw) at voltage (3.28 V) from the total wireless received power, and this consumption affected the implant efficiency, as the demodulator design still needs to be improved for low consumption power. Fig (5.16) the ASK Demodulator used at the implant device Figure (5.17) the ASK Demodulator circuit using MOSFET 172

187 Chapter 5 Uplink Modulation (a) (b) Figure (5.18) Waveforms of ASK RF Tx signal (a), (b) Rx- received signal at implant device at distance (5cm) (a) (b) Figure (5.19) (a) LPF output demodulated signal (b) PN output data Control System Unit (Reader) The control system was synthesized and evaluated with Lab measurements for the ASK Modulator/Demodulator, and these signals are shown in Figure (5.18). The results for ASK transmitted and received data was measured at 12kbps (tested up to 50kbps) over carrier frequency 135 KHz. The rest of the reader is demonstrated in the block diagrams in Figure (5.1), which consists of several parts: (1). Frequency control system (2). Position detection system (3) RF sensor (4). the hybrid power amplifier system. Generally, the hardware reader circuits are shown in Figure (5.20). 173

188 Chapter 5 Uplink Modulation Hybrid Class F/E Power Amp Power Supply Voltages +5 to +15 V Figure (5.20) the hardware of the part of Reader for the proposed control unit Frequency Control System (A) In practice, there are various methods that can be implemented to monitor the RF transmit signal. The feedback control technique is the common way for monitoring or controlling in power amplifiers and may be useful in wireless communication applications. The simple control has been designed using the PLL technique to auto-correct the RF transmit signal that offers output power stability for the power amplifier. In addition, the feedback control techniques can provide a stable constant voltage at the implant device. This method is a simple design to reduce the reader hardware circuitry and complexity. The feedback system consists of an amplifier to gain the RF signal, then passes through a square circuit (multiplier), and is then filtered at the centre frequency 2 and passes through the converter to the digital form. The phase comparator was f o used to compare the converted digital TX signal, with respect to fundamental transmit pulse signal f, and detect the phase shift for driving the VCO. We chose the PLL (HEF4046) to o synthesise the fundamental frequency of the oscillation square signal at carrier frequency 135 khz [220]. The proposed control system using PLL technique is shown in Figure (5.20) where in Class E case it was used to transmit the ASK signal, whilst in class F it was used as RF power signal generated as described in (5.4): RF Tx _ Coil cos( ct) Gain S ASK Class F Class E (5.4) 174

189 Chapter 5 Uplink Modulation Figure (5.21) the first control method using PLL (HEF4046) Therefore, to analyze the feedback interface signal to PLL, where( K ) defines the phase d comparator and VCO ( K ) signals, the e(t) is the output error pulse phase different, as 0 demonstrated in Figure (5.21) the mathematical analysis can be expressed in equations (5.5), (5.6), (5.7) respectively, where G ( s) K d. Ko e( t) r( t) y( t) (5.5) Figure (5.22) the feedback control method using PLL The transfer function of the PLL system can be expressed as: Figure (5.23) the PLL feedback system 175

190 Chapter 5 Down Link transmission ( s) ( s) (5.6) e in out 1 e ( s) (5.7) 1 G( s) The detailed circuitry of the PLL VCO (HEF4046)-[220] is given in Figure (5.23) as: Figure (5.24) Detailed PLL HEF4046B control system However, the Lab measurements for the PLL are illustrated in Figures (5. 24), (5.25) and (5.26) respectively. Figure (5.25) RF carrier signal (sine wave) and converted carrier digital signal 176

191 Chapter 5 Down Link transmission Figure (5.26) comparing the converted digital pulse and the reference pulse Figure (5.27) Phase error between original and converted digital signal Frequency Control System (B) The second practical solution method was synthesized to generate the PWM signal using an FPGA technique. The PWM technique can be used to provide a logic (1) and logic (0). In this work, the PWM was used as carrier pulse signal. Several methods were investigated for generating the PWM signal, but synthesis by two methods was programmed in FPGAs. The main critical design part was the feedback signal to synchronize the output PWM signal; the PWM error was detected by the phase comparator between both signals. Generally, the first proposed design is illustrated in Figure (5.28). Generally, the design was modified to correct the output PWM signal to perform the duty cycle at 50% at the tuned frequency 135 KHz, and according to the equation (5.8). The feedback technique in this design was modified to auto-correct the frequency and fix the duty cycle of the output PWM signal, where the feed back 177

192 Chapter 5 Down Link transmission provided the synchronization between the RF power amplifier and the pulse generated at centre frequency. However, to generate PWM signals by VHDL code it was essential to control the data value, which is loaded to the up/down counter, where the input data was fixed in this work at the binary ( ) to provide pulse width at 50%. In addition, the clock signal was internally generated and compared to the received pulse signal from RF digital convertor. The PWM needed to double the frequency of the carrier pulse to produce 135 khz. The PWM signal was generated by VHDL code and synthesized in CPLD (EPM7128SLC84-7), that drives the Class E power amplifier where it was used to transmit ASK signals, the result for PWM code generator is shown in Figure (5.29), and the PN-sequence was interfaced from external PN sequence, circuit to CPLD in the Altera development board. The ASK modulator signal was evaluated and tested with the VHDL pulse signal at the carrier frequency 135 khz. The transmitted TX ASK signal is illustrated in Figure (5.30) at a data rate of about (5.9kbps). In the completed work, the PNsequence was synthesized with VHDL code. PW where m 255 Ts τ ( 5.8) Figure (5.28) the second control method using PWM code by VHDL 178

193 Chapter 5 Down Link transmission clk_div CLock PIN_83 Input_clock PIN_4 INPUT VCC INPUT VCC inst5 clock_25mhz clock_1mhz clock_270khz OUTPUT OUTPUT Output_1Mhz Output_270KHz PIN_9 PIN_11 PWM_in[7] VCC PWM_in[7..0] PWM clk PWM_in[7..0] PWM_out OUTPUT PWM_out PIN_5 PWM_in[6..0] inst1 OR_gate GND InputA InputB OutputC inst4 Figure (5.29) the simulation result generating VHDL code for PWM signal (a) (b) Figure (5.30) (a) the TX-RF ASK transmitted by Class E-PA and (b) controlled PN-signal Measurements for TX&RX for n-psk Signal Over The Inductive Coupling The proposed modulator was conducted with an Altera CPLD chip, to evaluate our digital modulator design. The first modulator code was implanted to generate a BPSK, which was driven by PN-sequence signal as information source at (2Mbps). The measurement results are illustrated in Figure (5.31), where the same information data was interfaced to the QPSK modulator; the transmitted and the received signals are demonstrated in Figure (5.232). 179

194 Chapter 5 Down Link transmission (a) (b) (c) Figure (5.31) TX and RX for BPSK signal generated by VHDL code: (a) PN-sequence Code, (b) Tx- BPSK signal,(c) RX-BPSK signal (a) (b) Figure (5.32) the TX and RX for QPSK signal generated by VHDL Code (a) RX-QPSK signal, (b) TX QPSK signal 180

195 Chapter 5 Summary of the System Design and management 5.2 Summary of The Biodevices System In this chapter, we conclude the hardware overview of our prototype system, and Lab evaluated measurements for the complete system. It explains and displays the new technical approach solution for biomedical applications and tries to compare different digital modulators as synthesized in this thesis. However, different methodologies have been investigated and resynthesized for improving the system and reducing the hardware complexity. We improved the power amplifier and reduced the power consumption and maximized the transmit power, to increase the power efficiency. In addition, the first class power amplifier E has been specified for transmitting the RF-ASK modulator measured TX power at (46.63 dbm) Rx-power (14dBm) power efficiency (30%) and carrier frequency 134 KHz at data rate ~ 50Kbps. The second power amplifier F has been specified for RF power carrier measured TX power at (42 dbm) Rx-power (26.41dBm) power efficiency (66.025%) and carrier frequency 135 KHz. In practice, the consumption of power measurements for the ASK demodulator circuit is about 30% of the total wireless received power, and this high consumption of power affects the performance efficiency of the implant device and reduce the communication distance. It is still necessary to improve the ASK modulator design as a part of future work for compatible smart design. The feedback signal techniques have been investigated to synchronize the generated output pulse signal and the transmitted RF signal, which has an auto-correction frequency using PWM technique. This offers high frequency stability at the implant device and constant level DC voltage from the received wireless power, where the carrier signal maintains a constant. Practically, the class F-PA has delivered higher power than class E-PA; our measurements results in chapter 3 have illustrated the comparison between both amplifiers. The second test measurements were evaluated for transmission data over inductive link, and the results have been presented for the carrier frequency of MHz, whilst the measured data rates were tested at 1.5, 2 Mbps for the BPSK modulator and up to 3 Mbps for the QPSK modulator. However, the main advantages of this design are to create a high data rate, which reduces communication time between the reader and the implant, and improves the diagnostic time in real time communication at high speed. The PWM is widely used in new modern control techniques by using microcontrollers. 181

196 Chapter 5 Summary of the System Design and management In new applications, it may be programmed by VHDL code using Field Programmable Gate Arrays (FPGA), which generate a PWM signal. Consequently, the whole project has been synthesized in VHDL to reduce the hardware circuit complexity and consume less power; in addition, it can be reconfigured. The results are summariesed in Table (5.2) and show the comparison between two methods for monitoring the RF frequency or monitoring frequency control (MFC) with Class E power amplifier. The measurement was performed without modulated data for accurate measurement; in this case, we choose the distance at 3cm. The second measurements have been performed for the Class F power amplifier, which compared the methods for MFC as shown in Ttable (5.3). Generally, the PLL-VCO can be converted to purely digital design for use in Field Programmable Gate Arrays that design most of the project in the same chip. Obviously, from the Tables the second method using PWM technique offers better performance stability for transmitting RF power than using the VCO-PLL. Frequency Control System Carrier Frequency Stability ( f ) o Power Efficiency % Transmitted Power At TX coil Rx-Power in dbm At 3cm VCO-PLL KHz ±1.4% % 365Vpp 17.7 dbm VHDL (A) 131.1KHz ±1.3% % 397Vpp 14.4 dbm Table (5.3) the comparison measurement results for our different frequency controller for Class F Frequency Control System Carrier Frequency Stability ( f o ) Power Efficiency % Transmitted Power At TX coil Rx-Power in dbm At 3cm VCO-PLL KHz ±1.4% % 397Vpp 29.5 dbm VHDL (A) KHz ±1.0% % 397Vpp 30.7 dbm Table (5.2) the comparison measurement results for our different frequency controller for Class E 182

197 Chapter 6 Conclusion of Thesis Results and Future Work

198 Chapter 6 Thesis Conclusion This thesis has presented an investigation of wireless inductive coupling for transmitting a high data rate telemetry signal in biodevice applications. The proposed system has been built in hardware and combined with software, which used VHDL (IEEE standard), as a hardware structure description language which can offer digital synthesis and the flexibility to re-configure and upgrade the system. The proposed new VHDL digital modulator for electronic medical devices applications may be used for many biomedical devices such as wireless pacemaker and wireless brain implant device. Presented in this work are most of the biomedical applications, the modulation techniques and transmission coding methods over wireless inductive coupling links. Attempts are made to simplify the mathematical analysis and hardware circuits. Previously, each chapter has been concluded individually, however the whole thesis is summarised in this chapter. The conclusion of the thesis can be classified in to two sections as: 6.1 Down-Up-Link system In this thesis, different types of modulation schemes are considered for down link communication from the reader system toward the implant device. Many factors are found to affect the design, such as coil misalignment, simplicity of design, coil specifications and limitations on frequency and power. Most of the published works in this area used the ASK modulation method which is simple to implement for a modulator or demodulator, typically over an inductive coupling link. However, the technologies for inductive coupling and the data acquisition from the body are still under investigation by many researchers, dedicated to the problem of increasing the data rate over the inductive coupling link from the implant device. Consequentially, work is needed to improve the communication distance between the readers and implant coils and reduce the implant size. The second chapter has covered most of the studied cases and the published work on the biomedical applications area. It described most of the growth disorders and ailments of the human body such as; epilepsy, paralysis, Parkinson diseases, and nervous system disorders. PhDthesis

199 Thesis conclusion and future work Chapter 6 Predominantly, these are results of malfunction of the human body or may be due to physical failure or damage to the organ functions; such as in the heart, kidney and brain. However, most of these give rise to signals, which can be recorded, monitored or captured from the human body for diagnostic and monitoring purposes. The third chapter has covered the inductive coupling link, which is the main target of this work, for transmitting the RF power from the reader unit and the command or telemetry data in both directions. The wireless topology offers advantages over other techniques including a reduced infection risk, providing a safe solution for the patient, and improved mobility. A substantial number and wide range of papers published in this area have reported studies and investigations of the magnetic inductive coupling. In practice, the most critically important element in this design is how to choose the inductance value of coils for the optimum coupling with appropriate coil size design for medical purposes. The best inductance for the reader coil, was simulated and measured to determine the optimum coupling between coils between the values (425~650µH). The lab measurements provided comparisons with a differently designed inductor coil which was a loop antenna instead of spiral design for the RF power coil at inductance value ~ 450µH. The disadvantages of spiral coils are the spreading and distribution of the magnetic flux and reduction of the communication distance. On the other hand, the flat spiral coil was appropriate for the implant part, which harvests the magnetic field more efficiently than other coils such as loop or circular coils. The maximum transmitter power was measured at 3 Watts at reader amplifier output and the wireless received power was 0.15 Watts at the implant device. UHF technology was investigated since it could be useful for high transmission rates, though many factors such as interference, circuit size, safety regulation limits (SAR), and oscillator design are disadvantages for biodevices applications when working at such high frequencies. This is discussed in chapter three in detail. The biodevice system which has been designed and developed here can be used for various implant applications. In the second chapter the basic principles of analogue and digital modulation categories that are commonly used for wireless applications are described. The target scheme here is Quadrature digital modulation for generating n-psk. Typically, the digital schemes used for biomedical devices are more reliable than the analogue modulation. PhDthesis

200 Thesis conclusion and future work Chapter 6 A practical solution approach was introduced for the biodevice applications, which used new simple synthesised direct digital modulators (n-psk) to increase the data rate. The digital modulators (BPSK, QPSK and 8PSK models) have been designed and simulated in the MATLAB/Simulink environment, and have been successfully synthesised with VHDL programming code. The experimental measurements were presented at carrier frequency MHz and the data rate has been evaluated up to ~ 3 Mbps. In practice, this presented a better performance with high data rate over wireless inductive coupling. The output of the multiplexer produced a BPSK or QPSK digital (square) signal waveform, however the digital signal cannot be transmitted directly without filtering for harmonics separation. A passive filter was used for removing the harmonics from the digital modulated signal. This was designed and simulated to determine the optimum passive filter design in the implant device. The simulation results show better BPF performance for selection of the Chebyshev I & II types, compared to the others tested. On the other hand the Butterworth LPF type gives optimum performance. Digital filters were considered, however, the disadvantage of using the digital filter is that it is needs higher sampling frequencies, which increased the consumption of power and the size. Furthermore, these are not considered in this work as the consumption of power is excessive in comparison to a passive filter which has zero power requirement. The prototype of the biodevice system has been developed and measurements are shown in chapter five. Summaries in this chapter of the evaluations of lab measurements for the system have explained the results in detail and displayed the technical performance of the new modulator for biomedical applications. This technique can offer a high transfer data rate from the implant device, which requires a higher rate for the up-link digitized electrode signals where there is a need to measure in real time. The clinical demand for acquisition data that is returned from the body is increasing and requires an efficient modulator to achieve high transfer rate and low power consumption to read the signals from the electrodes. In addition, significant improvement has been made in this work with the design of the RF power transmitter by synthesizing a hybrid power amplifier for improving the power efficiency of the wireless coupling link. This generates a constant transmitted RF magnetic field, by using a feedback topology for auto-control of the coupling system. PhDthesis

201 Thesis conclusion and future work Chapter 6 In addition, it offers a constant DC voltage at the implant device. Three different methods have been investigated for the stability control of the transmitter RF power using PWM techniques. Finally, the control feedback system was synthesized by programming VHDL code, which is very appropriate for this work, reducing the hardware and providing robust design. The results demonstrate that using the FPGA provides an advantage over other methods. 6.2 Suggestions for Future Work At the end of the PhD activity, here is a brief wrap-up of many goals accomplished. The main contribution of this work is to advance the state of the art in biodevice telemetry applications with a new digital approach. Where the power and hardware are important in biodevice circuits design, several different enhanced topologies have been synthesized for medical purposes. However, the advantage of the work is that it may be a basis for wireless communication modulation, used to convey high data rate signals. The need for such information transmission is increasing in hospitals. It is called BIOSTEC which includes Bio-signals, Bio-medical devices, and Bio-health. Design of an economical wireless telemetry system that is interfaced with the medical devices and network, via appropriate adapters such as PCs or mobile phones, could give to the patient the flexibility to use the devices in a portable unit. However, there are many researchers still investigating the human body and trying to understand and analyze prosthesis performance and disease effects, by using diagnostic or monitoring signals. For example, the EEG and EMG are involved in understanding the electrical brain activity with nervous system behavior, where the human body has a complex behavior to understand. Potentially, processing of these signals within implant circuitry using modern electronics could aid treatment for patients and help to improve their lives. Finally, the future goal still exists to further investigate the optimization of the implant coil to improve the received power and increase the performance efficiency of the system. The objective of this work is the adoption of a new VCO structure, suitable as clock source for a direct digital modulator for a CPLD modulator in an ISM unlicensed frequency UHF band (nominally 402~ 405 MHz). Potentially this can be achieved by using the VCO in an upconverter to produce the transmitted RF signal. That addition would move the design towards a complete implant design with almost all functionality combined in a single digital integrated circuit. PhDthesis

202 List of Abbreviations and Symbols A B C D A B C D E F G H I J K L M N O P Q R S T U V W X Y Z A C Alternating Current ADC Advanced Design System ASK Amplitude Shift Keying ADS Advanced Digital System AM Amplitude Modulation AWGN Adding White Gaussian to Signal AMI Alternate Mark Inversion α Attenuation B Magnetic flux density BW Band width BER Bite Error Rate BPSK Binary Phase Shift keying BFPK Binary Frequency Shift Keying BPF Band Pass Filter BALUN Balance /Unbalance BJT Bipolar Junction Transistor BIOSTEC Biomedical Signals Telecommunication COMS Complementary Metal oxide Semiconductor CIC Cascaded Integrator Comb CW Carrier Wave CPU Central Process Unit CCD Charge Coupling Device CID Complete Implant Device CPLD Ccomplex Programmable Logic Device CRCC Complementary Redundancy Circuit CLC Control Logic Circuit CCITT Committee Consulting International Telephony CE-PA Class E Power Amplifier CF-PA Class F Power Amplifier CPS Circuit Position System DEPSK Differential Encode Phase Shift Keying DDM Direct Digital Modulation DPS Digital Phase Shift DDS Direct Digital Synthesizer DC Direct Current DPWM Direct Pulse Width Modulation DPIM Digital Pulse Position DPP Digital Pulse Inverter Modulation DPWM Digital Pulse Width Modulation DPIWM Digital Pulse Inverter Width Modulation DPPM Digital Pulse Position Modulation 187

203 E F G H I J K DLL DAC EKG EMG EGG EOG ECG EFS EMI EEG EMF EEPROM η FSK FCC FS FM FET FPGA FDM FFT GND GMSK GFSK HPA HDR I IC IEEE ISM ISI ITU-R IF ISP IET JTAG JAM-STAPL KVL K List of Abbreviations and Symbols Digital Local Loop Digital to Analogue Converter Electrocardiogram Electromyography Electroencephalograph Electrooculography Electrocardiograph Electrical Field Strength Electromagnetic Interface Electroencephalography Electromagnetic Force Electrically Erasable Program Read-Only Memory Efficiency Frequency shift keying Federal communication commission Frequency Synthesizer Frequency Modulation Field Effect Transistor Filed Programming Gate Array Full Digital Modulator Fourier Frequency Transfer Ground Gaussian Minimum Shift Keying Gaussian Frequency Shift Keying Hybrid Power Amplifier High Data Rate In-phase Integrated Circuit Institute of electrical and electronics engineers Industrial standard medical Inter symbol Interference International Telecommunication Union -Radio Intermediate Frequency In system programmability Institute of Electrical Technology Joint Test Access Group JAM-Standard Test and Programming Language Kirchhoff Voltage Low Coupling coefficient 188

204 L M N O P LC LSB LPF LO LNA LED L λ Inductance and Capacitance Low Side Band Low Pass Filter Local Oscillator Line Noise Amplifier Light Emitting Diode Inductance Lambda List of Abbreviations and Symbols M Mutual Coupling MOSFET Metal Oxide Semiconductor Field Effect Transistor MUX Multiplexer MCF Monitoring Frequency Control MSK Minimum Shift Keying µ Permeability Φ Magnetic Flux Nr NRZ NRZI NRZL LNF NCO NMOS OOK Ω W OPPM PA PCM PCB PSK PTL PWAM PAM PPM PWM PLL PSM PEMF PIM PSCC PPCC PN Coil reader number None Return To Zero None Return To Zero Inverted None Return To Zero Level Low noise frequency Numerically Controlled Oscillator Negitive Metal Oxide Semi Conductor On-Off Keying Ohm Omega Overlapping Pulse Position Modulation Power Amplifier Pulse Code Modulation Printed Board Circuit Phase Shift Keying Pass Transistor Logic Pulse width amplitude modulation Pulse Amplitude Modulation Pulse Position Modulation Pulse Width Modulation Phase Looked Loop Pulse Shape Modulation Pulse Electromagnetic Frequency Pulse Impulse Modulation Parallel to Serial Connection Circuit Parallel-to-Parallel Connection Circuit Pseudo Sequence 189

205 Standing List of Abbreviations and Symbols Q R T PC PID PIM PFM ε π Q Q QAM QPSK RFID RZ REFCLK RF R Rx RL RC TX Personal Computer Prototype Implant Device Pulse Interval Modulation Pulse Frequency Modulation Permeability Pie Quality Factor Quadrature Phase Quadrature Amplitude Modulation Quadrate Phase Shift Key Radio Frequency Indication Return To Zero Reference Clock Radio Frequency Resistance Receiver Signal Relay Rresistance Capacitor Transmitter Signal S T U SWR 1 SAR S/N SWR SSCC SPCC SBD SOG SEM SRAM SMT TWIT TTL TCK TDI TMS TDO TX UHF UEA USB Wave Ration Specify absorption rates Signal to Noise ratio Switch Regulator Serial to serial Connection Circuit Serial to Parallel Connection Circuit Silicon Titanium Schottky Diode Spin-On Glass Scanning Electron Microscope Static Random Access Memory Service Mount Technology Transcutaneous Wireless Implant Telemetry Transistor Logic Test Clock Test Data Input Test Mode Select Input Test Data Output Transmit Signal Ultra High Frequency Ultra Microelectrodes Arrays Upper Side Band 190

206 List of Abbreviations and Symbols V W Z VSWR VHDL VCO VR VM W W WCP WSE ω Z Voltage Standing Wave Ratio Very High Design Language Voltage Control Oscillator Variable Resistance Voltage Multiplier Width Watts Wireless Coupling Power Wireless Capsule Endoscope Regular Frequency Impedance 191

207 REFERENCES Books [1] Klaus. Finkenzeller. Fundamentals and Application in Contact Less Smart Cards Identification 2 nd Edition. (1999) () [2] Noel M.Morris, Frank W.Senior Electric Circuits Pp () [3] R.C.Dorf, James A.Svoboda Introduction to Electric Circuits Pp () [4] David E.Johnson, John L.Hilburn, Johnny R.Johnson, Peter D.Scott Basic Electric Circuit Analysis Pp () [5] S.A.BOCTOR Electric Circuit Analysis Pp () [6] IRVING L.KOSOW Circuit Analysis Pp () [7] JOHN BIRD, FIMA Electrical Circuit Theory and Technology Pp () [8] D.R.Sunninghm, J.A.Stuller Circuit Analysis Pp () [9] GRAHAM WADE Coding Techniques Pp 2~43. () [10] TAUB SCHILLING Principle of Communication System. Pp 249~298 () [11] FOLYD,BUCHLA Basic Operational Amplifier and Linear Integrated Circuit () [12] Paul.Young, P.E Electrical Communication Techniques Pp 312~515. () [13] Bob Zeidman Designing with FPGAs CPLDs. () [14] Walt.Jung Op Amp Applications Handbook Pp Analogue Devices. () [15] Gary M. Miller Modern Electronic Communication Pp 328~371 () [16] Oger Lipsett, Carl Schaefer, Cary Ussery VHDL Hardware Description and design [17] Volnei A.Pedroni Circuit Design with VHDL. Pp () [18] Peter J.Ashenden, Jim.Lewis VHDL-2008 Just the New stuff. () [19] James R.Armstrong F.Gail Gray Structure Logic Design with VHDL. () [20] Chartrand Advanced digital system experiment and concepts with CPLD. () [21] E.da Silva High Frequency and Microwave engineering Pp 320~420 () [22] S.C.Bloch Excel for Engineering and Scientists Pp () [23] Jouko Vankka, Kari Halonen Direct Digital synthesizers Theory, Design and applications Pp () [24] Douglas.L.Perry VHDL Programming by Example Pp () () Book, ( ) Journal paper, ( ) Conference paper, ( ) Thesis, () Internet source 192

208 REFERENCES [25] Oger Lipsett, Carl Schaefer, Cary Usury VHDL Hardware Description and design Pp () [26] Thomas. Krauss, Loren Shure, John.little Signal processing Toolbox Pp 74~221 () [27] T.S.Rappaport Wireless Communications Principles and Practices 2 nd Pp 294 ~ 304. () [28] SYED A.NASAR 3000 solver problems in Electronic Circuit Pp () [29] Ian Hunter Theory and design of microwave filters Pp () [30] I.A.Glover, S.R.Pennock, P.R.Shepherd Microwave devices, circuits and subsystems for communication engineering Pp () [31] Volnnei A.Pedroni Circuit Design with VHDL.2007 Pp () [32] Theodore S.Rappaport Wireless Communications Principles ands Practices Pp 294~304 2 nd () [33] Alan C. Dixon, James L.Antonakos A practical Approach to Digital Electronics Pp () [34] Thomas. Krauss, Loren Shure, John.little Signal processing Toolbox Pp 74~221 () [35] P.Alan SiuKie ECE1352F Analogue Integrated Circuits I RF Power Amplifiers Pp 3-22 () [36] E.TAIT Theory and Design of Electric circuits Pp () [37] Edmund.Lai Practical Digital Signal processing for engineering and Technicians 2003 Pp [ISBN ] (). [38] Nazzareno. Rossetti Managing Power Electronics VLSI AND DSP Driven Computer Systems [ISBN () [39] RICHARD.HABERMAN Elementary Applied Partial Differential Equations With Fourier Series and Boundary Value Problems [ISBN ].1987 Pp () [40] Stevven.T.Karris Signals and Systems with MATLAB computing and simulink Modelling [ISBN-10: ] Pp() [41] MIKHAIL.CHERNIAKOV An introduction to Parametric Digital Filters and - Oscillators. [ISBN X].2003() [42] SAMIR.PALNITKAR Verilog-HDL A guide To Digital Design and snthesise 1996 Pp. () () Book, ( ) Journal paper, ( ) Conference paper, ( ) Thesis, () Internet source 193

209 REFERENCES Conferences Papers [43] K.Inoue, K.Shiba, E.shu, K.Koshiji, K.Tsukahara, T.Ohumi Transcutaneous optical Telemetry System Investigation on deviation characteristics"19 t.h..ieee/embs 1997( ) [44] Chad A.bossetti, Jose Marmena, Miguel A.L.Nicolelis, Patrick D.Wolf Transmission Latencies in Telemetry linked Brain machine interface IEEE transactions on Biomedical Engineering. Vol,No,2, 2007, ( ) [45] Q.Huang, M.Oberle"A0.5mW Passive Telemetry IC for Biomedical Application. ( ) [46] R.Harrison, P.Watkins, R.Kier, R.Lovejoy, D.Black, R.Normann, F.solzacher "A low Power Integrated Circuit for a wireless 100 electrode neural recording system ". ( ) [47] P.Irazoqui, I. Mpdy, J. Judy In vivo EEG recording using a wireless implantable Neural Transceiver 1 st IEEE/EMBS, 20-22March-2003 ( ) [48] A.Dehennis, K.wise A passive telemetry based pressure sensing system. ( ) [49] P.D.Bradley Implantable ultra low-power radio chip facilitates in body communications ( ) [50] S.Atluri, M.Ghovanloo Digital of wideband power efficiency inductive wireless link for Implantable biomedical using multiple carriers Internal conference EMBS on neural Engineering.2005 IEEE ( ) [51] Z.Luo, S.Sonkusale A Novel Low Power BPSK Demodulator.2007 IEEE ( ) [52] J.Craninckx, M.Steyaet A 1.8GHz Low Phase Noise Spiral LC CMOS VCO Symposium on VLSI circuit digests of technical Papers 1996 IEEE ( ) [53] C.Ziomek, P.Corredoura Digital I/Q Demodulator Stanford, CA 94309, USA ( ) [54] A.El-Gabaly, B.Jackson, C.Saavedra An L-band Direct Digital QPSK Modulation in CMOS 2007 IEEE ( ) [55] He.Jin,He.Song.Ben Design and Realization on NCO of modulator based on FPGA IEEE, communication Circuit and system ICCCAS july.2007, pp ( ) [56] S.H.Wang, J.Gil, I.H.Kwon, H.Ku Ahn A 5-GHz Band I/Q Clock Generator using a self- Calibration Technique ESSCIRC2002 ( ) () Book, ( ) Journal paper, ( ) Conference paper, ( ) Thesis, () Internet source 194

210 REFERENCES [57] M.Baru,H. Valdenegro,C.Rossi,F. Silveira An ASK Demodulation in CMOS Technology ( ). [58] S.Erik, B.Flaten Design of a 1.6-mW LC tuned VCO for 2.4GHz applications in 0.18um RF CMOS Technology ( ) [59] S.Jeon, S.Jung, D.Lee, H.Lee A Fully Integrated COMS LC VCO and Frequency Divider for UHF RFID Reader 2006 IEEE. ( ) [60] A. Tan,C.E.Saavedra A Binary Phase Shift keying Demodulator using pulse Detection 1 st International Conference 2004 IEEE ( ) [61] A.J.Yousf, M.Ismail CMOS Direct Quadrature Modulator for W-CDMA Transmitter Application APCC.VOL.pp /2003.IEEE ( ) [62] F.Baez, J.Duster, K.Kornegay A low power 60dB control range programmable gain amplifier in signal technology IASTED conference 2004 USA.( ) [63] You.Zheng, C.Saavedra Coherent BPSK Demodulator MMIC Using an Anti-parallel Synchronization Loop RFIC- Symposium, IEEE.2007 ( ) [64] J.Sommarek, J.Vankka, J.Ketola, I.Teikari, K.Halonen A digital Quadrature Modulator with on chip D/A converter ESSDERC. 28. Nov.2002 ( ). [65] J.Cho,K.W.Min,S.Kim AN ASK Modulator and Antenna Driver for 13,56MHzRFID Readers and NFC Devices IEICE transaction. Communication, Vol.E89-B, No.2.February [66] G.C Cardailli, A.Del.Re, N.Re Optimized QPSK Modulation for DVB-S Applications ISCAS 2006 IEEE ( ) [67] T.Buchegger, G.Ossberger An Ultra Low Power Transcutaneous Pulse Radio Link for Cochlear Implants IEEE- IWUWBS.PP / 2004 ( ) [68] Harb.A,Sawan.M Low Power Comos implantable nerve signal analogue processing circuit 2000 IEEE [69] Ahmed.ElG,C.E.Savedra A Compact Tuneable 5 GHz-Band Quadrature Down converter with an integrated 90 Phase Shifter and Balun. URSI, August 2008 ( ) [70] Hugh,Mcdermott An advanced Multi Channel Cochlear Implant IEEE ( ) () Book, ( ) Journal paper, ( ) Conference paper, ( ) Thesis, () Internet source 195

211 REFERENCES [71] F.Ellinger, R.Vigt, W.Bachtold Ultra Low Power, Low Noise GaAs Up-Converter MMIC for a Broadband Super heterodyne L Band Receiver. IEEE GaAs Digest 2000 [72] F.Gustrau, S.Goltz, S.Eggert Active Medical Implants and Occupation Safety Measurements and Numerical Calculation of Interlace Voltage. [73] C.J.Kikkert, C.Blackburn Digitally Demodulating Binary Phase Shift Keyed Data Signals ICICS99-07.DEC.1999 ( ) [74] P.Balasubramanian, P. M.Aravindakshan, K.Parameswaran,V. K. Agrawal A simple scheme for PSK Demodulation Elsevier B.V, 2003 ( ) [75] P.I.Pastor, I.Mody,J.W.Judy Transcutaneous RF Powered Neural Recording device ( ) [76] R.Lewitt, S.Matej Overview of Methods for Image Reconstruction from Projection in Emission Computed Tomography. IEEE.Vol.91.No.10.OCTOBER.2003 [77] M.Tiebout Low Power Low Phase Noise Differentially Tuned Quadrate VCO Design in Standard COMS IEEE journal of solid state circuit VOL.36.NO.7, July 2001.IEEE [78] S.Erik, B.Flaten Design of a 1.6-mW LC tuned VCO for 2.4GHz applications in 0.18um RF CMOS technology. [79] K.Ohhata, K.Haraswa, M.Honda, K.Yamashita Design of low Noise, Lo Power 10Ghz VCO using 0.18-µmCMOS Technology IEICE TRANS.ELECTON.VOL.E89- FEBRUARY [80] J.Craninckx, M.Steyaet A 1.8GHz Low Phase Noise Spiral LC CMOS VCO Symposium on VLSI circuit digest of technical Papers 1996 IEEE [81] Analog Devices,Ins A Technical Tutorial on Digital Signal Synthesis 1999 [82] G.Ben. Hmida,M.dhieb,H.Gharinai,M.Samet Transcutaneous power and High data Rata Transmission for Biomedical Implantable IEEE ( ) [83] J.Goncalves,J.R.Fernandes,M.M.Silva A Reconfigurable Quadrature Oscillator Based on a Direct Digital Synthesis System DCIS 2006( ) [84] O.Tsakiridis,E.Zervas,D.Syvridis,M.Tsilis,J.Stonham Design of a Differential Chaotic coplitts oscillator IEEE.2004 ( ) () Book, ( ) Journal paper, ( ) Conference paper, ( ) Thesis, () Internet source 196

212 REFERENCES [85] W.Michielsen,L.Rong,H.Tenhunen,S.Pinel,J.Laslar Design Considerations for a 2.4GHz differential Colpitts Oscillator ISCAS.May.2005,( ) [86] A.El-Gabaly, B.Jackson, C.Saavedra An L-band Direct Digital QPSK Modulation in CMOS 2007 IEEE. ( ) [87] Yi, Sun, A.P.Freundorfer, and D.Sawatzky A QPSK Direct Digital Modulator in GaAs HBT at 28GHz. CCECE/CCGEL, Saskatoom, May 2005 IEEE. ( ) [88] B.Jackson, Y.Zheng, C.E.Saavedra A COMS Direct digital BPSK Modulator Using an Active Balun and Common Gate Switches 2007 IEEE ( ) [89] Barras. D,G.Von Bueren, W.Hirt,H.Jaeckel A Multi-Modulation Low power FCC/ECcompliant IR-UWB RF Transmitter in 0.18-µm CMOS RMO1C-5 / RFIC-2009 IEEE [90] A.Webtzal, D.Pienkowski, G.Boeck Ultra High IP3 passive GaAs FET Mixers [91] T.L.Huyh, L.N.Binh, D.D.Tran,Q.Hlam Long haul ASK And DPSK optical fibre Transmission System: Simulink Modulating and Experimental Demonstration Test Beds 2005, ( ) [92] B.R.Jackson.C.E.Saavedra A COMS sub harmonic mixer with input and output active Baluns Microwave and optical technology letters/vol,48.no.12.deceamber 2006 [93] F.Kocer,P.M.Walsh,M.P.Flynn An RF power wireless temperature sensor in Quarter Micron CMOS 2002, ( ) [94] K.Mithat, C.Dehollain, M.Declercq Improvement of Power Efficiency of Inductive Link for Implantable Devices IEEE.PRIME.25.April.2008, ( ) [95] S.Krishnan QPSK,OQPSK,CPM probability of error for AWGN and Flat Fading Channels ( ) [96] N.Chaimanonart,M.A.Suster,W.H.Ko,D.J.Young Two-Channel Data Telemetry with Remote RF Powering for High Performance Wireless MEMS Strain Sensing Applications IEEE.30.October-2005, ( ) [97] A.El-gabbaly,C.E.Saavedra A Low voltage Fully Integrated 5GHz Low Noise Amplifier in 0.18um COMS, ( ) [98] J.S.Ruque, D.I.Ruiz, C.E.Carrion Simulation and Implementation of the BPSK modulation on a FPGA Xilinx Spartan 3xcs200-4ftp256,using Simulink and the system generator block set for DSP/FPGA, ( ) [99] C.J.Kikkert, C.Blackburn Digitally Demodulator Binary Phase Shift Keying Data Signals 2 nd ICICS99.07.Dec.1999 ( ) [100] G.Ben.Hmida, M.dhieb, H.Gharinai, M.Samet Design of Wireless Power Transmission circuits for Implantable Bio-micro system Asian Network for Scientific Information 2007 ( ) [101] Z.Lu, M.Sawan An 8Mbps Data Rate Transmission by Inductive link Dedicated to Implantable Devices ISCAS.IEEE.2008, ( ) () Book, ( ) Journal paper, ( ) Conference paper, ( ) Thesis, () Internet source 197

213 REFERENCES [102] S.Sonkusale, Z.Luo A Complete Data and Power Telemetry System Utilizing BPSK and LSK Signalling for Biomedical Implants IEEE.30 th EMBS.August ( ) [103] H.L.Chan, K.W.E.Cheng, D.Sutanto A Simplified Neumann s Formula for Calculation of Inductance of Spiral Coil Power electronics and variable speed Devices, 18-19September 2000 IEE. [104] Mo\1.B.Hugo,C.Rossi,F.Silveire AN ASK Demodulator in COMS Technology 2008, ( ) [105] A.Bonfanti, T.Borghi, R.Gusmeroli, G.Zambra, A.Oliyink, L.Fadiga, A.S.Sipnelli, G.Baranauskas. A low Power Integrated Circuit for Analogue Spike Detection and Sorting in Neural Prosthesis Systems IEEE.2008( ) [106] S.Jeon,S.Jung,D.Lee,H.Lee A Fully Integrated CMOS LC-VCO and Frequency Divider for UHF RFID Reader.IEEE.2006 [107] A.Dehennis, K.D.Wise A Double Side single Chip wireless pressure sensor. IEEE, 2002 [108] C.Sauer,M.Stanacevic,G.Cauwenberghs,N.Thakor Power Harvesting and Telemetry in COMS for Implant Devices 2005 [109] F.Naghmouchi,M.Ghorbel,A.ben.Hamida,M.Samet COMS ASK system modulation dedicated to cochlear prosthesis IEEE [110] P.Balsubramanian,P.MAravindakshan,K.Parameswaran,V.K.Agrawal A simple Scheme for PSK Demodulation 03.October.2003, ( ) [111] E.Normark,Lei.Yang,C.Wakayama,P.Nikitn,R.Shi VHDL-AMS Behavioural Modelling and Simulation of a pi/4 DQPSK Transceiver System IEEE Oct.2004 [112] L.Wu, Z.Yang, E. Basham, W.Liu An Efficient Wireless Power Link for Voltage Retinal Implant IEEE ( ) [113] Diemouai, Sawan, M Integrated ASK demodulator dedicated to implantable electronic devices IEEE.Volume 1, Pp PP December ( ) [114] P.L, S.R,M.M Slow rhythms of EEG IEEE.Volum 3,31Oct-3Nov.1996 Pp 1005~1006 ( ) [115] K.M.Abramski, H.Trzaska FM EMF SENSORS IEEE.3 rd International conference Symposium Pp May.2002 ( ) [116] S.Zeng,J.R.Powers,L.Jackson,D.L.Conver Digital Measurements of Human Proximity to Electrical Power Circuit by a Novel Amplitude-Shift-Keying Radio Frequency Receiver IEEE.2005 [117] L.H.Jung, P.Byrnes, R.Helessler, T.Lehmann, G.J.Suaning.N.H.Lovell A Dual Band Wireless Power and FSK Data Telemetry for Biomedical Implants IEEE. Proceeding of the 29 th 2007 () Book, ( ) Journal paper, ( ) Conference paper, ( ) Thesis, () Internet source 198

214 REFERENCES [118] You.Zheng, C.Saavedra A BPSK Demodulator Circuit Using an Anti-parallel Synchronization Loop IEEE May.2005,Vol. 6, Pp ( ) [119] P.Nikitn, E.Normark, C.Wakayama,,R.Shi VHDL-AMS Modelling and Simulation of a BPSK Transceiver System IEEE Oct.2005 [120] CH.Qiao,J.Zhang Control of Boost type Converter in Discontinuous Conduction Mode by Controlling the Produce of Inductor voltage Second Recife,Brazil-PESC-2005 [121] G.D.Horler, S.JHindle, D.McGorman Inductively Coupled Telemetry and Actuation IEE. April [122] A.Tekin, M.R.Yuce, W.Liu "A low Power MICS Band Transceiver Architecture for Implantable Devices "IEEE.WAMICON,2005 ( ) [123] Y.Zheng, C.E.Saavedra "A 0-to 180 Variable Phase Shifter using Frequency Multiplication"1 st International Conference on EEengineering. IEEE.,2004 ( ) [124] Y.Zheng, C.E.Saavedra" Pulse Width Modulator Using a Phase-Locked Loop Variable Phase Shifter "ISCAS.IEEE May.2005 ( ) [125] J.P.Carmo, P.M.Mendes.C.Couto, J.H.Correia" Low-power low-voltage RF COMS transceiver at 2.4GHz" 5 th telecommunication conference.potougal, 5-6.April ( ) [126] Meng-Lin.Hsia, Yu-Sheng.Tsai, Oscal,T-C.Chen " An UHF Passive RFID Transponder Using A low Power Clock Generate without Passive Components" MWSCAS, 6-9.Aug ( ) [127] Hiu.Y.Lo, Pui.Y.Or, Ka.N.Leung, L.K.Leung, C.S.Choy, K.P.Pun" Design Challenges of Voltage Multiplier in a 0.35-um 2-Poly 4-Metal CMOS Technology for RFID passive Tags" IEEE ( ) [128] B.Emmanuel,J.Gaubert,P.Pannier,J-M.Gaultier" Conception of UHF voltage multiplier for RFID circuit" IEEE ( ) [129] S.Deng,Y.Hu,M.Sawan A high Data Rate QPSK Demodulator for Inductively Powered Electrnics Implants ISCAS EEE ( ) [130] Em.Bergeret, J.Gaubert,P.Pannier" Standard COMS voltage multipliers architectures for UHF RFID applications: study and implementation" international conference in RFID March IEEE ( ) [131] Gihad. Elamary, Graeme. Chester, Jeff. Neasham Experimental Digital BPSK Modulator Design with VHDL Code for Biodevices Applications ( ) BIOSTEC. Porto-Portugal, 14/ IEEE ( ) [132] Gihad. Elamary, Graeme. Chester, Jeff. Neasham A Simple Digital VHDL QPSK Modulator Designed Using CPLD/FPGAs for Biomedical Devices Applications, WCE. (ICEEE-67). London-UK 1-3.July.2009 [133] Uri.M.Jow, M.Ghovanloo Design and Optimization of Printed Spiral coils for Efficient Inductive Power Transmission IEEE ( ) () Book, ( ) Journal paper, ( ) Conference paper, ( ) Thesis, () Internet source 199

215 REFERENCES [134] El.Ebiary, Dessoulky, M.A, El.Ghitani.H Behavioural modelling of a charge pump voltage convertor for Soc function purposes Workshop IEEE.BMAS ( ) [135] Oi.Ying.Wong, W.Shan.Tam,Chi.Wah.Kok,H.Wong Area efficiency 2 x switch capacitor charge pump IEEE -ISCAS.2009 ( ) [136] Bin. Liang, Zhi.Yang,Wentai.Liu An ASK Demodulator for Data Telemetry in Biomedical Application 31 st IEEE,EMBS.2-6/09/2009 [137] Ming.Yin, M.Ghovanloo A Widened PWM-FSK Receiver for Wireless Implantable Neural Receding Applications IEEE-ISCAS.18-21/05/2008 [138] Hu.Jianyun, He.Yan,Min.Hao High Efficient Rectifier Circuit Eliminating Threshold Voltage Drop for RFID Transponders 24-28/03/2008 [139] Akram, G.; Jasmy, Y.; Specific Absorption Rate (SAR) on the Human Head as Function of Orientation of Plane Wave Radiation: FDTD-Based Analysis IEEE- Modelling &simulation-aicms,2008 Journal Papers [140] M.Sawan, Y.Hu, J.Coulombe Wireless Smart Implants Dedicated to Multichannel Monitoring and Micro stimulation.ieee Circuit and System magazine.2005, ( ) [141] Z.Tang, B.Smith, J.H.Schild, H.Peckham Data Transmission from an Implantable Biotelemetry byload shift keying Using circuit Configuration Modulator IEEE TRNSACTION ON BIOMDEICAL ENGINEERING.VOL, 42, NO, 5, MAY, 1995( ) [142] R.H.Olsson,K.D.Wise A Three-Dimensional Neural Recording Microsystems With Implantable Data Compression Circuitry journal of solid state circuits, VOL, 40, No.12.Dec IEEE ( ) [143] M.A.Stuchly, S.S.Stuchly Industrial, scientific, medical and domestic applications of Microwaves IET, Vol, 130, Issue8, November1983.pp ( ) [144] Philipos C.Loizou Mimicking the Human Ear signal processing magazine IEEE ( ) [145] N.O.Sokal and A.D.Sokal, Class-E a new class of high efficiency tuned single- ended Switching power amplifiers. Journal of Solid-state circuit, Vo.10, pp , Jun IEEE ( ) [146] T.Suetsugu, M.K.Kazimierczuk, Analysis and Design of Class E Amplifier with Shunt Capacitance composed of nonlinear and Linear Capacitances. IEEE Transactions on Circuits and systems, Vol. 51, No. 7, July 2004 IEEE ( ) [147] K.Ohhata, K Haraswa, M Honda, K.Yamashita Design of Low Noise power 10GHz VCO Using 0.18um COMES Technology TRANS.ELECTRON.VOL.E89-C, NO.2 FEB IEEE ( ) () Book, ( ) Journal paper, ( ) Conference paper, ( ) Thesis, () Internet source 200

216 REFERENCES [148] C.M.Zierhofer,I.j.Hochmair,E.S.Hochmair Electronic Design of a Cochlear Implantant for Multi-channel High Rate Pulsatle Stimulation Strategies IEEE,Transction on Rehabilitation engineering,vol,3,no,1.march ( ) [149] J.Kim,Y.Samii Implanted antenna Inside a Humane Body: simulation,design and Characterizations.IEEE Transaction on microwave Theory and Techniques, Vol.52.No.August.2004, ( ) [150] K.D,Wise,D.J.Anderson,J.F.Hetke,D.R.Kipke,K.Najafi Wireless Implantable Microsystems: High Density Electronic Interfaces to the Nervous System Proceeding of the IEEE,Vol,92,No.1.january 2004, ( ) [151] R.H.Olsson, Kensall.D.Wise A three- Dimensional Neural Recording Micro system with Implantable Data Compression Circuitry. IEEE journal of solid state circuits Vol.40,No.12, December 2005, ( ) [152] S.L.Jang,Y.H.Chuang,S.H.Lee,L./R.Chi.C.F.Lee An Integrated 5-2.5GHz Direct Injection Locked Quadrature LC-VCO IEEE.MWC.Letter.Vol.17.NO.2,February.2007, ( ) [153] P.t.theilmann,P.M.Asdeck An Analytical Model for Inductively Coupled Implantable Biomedical Devices with ferrite Rods IEEE transaction on biomedical circuit and systems, Vol.3.No.1.February.2009, ( ) [154] R.Kosaka, Y.Sankai, TJikuya, T.Yamane,T.Tsutsui "Tsukuba Remote Monitoring System for Continuous-Flow Artificial Heart", Journal of Artificial Organs27 (10), ,2003, ( ) [155] C.kuo, J.chen, C.chung, C.cheng, C.wang An implantable bi-directional wireless Transmission system for Transcutaneous biological signal recording Physiol.Meas.26 (2005). ( ) [156] K.Rao, P.nikitn, and S.Lam Antenna design for UHF RFID tags: Review and practical Application IEEE transactions antenna and propagation, VOL, 53, No.12, December2005 ( ) [157] Ma.Guanying, Yan Guozheng and HeXiu Power transmission for gastrointestinal Microsystems Using inductive coupling.iop.2007 ( ) [158] T.J.Lee,C.L.Lee,Y.J.Chiou,C.C.Huang,C.CWang All-MOS ASK Demodulator for Low Frequency Application IEEE.Transction on circuit and system,vol.55.no.5.may.2008, ( ) [159] Q.Chen,S.C.Wong,C.K.Tse,X.Ruan An analysis, Design and Control of a transcutaneous Power Regulator for Artificial Hearts IEEE.Transction on Biomedical circuit and systems,vol,3.no.1 February 2009, ( ) () Book, ( ) Journal paper, ( ) Conference paper, ( ) Thesis, () Internet source 201

217 REFERENCES [160] M.Takahashi, K.Watanabe, F.Sato, H.Matsuki Signal Transmission System for High Frequency Magnetic Telemetry for an Artificial Heart IEEE. Transaction on magnetic, Vol.37, NO. 4,July,2001 ( ) [161] G.J.Suaning,N.H.Lovell COMS Neurostimulation ASIC with 100 Channels Scaleable Output,and Bidirectional Radio Frequency Telemetry IEEE, Transaction on Biomedical Engineering,Vol.48,No,2,February.2001 ( ) [162] I.Grout, J.Ryan, T.O.Shea. Configuration and debug of field Programmable gate arrays using MATLAB / SIMULINK. (2005) Journal of Physics, ( ) [163] M.Ghovanloo, K.Najafi A wideband Frequency-Shift Keying Wireless Link for Inductive Powered Biomedical Implants Transaction on circuit and systems.2004 IEEE ( ) [164] D.Halperin,S.S.Clark,K.Fu,TS.H.Benjamin,B.Defend,T.Kohon,B.Ransford,W.Morgan,W. H.Maisel Pacemakers and Implantable Cardiac Defibrillators Software Radio Attacks and Zero-power Defenses SP-, 18-22, May.2008 PP ( ).IEEE ( ) [165] H.Daradi,B Ibrahim, A.Rofougaran An analogue GFSK Modulator in 0.35-µm CMOS Journal of soled state circuit.vol 39,No12,December 2003 IEEE ( ) [166] M.Tiebout Low Power Low Phase Noise Differentially Tuned Quadrate VCO Design In Standard COMS IEEE journal of solid state circuit VOL.36.NO.7, July 2001.IEEE ( ) [167] Atmel TK552 Reader/Write Transponder ( ) [168] M.Sawan, Y.Hu, J.Coulombe Wireless Smart Implants Dedicated to Multichannel Monitoring and Micro stimulation.ieee Circuit and System magazine.2005 ( ) [169] M.W.Baker,R.Sarpeskar Feedback Analysis and Design of RF Power Links for Low Power Bionic Systems.IEEE-transactions on Biomedical circuits and systems,vol.1.march-2007 ( ) [170] K.Ohhata,K.Haraswa,M.Honda,K.Yamashita Design of Low Noise Power 10GHz VCO using 0.18-um COMS Technology.IEEE transctionelecton.,vol.e89-c0.2february.2006 ( ) [171] R.N.Mutagi Pseudo noise sequences for engineering electronics communication engineering journal.april.1996 ( ) [172] I.Janiszwski, B.H.Meuth Numerically controlled oscillators with Hybrid function generators IEEE transaction on ultrasonics,vol,49,no.7,july2002 ( ) [173] K.Ohhata, K.Haraswa, M.Honda, K.Yamashita Design of low Noise, Lo Power 10Ghz VCO using 0.18-µmCMOS Technology IEICE TRANS.ELECTON., VOL.E89-CNO. 2FEBRUARY2006 ( ) () Book, ( ) Journal paper, ( ) Conference paper, ( ) Thesis, () Internet source 202

218 REFERENCES [174] Hadjem, A.; Lautru, D.; Dale, C.; Man Fai Wong; Hanna, V.F.; Wiart, J.; Study of specific absorption rate (SAR) induced in two child head models and in adult heads using mobile phones IEEE Transactions on Microwave Theory and Techniques,VOL ( ) Other Thesis Sources [175] R.Zhong, R.Liu,H.Fotowat, F.Gabbiani A micro ultra low power RF radio for neural signal recording ( ) IEEE.BIODEVICE.2008 [176] G.Mykolaitis, A.Tamasevicius, S.Bumeliene, A.Bazliauskas, E.Lindberg Two stage Chaotic Colpitts for the UHF range ( ) [177] KURT.A.SANDQUIST Design of A wireless Power and data Link for Cranially Implanted Neural prosthesis Kansas State University. 2004( ) [178] W.H.Moore, D.P.Holschneider, T.K.Givrand, J.M.Maarek Transcutaneous RF Power Implantable Minipump Driven by a Class E transmitter TBME-2005 ( ) [179] K.Stangle, S.Kolnsberg, D.Hammerschmidt, B.J.Hostcka, H.K.Trieu, W.mokwa A.H.Bochnick, W.Anheier FIR filter design using Verilog and VHDL ( ) [180] XIN.HE Fully Integrated Transceiver Design in Soi Process Kansas state University 2004( ) [181] Wei.Peng A High Efficiency EER-Based Transmitter SIMON FRASER University. May.2006 ( ) [182] ALFIO.ZANCHI On The Development Of Fully integrated LC Tuned VCOs for Wireless Applications Politecnico Di Milano University.1999 ( ) [183] Viswanath.Daita Behavioural VHDL Implementation of Coherent Digital GPS Signal Receiver University of South Florida. 2004( ) [184] Timo.Kasper Embedded Security Analysis of RFID Devices Ruhr-University Bochum.2006 [185] R.Fweir, P.Troyk, Gdemichele, T.kuiken Implantable Myolectric sensors (IMES) for Upper- Extremity Prosthesis control preliminary work ( ) [186] Sunitha.Kopparthi Remote Power Delivery and Signal Amplifications For MEMS Applications B.E.Andhra University, India 2003( ) Internet Sources [187] THE PHYSICS AND CLINICAL SEARCH BEHIND ACTIPATCH () [188] Analysis of a UHF REID CMOS rectifier structure and input impedance characteristics () () Book, ( ) Journal paper, ( ) Conference paper, ( ) Thesis, () Internet source 203

219 REFERENCES [189] (Direct Digital Synthesiser)() [190] (FM ) () [191] (PLL)() [192] (ITU) () [193] (Satellite Telemetry ) () [194] (Satellite Telemetry ) () [195] (Biodevices )() [196] l (Spikes signals) () [197] ( Trigonometric) () [198] (Dynamic Power Calculation for FPGA/CPLD chips) () [199] (PCB antenna design ) () [200] PCB antenna design () [201] (modulation)() [202] (ISM frequency regulation)() [203] baseband.htmlt. (Digital Demodulation) ( [204] (DLL) () [205] (Power/JTAG) () [206] (spiral coil design ) () [207] (Agilent digital demod/e8408a VXI). () [208] (USB Blaster Altera datasheet) () [209] (PWM) () [210] (RFID Antenna) () [211] General purpose telemetry for analogue biomedical signal IEEE Engineering in medicine And biology, Nov/Dec1995() [212] energy absorption in layered biological tissues in the near and far Filed of the antenna of body mounted ETH, Switzerland () [213] ( Digital modulator / Demodualtor Agilent E8408A VXI) () [214] (Switch Regilator ) () [215] (Power Consumption) () () Books, ( ) Journal paper, ( ) Conference paper, ( ) Thesis, () Internet source 204

220 REFERENCES [216] ( Phase Locl Loop) [217] ( ASK Modulator ) [218] [219] [220] CE%20SAR_FIC_GTA02.pdf ( CE SAR Test repot ) [221] ( HEF4046) PLL [222] (Magnetic field software) [223] (Magnetic field software) () Book, ( ) Journal paper, ( ) Conference paper, ( ) Thesis, () Internet source 205

221 Appendixes Appendix A Inductive Coupling Link Appendix B Appendix C VHDL Code Extra Hardware Implementation

222 Appendix A Inductive Coupling Link Appendix - A

223 PhDThesis Appendix A 1. Synthesis and Simulation of the Reader and Implant Coils: 1.1 Preliminary design and consideration The frequency has chosen for the reader unit is in low frequency the preliminary calculation was performed with the frequencies 125kHz, 135kHz and 145kHz. The appropriate frequency is selected to be use as RF power carrier frequency for the biomedical system in this thesis. In addition, to reduce the interference and the closed frequencies for the implant frequency such as RFID system, we selected the RF carrier frequency is 135kHz. However, several strategies for select the inductance values to the reader and the implant coils are investigated. To provide better performance for the magnetic coupling between these coils; firstly, the coil calculation and the simulation to fabricate our coil, which followed these steps as; 1. Design the coils in between [60µH~950µH]. 2. Calculate the magnetic field B(x) at different distances. 3. Calculate the magnetic field B(x) with respects to reader current (I). 4. Calculate and plot the B(x) with respect to L (µh). 5. Choose the best coil with optimum magnetic field generation B(x.). 6. Choose the R-load in range [50~20k]. 7. Calculate the maximum Rx power to (RL) with respect L [µh]. 8. Choose the optimum Rx power with respect to R-load over communication distance. 9. Repeat the procedure steps with all values of coils L (µh). 10. Choose the optimum coils0 for the received RX power. The flow chart in Figure (A1.0) is demonstrated the design steps to program the MATLAB code, and how to calculate the inductance for the reader and the implant coils, that to provide the optimum performance at the chosen resonance frequency. The second design point is how to calculate the estimation power dissipation by the R load at the implant part, where load resistance is varied according to the communication distance and matching with the LC tuned circuit. However, the load resistance was change according to distance between two coils. For this condition the accurate values was chosen by measurement to provide the optimum wireless received power, this matching condition between the implant tank circuit and the load, and 206

224 PhDThesis Appendix A maximum resonance condition. The second flow chart (A1.1) is shown the programming steps design for calculate the optimum received power over distance range. The flow chart in Figure (A1.0) demonstrates the first steps for calculate the optimum diameter for the reader coil that for generates the magnetic flux at different distance in centimetre. The parameters values were chosen between 60 µh up to 950µH, and the coil diameter is in the range (3 cm~15 cm). However, the flow chart below has converted into MATLAB programming code to perform the mathematical calculation design for the optimum reader coil. The second design point is fabricate the coils, then measured them, and compared to the simulation values, the essential parameters that are calculated for the inductive link design. However, there are several design tools for calculation the inductance value approximation, to compare the accurate method with the measured one. Input N.O.T Rload Calculate L<=60, L>=950 Calculate the Magnetic at Distance <=3, >=15 If D>=15 No Yes Maximum Magnetic Power At distance (cm) Figure (A1.0) flow chart to calculate the power dissipation by the load resistance 207

225 PhDThesis Appendix A In the second simulation step, were the desired coils are terminated with the inductive coupling link, which is acting as open transformer for delivering the maximum wireless power for the implant coil. The diameter of the implant coil is critical and limited by the wire coil and the shape size. In our work, we chose the coil diameters between (2.5cm ~3.5cm), practically, the lower wire diameter provides a high internal resistance and higher inductance. The dissipation power by the load represent the maximum delivered power that can be provides from the reader coil through the magnetic wireless coupling. Input Coils (60~950) If the R-load R<=50, R>=50K Calculate the Rx power Maximum and Minimum Load power Figure (A1.1) flow chart to calculate the load power Compared to different Coils 208

226 PhDThesis 2. Biomedical Coils Design 2.1 Reader Coil Design Appendix A Several different types of coils are investigated for the reader unit. The reader coil is an important element to communication between the external world and the biodevices system. The magnetic inductive coupling is based to the transmission link between to coils, where the reader coil was synthesized with different types of shapes and wires. Those are for comparison the best coils and perform the maximum wireless transmission power coupling. Generally, the coil can be classified in three types: RF coil power and data coil or combined between these coils. However, samples of these coils are fabricated, and tested as shows in Figures (A1.2) (A1.3). Practically, sample of these coils are not suitable to provide the wireless RF power, especially the spiral coil design to the reader part, which is spread out the magnetic flux and is very weak RF power. Whilst, is a perfect a shape for in the implant part, which is harvesting most of the magnetic flux compared to other coils. We selected two types of coils; loop coil at reader and spiral coil at the implant. Loop Coil Transformer Loop Coil Loop Coils Inner and Outer Coils Spiral Coil Spiral Disc Coil Ring Coil Figure (A1.2) tested TX power coil at reader shape used in our work Figure (A1.3) the spiral coil at reader part Loop as TX coil (Not used) 209

227 PhDThesis Appendix A The simulation and the calculated designed for the perfect coil was evaluated in the measurements, over different values for the reader coils between 64 µh~963µh at the carrier frequency 135kHz. In this case, the reader coil was fixed at 933.4µH and the implant coil is changed with different values at diameter 30mm in size. The measurements results are shows in Figure (A1.4). The best coil was given at 528µH, the second measurements was performed by changed the reader coil and the fixed implant, which gives the best coil at 550µH, as shows in Figure (A1.5). Fixed Reader Coil and Incremnet the Implant Coil Power Amplitude in "Watt" 1.20E E E E E E-02 Lreader=933.4µH Limplant=953.1µH(7500-) Limplant=781µH (11.5K) Limplant=657.µuH(10K) Limplant=528µH (6500-) Limplant=450.8µH(7500-) Limplant=64µH (800-) Frequency 135KHz 0.00E+00 0cm 1cm 2cm 3cm 4cm 5cm 6cm 7cm 8cm 9cm 10cm Distance in "Cm" Figure (A1.4) Received RX power over different implant coils at fixed reader coil Figure (A1.5) Received Rx wireless power for the fixed implant Coil and changed the reader coil 210

228 PhDThesis Appendix A 2.2 An Introduction to Coils for Medical Applications To design an ideal coil as a passive telemetry system for magnetic inductive coupling link and several factors are considered to analysis and synthesis the inductors. Alternatively, the implant coil is dependants on how magnetic field can be harvested with minimum size. We described in Figure (A1.6) the most common parameters that are affected in the mathematical calculation and the coil design, which is used as passive inductive link. However, more details are illustrated in Figure (A1.7), for the spiral coil design at the implant part. The implant coil is still under investigation for a perfect design. In addition, different tools are investigated for design the magnetic coupling such as COMSOL, QUENCH [221], [222]. Coil ( Lµ H ) Diameter No.Of.Turns Wire Mutual Coupling K-coefficient Type (mm) Coil Q-factor Magnetic Field ( β ) Resistance ( Ω ) Flux (φ ) Current (I) Coil Shape Distance (cm) Figure (A1.6) Most common factor parameters for coil design Figure (A1.7) The spiral coil design for implant in our work, 30mm diameter for the Rx- wireless received power 211

229 PhDThesis Appendix A 3. Additional Investigation for Misalignment Position: Another technical solution has been investigated to solve the misalignment problem, in the near field communication. This problem is affected in the wireless received power this reduced the implant efficiency. Our proposed design used two separated identical coils, are located in the centre angles outside the body reader coils, both are transmitting the RF power at the same frequency, and received with a single implant coil. The implant coil sums the received RF signals; the amplitudes are double, Figure (A1.8) shown the basic idea for solving misalignment problem. RF-A Communication Distance RF-B Figure (A1.8) the basic idea of using two identical sources The first source is expressed in equation (1), where the second source can be expressed in equation (2) respectively. source t) = A cos( ω t + ) (1.0) 1( 1 φ1 source t) = A cos( ω t + ) (2.0) 2 ( 2 φ2 The implant-received coil was added the received magnetic fields together, which produced AC voltages. The output can be express mathematically in equation below (3.0); the result of the voltages at the output of the implant coil is; Output = A1[cos( ω t + φ1 ) + A2 cos( ωt + φ 2 )] (3.0) 212

230 PhDThesis Appendix A u + v u v cos u + cos v = 2 cos( ) cos( ) 2 2 ( ωt + φ1 ) + ( ωt + φ 2 ) ( ωt + φ1 ) ( ωt + φ 2 ) Output = A1 + A2cos( cos (4.0) 2 2 In case, where both sources are equals in phase the equation (4.0) can be rewritten as: 2( A + A2 ) Output = 1 [ cos( ω + φ1 ) + ( ω + φ 2 ) cos( ω + φ1) cos( ω + 2 ])] 2 φ t t t t (5.0) If the phases of both signals are equals ( φ 1 = φ2 ), the output summation is given in equation as: [ ω t + φ ) cos( ωt + ]] Output = A1 + A2 (cos( 1 φ1 (6.0) The implant coil is working as PBF, which is removes, the second harmonics of the signal. The output will be producing a double voltage at the implant coil can expressed in equation (7.0) as: 2 Output = A cos( ω t + φ ) (7.0) 3.1 Lab Measurements and Summary The proposed idea has evaluated with the lab measurements; we can conclude the received power at the implant has affected by the received magnetic field, influence by both sources. Conversely, the orientation angles of both coils are critical to fixed, where the implant is movement part that needs to re-adjust the reader s coils angle. Figure (A1.9) is illustrated the comparison of each coil and the summation results for the received power that are compared with a single coil equivalent to the both coils values. Figure (A1.9) the received power with two identical coils comparing to single coil 213

231 Appendix B VHDL Code Appendix - B

232 PhDThesis Appendix B 1. Appropriate Topologies The VHDL techniques demonstrated by many brands with different development kits. In this work, where try first with Altera development board as demonstrated in Figure (B1.0). The second board was tried with Xilinx board as shown in the Figure (B1.1) that is used to generate the VHDL programming codes and simulate it. The measurements was evaluated with the Altera development board for testing the proposed modulators with VHDL code and compared them with the simulated, for these codes the BPSK, QPSK and 8-PSK modulators. Figure (B1.0) the Altera development board FPGA/CPLD Figure (B1.1) the Xilinx development board FPGA /CPLD 214

233 PhDThesis Appendix B 2. The VHDL programming Codes for proposed Modulators: We classify the modulators into three schemes: the BPSK, QPSK and 8PSK, each modulator has synthesized with two methods the structural and the behavioral design, to evaluate both methods. We implanted both methods with the hardware, to evaluate the appropriate method, to compare between them as the best performance modulator. However, the structural and behavioral methods have given the same performance in BPSK modulator, where it is not sufficient for the QPSK and 8-PSK modulators. Whilst the behavioral method given better efficiency for three modulators. Generally, both methods have programmed in VHDL code, started with top level of the modulator (inputs/outputs). The efficiency performance of the digital modulator is dependent on the accurately produced carrier signal, the carrier phase shifter it is also the critical element design, which affects in the performance of the modulator. If there is any error between the carrier phase signals, that affecting in the phase transition of the carrier signal. However, these problems have solved by calculating the delay, and re-design the carrier phase shifter, conversely that produced a perfect output signals with zero error. This appendix has covered most of the programming generated codes for modulators. Generally, the classifications of both methods are illustrated in diagram B (1.2). BPSK Modulator QPSK Modulator 8PSK Modulator Structural Behavioral Structural Behavioral Structural Behavioral Figure (B1.2) the structural and behavioral methods for the three different schemes 215

234 PhDThesis Appendix B 2.1 The BPSK VHDL Programming Code (Structural) Newcastle University School Of / / / / / / / / / / / / / / / / / / / \ \ \ \ / / \ \ \ \ \ \ / / \ \ / / / / \ \ / / / / / / \ \ / / \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ Full Digital BPSK/ QPSK/8PSK Modulator Using CPLD/FPGA Author : Gihad Elamary Supervisor s : Dr. Graeme Chester and : Mr. Jeffery Neasham Date and Yea r : TO Level of the BPSK / Digital Modulator (Structural) LIBRARY IEEE; USE ieee.std_logic_1164.all; entity Carrier_Phase is port ( Carrier_in I0, I180 end Carrier_Phase; : in std_logic; : buffer std_logic); architecture structral of Carrier_Phase is component NOT1 port ( A : in std_logic ; X : out std_logic ); end component; component my_dff1 port ( d, clk : in std_logic ; q : buffer std_logic); end component; Component declaration for Not Gate Component declaration DFF 216

235 PhDThesis Appendix B signal FF0, FF0_NOT : std_logic; declaration of the signal used to interconnected begin U0 : my_dff1 port map ( clk => Carrier_in, q => FF0, d => FF0_NOT ); U1 : NOT1 port map ( A => FF0, X => FF0_NOT ); I0 <= FF0 ; I180 <= FF0_NOT ; end structural; LIBRARY ieee; USE ieee.std_logic_1164.all; DFF1 declaration entity my_dff1 is port ( d, clk : in std_logic; q : buffer std_logic); end my_dff1; architecture Behavior of my_dff1 is begin process( d, clk ) begin D Clk q~reg0 PRE D Q ENA CLR comb~0 BUF (DIRECT) q_not q if (clk'event and clk='1') then q <= d; end if; end process; end behavior; library ieee; use ieee.std_logic_1164.all; NOT Gate Declaration entity NOT1 is port( A : IN std_logic; X : OUT std_logic); end NOT1; architecture behavoural of NOT1 is begin X <= not A ; end behavioral; 217

236 PhDThesis Appendix B The simulation of the VHDL code has presented in Figure (B1.3), where the carrier frequency and the data are interfaced together from the external source board to the development Altera board. However, the practical structural modulator has synthesized with CPLD chip as demonstrated in Figure (B1.4). inst9 inst4 Carrier_in PRE D Q ENA inst3 inst7 7474:inst Data_in CLR inst2 inst1 inst8 1CLK 1D 2CLK 2D 1Q 1QN 2Q BPSK-OUT Figure (B1.3) the VHDL of the structural BPSK modulator module (A) NOT DFF D PRN Q inst11 AND2 CLRN inst1 inst4 AND2 OR2 inst9 OUTPUT BPSK_TX PIN_9 PIN_5 Data_input INPUT VCC NOT inst7 inst5 PIN_83 Carrier_input INPUT VCC 1PRN 1D 1CLRN 1CLK 2PRN 2D Q 1QN 2Q 2QN 2CLRN 2CLK inst D FLIP-FLOPS NOT inst8 AND2 inst2 AND2 NOR2 inst6 OUTPUT BPSK_out PIN_11 inst3 Figure (B1.4) the block diagram of the structural BPSK modulator Module (B) 218

237 PhDThesis Appendix B TO Level of BPSK / Digital Modulator (VHDL Behavioral code) LIBRARY IEEE; USE ieee.std_logic_1164.all; entity BPSK_mod is port( Master_clock Rest BPSK_output Test_PN end BPSK_mod ; architecture b_mod of BPSK_mod is signal K0, K1, K2, K3 : std_logic ; Declaration of modulator : in std_logic; : in std_logic; : out std_logic; : out std_logic); component mux_ Component declaration port ( A, B : In std_logic; S : In std_logic; output_mux : buffer std_logic); end component ; component Carrier_Phase port ( Carrier_in I0, I180 end component; component Freq_div2MHz port ( clk Div_out end component; component PN_gen port ( Clk PN_out end component; begin : in std_logic; : inout std_logic); : in std_logic; : buffer std_logic); : IN std_logic; : inout std_logic); U0 : Carrier_Phase port map ( Carrier_in => Master_clock, I0 => K0, I180 => K1 ); U1 : Freq_div2MHz port map ( clk => Master_clock, Div_out => K2 ); U2 : PN_gen port map ( Clk => K2, PN_out => K3 ) ; U3 : mux_2 port map ( A => K0, B => K1, S => K3, output_mux => BPSK_output ); Test_PN <= K3 ; end b_mod ; 219

238 PhDThesis Appendix B VHDL code for Multiplexer library ieee; use ieee.std_logic_1164.all; entity mux_2 is port ( A, B S output_mux end mux_2; architecture behavior of mux_2 is begin process ( A, B, S ) begin if s='0' then output_mux <= A ; else output_mux <= B; end if; end process; end behavior; : In std_logic; : In std_logic; : out std_logic); S B A 0 1 output_mux~0 output_mux VHDL code for the Carrier Frequency library ieee; use ieee.std_logic_1164.all; entity Carrier_Phase is port ( Carrier_in I0, I180 end Carrier_Phase; : in std_logic; : buffer std_logic); architecture structral of Carrier_Phase is component NOT Component declaration port ( A : in std_logic ; X : out std_logic ); end component; component my_dff1 port ( d, clk : in std_logic ; q : buffer std_logic); end component; 220

239 PhDThesis Appendix B signal FF0, FF0_NOT : std_logic; declaration of the signal used to interconnected begin U0 : my_dff1 port map ( clk => Carrier_in, q => FF0, d => FF0_NOT ); U1 : NOT1 port map ( A => FF0, X => FF0_NOT ); I0 <= FF0 ; I180 <= FF0_NOT ; end structural; LIBRARY ieee; USE ieee.std_logic_1164.all; DFF1 declaration entity my_dff1 is port ( d, clk : in std_logic; q : buffer std_logic); end my_dff1; architecture Behaviour of my_dff1 is begin process( d, clk ) begin if (clk'event and clk='1') then q <= d; end if; end process; end behaviour; library ieee; use ieee.std_logic_1164.all; NOT Declaration entity NOT1 is port( A : IN std_logic; X : OUT std_logic); end NOT1; architecture behavioral of NOT1 is begin X <= not A ; end behavioral; 221

240 PhDThesis Appendix B VHDL code for Frequency Divider -2MHz library ieee; use ieee.std_logic_1164.all; entity Freq_div2MHz is port ( clk : IN std_logic; Div_out : buffer std_logic); end Freq_div2MHz ; architecture behavior of Freq_div2MHz is type states is ( zero, one, two, three, four, five, six, seven, eight, nine, ten, eleven ); signal present_state, next_state : states; signal temp : std_logic; Positive Edge clock process begin process (clk) begin if ( clk'event and clk ='1') then present_state <= next_state; end if; end process; process ( present_state ) Positive edge FSM for present state begin case present_state is when zero => temp <='0'; next_state <= one ; when one => temp <='0'; next_state <= two ; when two => temp <='0'; next_state <= three ; when three => temp <='0'; next_state <= four ; when four => temp <='0'; next_state <= five ; when five => temp <='0'; next_state <= six ; when six => temp <='1'; next_state <= seven ; when seven => temp <='1'; next_state <= egith ; when egith => temp <='1'; next_state <= nine ; when nine => temp <='1'; next_state <= ten ; when ten => temp <='1'; next_state <= eleven ; when eleven => temp <='1'; next_state <= zero; end case; end process; Div_out <= temp ; end behavior; 222

241 PhDThesis Appendix B VHDL code for the PN sequence library ieee; use ieee.std_logic_1164.all; entity PN_gen is port ( Clk : IN std_logic; PN_out : OUT std_logic); end PN_gen ; architecture behavior of PN_gen is type states is ( zero, one, two,three, four, five,six, seven ); signal present_state, next_state : states ; signal out_1 :std_logic ; begin process (clk) begin if ( clk'event and clk='1') then present_state <= next_state; PN_out <= out_1; end if; end process; process ( present_state ) begin case present_state is when zero => out_1 <= '0'; next_state <= one ; when one => out_1 <= '1'; next_state <= two ; when two => out_1 <= '0'; next_state <= three ; when three => out_1 <= '1'; next_state <= four; when four => out_1 <= '1'; next_state <= five; when five => out_1 <= '1'; next_state <= six; when six => out_1 <= '0'; next_state <= seven; when seven => out_1 <= '0'; next_state <= zero; end case; end process; end behavior; 223

242 PhDThesis Appendix B The simulation of the VHDL code for BPSK modulator has presented in Figure (B1.5), where each part of the modulator is simulated individual. The carrier simulation is shown in Figure (B4.6). However the multiplier has been illustrated in Figure (B1.7), where the frequency divider has been depicted in Figure (B1.8) finally, and the PIN sequence code generator is demonstrated in Figure (B1.9). Freq_div2MHz:U1 PN_gen:U2 Test_PN~0 Master_clock Rest (GND) clk Div_out Clk PN_out comb~[2..0] BUF (DIRECT) mux_2:u3 Test_PN Carrier_Phase:U0 A B output_mux BPSK_output Carrier_in I0 I180 BUF (DIRECT) S Figure (B1.5) the block diagram of the behavioral BPSK modulator my_dff1:u0 A NOT1:U1 X clk d q I0 I180 Carrier_in Figure (B1.6) the carrier simulation for generates (0,180) S B A 0 1 output_mux~0 output_mux Figure (B1.7) the simulation behavioral of multiplexer 224

243 PhDThesis Appendix B present_state zero clk clk one two three WideOr0 Div_out four five Figure (B1.8) the simulation behavioral of frequency divider present_state.state_bit_0 PN_out~reg0 Clk CLK DATAOUT MCELL present_state.state_bit_1 present_state.state_bit_2 CLK CLK LITERAL[0] LITERAL[1] LITERAL[2] DATAOUT PN_out CLK LITERAL DATAOUT LITERAL[0] LITERAL[1] MCELL DATAOUT MCELL MCELL Figure (B1.9) the simulation behavioral of the PN sequence code and the states End of Digital BPSK Modulator 225

244 PhDThesis Appendix B The second proposed modulator is the QPSK; where try to synthesize the QPSK modulator by programming the VHDL code. The modulator has been designed using the previous methods structural and behavioral as: TO Level of QPSK / Digital Modulator (Structural) library ieee; use ieee.std_logic_1164.all; use ieee.std_logic_unsigned.all; entity QPSK_Modulator IS PORT( Data_in : IN STD_LOGIC; carr_in : IN STD_LOGIC; QPSK_out : out STD_LOGIC); end QPSK_Modulator; Top level of Digital QPSK architecture structure of QPSK_Modulator is component Data_Mapping port ( D_in : in std_logic; I : buffer std_logic; Q : buffer std_logic); end component; component Carrier_Phase port ( Carrier_in : in std_logic; I0,I90 : buffer std_logic; I180, I270 : buffer std_logic); end component; Data mapping declaration Carrier Phase shift declaration component mux4to_ Multiplexer declaration PORT (A0, B90, C180, D270 : IN STD_LOGIC; S : INOUT STD_LOGIC_VECTOR (1 DOWNTO 0); mux_out : buffer STD_LOGIC ); end component; signal SC0, SC1, C2, C3, C4, C5 : std_logic ; begin internal connection signal DM0 : Data_Mapping port map ( D_in => Data_in, I => SC0, Q => SC1 ); CM1 : Carrier_Phase port map ( Carrier_in => carr_in, I0 => C2, I90 => C3, I180 => C4,I270 => C5 ); MM2 : mux4to_1 port map ( mux_out => QPSK_out, S(0) => SC0, S(1) => SC1, A0 => C2, B90 => C3, C180 => C4, D270 => C5 ); end structure;

245 PhDThesis Appendix B Structure code for the Data Mapping library ieee; use ieee.std_logic_1164.all; entity Data_Mapping is port ( D_in : in std_logic ; I : out std_logic; Q : out std_logic); end Data_Mapping; architecture structural of Data_Mapping is component NOT1 port ( A : in std_logic ; X : out std_logic ); end component; component my_dff1 port ( d, clk : in std_logic; q : buffer std_logic; q_not : out std_logic); end component; -- Top Level Of Data Mapping for Modulator Component declaration Declaration of the signal used to interconnected signal FF0, FF0_NOT, FF1, FF1_NOT : std_logic; begin U0 : my_dff1 port map ( clk => D_in, q => FF0, d => FF0_NOT ); U1 : NOT1 port map ( A => FF0, X => FF0_NOT ); U2 : my_dff1 port map ( clk => FF0_NOT, q => FF1, d => FF1_NOT ); U3 : NOT1 port map ( A => FF1, X => FF1_NOT ); I <= FF0; Q <= FF1; end structural; D Flip Flop declaration LIBRARY ieee; USE ieee.std_logic_1164.all; entity my_dff1 is port ( d, clk : IN std_logic; q : buffer std_logic; q_not : out std_logic); end my_dff1; 227

246 PhDThesis Appendix B architecture Behavior of my_dff1 is begin process( d, clk) begin if ( clk'event and clk= '1' ) then q <= d; end if; end process; q_not <= NOT q; end behavior; library ieee; use ieee.std_logic_1164.all; entity NOT1 is port( A : IN std_logic; X : OUT std_logic); end NOT1; architecture behavioral of NOT1 is begin X <= not A ; end behavioral; NOT Declaration Top Level of Carrier Phase Shifter library ieee; use ieee.std_logic_1164.all; entity Carrier_Phase is port ( Carrier_in : in std_logic; I0,I90 : buffer std_logic; I180, I270 : buffer std_logic); end Carrier_Phase; architecture structural of Carrier_Phase is component NOT1 port ( A : in std_logic ; X : out std_logic ); end component; component my_dff1 port ( d, clk : in std_logic ; q : buffer std_logic); end component; Component declaration 228

247 PhDThesis Appendix B Declaration of the signal used to interconnected signal FF0, FF0_NOT, FF1, FF1_NOT, CAR_NOT : std_logic; begin U0 : my_dff1 port map ( clk => Carrier_in, q => FF0, d => FF0_NOT ); U1 : NOT1 port map ( A => FF0, X => FF0_NOT ); U2 : my_dff1 port map ( clk => CAR_NOT, q => FF1, d => FF1_NOT ); U3 : NOT1 port map ( A => FF1, X => FF1_NOT ); U4 : NOT1 port map ( A => Carrier_in,X => CAR_NOT ); end structural; I0 <= FF0; I180 <= FF0_NOT; I90 <= FF1; I270 <= FF1_NOT; Top Level of Multiplexer 4 to LIBRARY IEEE; USE IEEE.STD_LOGIC_1164.ALL; ENTITY mux4to_1 IS PORT ( A0, B90, C180, D270 : IN STD_LOGIC ; S : inout STD_LOGIC_VECTOR (1 DOWNTO 0); mux_out : buffer STD_LOGIC ); END mux4to_1; ARCHITECTURE multiplexer4x1 OF mux4to_1 IS BEGIN PROCESS ( S, A0, B90, C180, D270 ) BEGIN CASE S IS WHEN "00" => mux_out <= A0; WHEN "01" => mux_out <= B90; WHEN "10" => mux_out <= C180; WHEN OTHERS => mux_out <= D270; END CASE ; END PROCESS; END multiplexer4x1; 229

248 PhDThesis Appendix B The simulation of the VHDL code for the structural QPSK modulator has presented in Figure (B1.10), where the carrier frequency and the data interfaced from the external boards. However, the practical modulator has synthesized with the CPLD chip has demonstrated in Figure (B1.11). carrier_shifter:inst mux4to_1:inst2 I0 A0 Carrier Carrier_in I180 I270 B90 C180 Mux_out QPSK_output I90 D270 s[1..0] QPSK_map:inst1 PN_code Din_PN Q[1..0] Q[1..0] Figure (B1.10) Demonstrate the VHDL of the structural QPSK modulator OUTPUT Q1 PIN_5 PIN_1 PIN_83 Data pin_name Carrier INPUT VCC INPUT VCC INPUT VCC NOT inst7 1PRN 1D 1CLRN 1CLK 2PRN 2D Q 1QN 2Q 2QN 2CLRN 2CLK inst5 D FLIP-FLOPS 1PRN 1D 1CLRN 1CLK 2PRN 2D Q 1QN 2Q 2QN 2CLRN 2CLK inst D FLIP-FLOPS OUTPUT Q2 OUTPUT OUTPUT A B 1GN 1C0 1C1 1C2 1Y 1C3 2Y 2GN 2C0 2C1 2C2 2C3 inst21multiplexer I0 I180 OUTPUT Q-Signal PIN_11 OUTPUT I90 OUTPUT I270 Figure (B1.11) the block diagram of the structural QPSK modulator 230

249 PhDThesis Appendix B TO Level of QPSK / Digital Modulator (Behavioral) library ieee; use ieee.std_logic_1164.all; use ieee.std_logic_arith.all; use ieee.std_logic_unsigned.all; entity QPSK_MOD is port ( Master_clk : in std_logic; Div_output : out std_logic; PN_output : out std_logic; I_Q : out std_logic_vector( 1 downto 0 ); qpsk_out : out std_logic); end QPSK_MOD; architecture structural of QPSK_MOD is component Freq_div port ( D_in Div_out end component; component PN_gn port ( Din_div PN_out end component; : in std_logic; : buffer std_logic); : in std_logic; : buffer std_logic); component mux4to_1 port ( A0,B90,C180,D270 :IN STD_LOGIC ; s :IN STD_LOGIC_VECTOR (1 DOWNTO 0); Mux_out :OUT STD_LOGIC ); end component; component carrier_shifter port ( Carrier_in : in std_logic; I0,I90 : buffer std_logic; I180, I270 : buffer std_logic); end component; component QPSK_map port ( Din_PN : in std_logic; Q : buffer std_logic_vector( 1 downto 0 )); end component; signal SC0, SC1, SC2, SC3, SC4, SC5, SC6,SC7, SC8, SC9 : std_logic; 231

250 PhDThesis begin Appendix B U1 : Freq_div port map ( D_in => Master_clk, Div_out => SC0 ); U2 : PN_gn port map ( Din_div => SC0, PN_out => SC1 ); U3 : QPSK_map port map ( Din_PN => SC1, Q(0) => SC8, Q(1) => SC9 ); U4 : carrier_shifter port map ( Carrier_in =>Master_clk, I0 => SC4, I90 => SC5, I180 => SC6, I270 => SC7 ); U5 : mux4to_1 port map ( A0 => SC4, B90 => SC5, C180 => SC6, D270 => SC7, Mux_out => qpsk_out, s(0) => SC8, s(1)=> SC9); end structural; Div_output <= SC0; PN_output <= SC1; I_Q(0) <= SC8; I_Q(1) <= SC9; VHDL code for the Multiplexer LIBRARY IEEE; USE IEEE.STD_LOGIC_1164.ALL; ENTITY mux4to_1 IS Top Level of Multiplexer 4 to 1 PORT ( A0,B90,C180,D270 :IN STD_LOGIC ; s :IN STD_LOGIC_VECTOR (1 DOWNTO 0); Mux_out :OUT STD_LOGIC ); END mux4to_1; ARCHITECTURE multiplexer4x1 OF mux4to_1 IS BEGIN PROCESS (s,a0,b90,c180,d270) BEGIN CASE s IS END CASE ; END PROCESS; END multiplexer4x1; WHEN "00" => Mux_out <= A0; WHEN "01" => Mux_out <= B90; WHEN "10" => Mux_out <= C180; WHEN OTHERS => Mux_out <= D270; 232

251 PhDThesis Appendix B VHDL code for the frequency divider at 2 MHz library ieee; use ieee.std_logic_1164.all; use ieee.std_logic_arith.all; use ieee.std_logic_unsigned.all; entity Freq_div is port ( D_in : in std_logic; Div_out : buffer std_logic); end Freq_div; architecture behavior of Freq_div is signal count_2mhz : std_logic_vector(4 downto 0 ); signal clock_2mhz_int : std_logic; begin process begin wait until D_in'event and D_in = '1' if count_2mhz < 6 then count_2mhz <= count_2mhz + 1; else count_2mhz <= "00000" ; end if ; if count_2mhz < 3 then clock_2mhz_int <= '0'; else clock_2mhz_int <= '1'; end if; end process ; Div_out <= clock_2mhz_int ; end behavior; VHDL code for the Data Mapping library ieee; use ieee.std_logic_1164.all; use ieee.std_logic_unsigned.all; entity QPSK_map is port( Din_PN : in std_logic; Q : out std_logic_vector( 1 downto 0 )); end qpsk_map; 233

252 PhDThesis architecture behaviour of qpsk_map is signal tmp : std_logic_vector (1 downto 0 ); begin process (Din_PN) begin if (Din_PN'event and Din_PN= '1' ) then tmp <= tmp + 1 ; end if; end process; Q <= tmp; end behaviour; Appendix B VHDL code for the Carrier phase shifter library ieee; use ieee.std_logic_1164.all; entity carrier_shifter is port ( Carrier_in : in bit; I0,I90 : inout bit; I180, I270 : inout bit); end carrier_shifter; architecture structural of carrier_shifter is component NOT1 port ( A : in bit ; X : out bit ); end component; component my_dff1 port ( d, clk : in bit ; q : inout bit); end component; declaration of the signal used to interconnected begin signal FF0, FF0_NOT, FF1, FF1_NOT, CAR_NOT : bit; U0 : my_dff1 port map ( clk => Carrier_in, q => FF0, d => FF0_NOT ); U1 : NOT1 port map ( A => FF0, X => FF0_NOT ); U2 : my_dff1 port map ( clk => CAR_NOT, q => FF1, d => FF1_NOT ); U3 : NOT1 port map ( A => FF1, X => FF1_NOT ); U4 : NOT1 port map ( A => Carrier_in,X => CAR_NOT ); end structural; I0 <= FF0; I180 <= FF0_NOT; I90 <= FF1; I270 <= FF1_NOT; 234

253 PhDThesis Appendix B Declaration of the component LIBRARY ieee; USE ieee.std_logic_1164.all; entity my_dff1 is DFF declaration port ( d, clk : IN bit; q : buffer bit); end my_dff1; architecture Behavior of my_dff1 is begin process( d, clk) begin if (clk'event and clk='1') then q <= d; end if; end process; end behavior; library ieee; use ieee.std_logic_1164.all; entity NOT1 is port( A : IN std_logic; X : OUT std_logic); end NOT1; architecture behavioral of NOT1 is Not gate declaration begin X <= not A ; end behavioral; The modulator has been programmed with the VHDL code for generates the QPSK digital signal as shown in the Figure (B1.12). Where the each part of modulator has simulated individually, the carrier simulation has demonstrated in the Figure (B4.13), which are generates four different outputs in the same frequency but with different phases (0º, 90º, 180º, 270º). However, the multiplier has illustrated in the Figure (B1.24), where the frequency divider has shown in Figure (B1.15). Eventually, the PN sequence code generator and the data mapping are demonstrated in the Figure (B1.16) and (B1.17) respectively. 235

254 PhDThesis Appendix B carrier_shifter:u4 Master_clk Carrier_in I0 I180 I270 A0 mux4to_1:u5 D_in Freq_div:U1 I90 Div_out PN_gn:U2 QPSK_map:U3 Din_div PN_out Din_PN Q[1..0] B90 C180 D270 s[1..0] Mux_out qpsk_out I_Q[1..0] PN_output Div_output Figure (B1.12) the simulation behavioral for QPSK modulator I270~0 A NOT1:U3 X I270 BUF (DIRECT) I180~0 diff~0 comb~[2..0] A NOT1:U1 X I180 BUF (DIRECT) I90~0 Carrier_in A NOT1:U4 X clk d my_dff1:u2 q BUF (DIRECT) clk d my_dff1:u0 q BUF (DIRECT) I0~0 BUF (DIRECT) I90 I0 diff Figure (B1.13) the simulation behavioral code for carrier phase shifter Mux0 s[1..0] D270 C180 B90 A0 SEL[1..0] DATA[3..0] OUT Mux_out MUX Figure (B1.14) the simulation behavioral of multiplexer (4 to 1) 236

255 PhDThesis Appendix B A[4..0] B[4..0] 5' h01 -- Add0 + count_2mhz[4..0] A[4..0] PRE D Q B[4..0] 5' h03 -- LessThan1 < clock_2mhz_int PRE D Q Div_out ADDER LessThan0 ENA CLR LESS_THAN ENA CLR A[4..0] B[4..0] 5' h06 -- < count_2mhz~[9..5] LESS_THAN 5' h00 -- SEL DATAA DATAB OUT0 MUX21 D_in Figure (B1.15) the simulation behavioral for the frequency divider present_state Din_div clk zero two six WideOr0 PN_out~reg0 PRE D Q PN_out seven ENA CLR Figure (B1.16) the simulation behavioral of the PN code sequence generator A[1..0] B[1..0] 2' h1 -- Add0 + tmp[1..0] PRE D Q Q[1..0] Din_PN Rest ADDER ENA CLR Figure (B1.17) the simulation behavioral of the data mapping for generates I/Q End of the QPSK Modulator 237

256 PhDThesis Appendix B The last modulator has been designed it is the 8-PSK modulator, which is synthesized the modulator by generates the VHDL programming code. It is also was designed with two methods structural and behavioral, the behavioral version is the more efficient one for this modulator The Top Level of 8-PSK / Digital Modulator (Behavioral) library ieee; use ieee.std_logic_1164.all; entity Carrier_8Phaser is port ( Carrier_in : in std_logic; A0,A180, A45, A225 : out std_logic; A90,A270,A135, A315 : out std_logic); end Carrier_8Phaser; architecture structural of Carrier_8Phaser is component my_not1 port ( A : in std_logic ; X : out std_logic ); end component; Component declaration component my_df port ( d, clk : in std_logic ; q : out std_logic); end component; Declaration of the signal used to interconnected signal FF0, FF0_NOT, FF1, FF1_NOT, FF2, FF2_NOT, FF3, FF3_NOT : std_logic; begin U0 : my_df port map ( clk => Carrier_in, q => FF0, d => FF1 ); U1 : my_not1 port map ( A => FF0, X => FF0_NOT ); U2 : my_df port map ( clk => Carrier_in, q => FF1, d => FF2 ); U3 : my_not1 port map ( A => FF1, X => FF1_NOT ); U4 : my_df port map ( clk => Carrier_in, q => FF2, d => FF3 ); U5 : my_not1 port map ( A => FF2, X => FF2_NOT ); U6 : my_df port map ( clk => Carrier_in,q => FF3, d => FF0_NOT ); U7 : my_not1 port map ( A => FF3, X => FF3_NOT ); A0 <= FF0; A180 <= FF0_NOT; A45 <= FF1; A225 <= FF1_NOT; A90 <= FF2; A270 <= FF2_NOT; A135 <= FF3; A315 <= FF3_NOT; end structural;

257 PhDThesis LIBRARY ieee; USE ieee.std_logic_1164.all; entity my_df is port ( d, clk : in std_logic; q : out std_logic); end my_df; architecture Behavior of my_df is begin process( d, clk ) begin if (clk'event and clk='1') then q <= d; end if; end process; end behavior; library ieee; use ieee.std_logic_1164.all; entity my_not1 is port( A : in std_logic; X : OUT std_logic); end my_not1; architecture behavioral of my_not1 is begin X <= not A ; end behavioral; Appendix B DFF1 declaration NOT Declaration The VHDL code for carrier library IEEE; use IEEE.STD_LOGIC_1164.ALL; use IEEE.STD_LOGIC_ARITH.ALL; use IEEE.STD_LOGIC_UNSIGNED.ALL; entity counter is Port ( CLOCK : in STD_LOGIC; DIRECTION : in STD_LOGIC; COUNT_OUT : out STD_LOGIC_VECTOR (2 downto 0)); end counter; 239

258 PhDThesis Appendix B architecture Behavioral of counter is signal count_int : std_logic_vector (2 downto 0) := "000"; begin process (CLOCK) begin if CLOCK ='1' and CLOCK'event then if direction='1' then count_int <= count_int + 1; else count_int <= count_int - 1; end if; end if; end process; COUNT_OUT <= count_int; end Behavioral; VHDL code for the multiplexer (8 to 1) IBRARY IEEE; USE IEEE.STD_LOGIC_1164.ALL; ENTITY mux8to_1 IS Top Level Of Multiplexer 4 to 1 PORT ( A0, A45,A90, A135, A180, A225, A270, A315 :IN STD_LOGIC ; s :IN STD_LOGIC_VECTOR (2 DOWNTO 0); Mux_out : OUT STD_LOGIC ); END mux8to_1; ARCHITECTURE multiplexer8x1 OF mux8to_1 IS BEGIN PROCESS (s,a0, A45, A90, A135, A180, A225, A270, A315) BEGIN CASE s IS END CASE ; END PROCESS; END multiplexer8x1; WHEN "000" => Mux_out <= A0; WHEN "001" => Mux_out <= A45; WHEN "010" => Mux_out <= A90; WHEN "011" => Mux_out <= A135; WHEN "100" => Mux_out <= A180; WHEN "101" => Mux_out <= A225; WHEN "110" => Mux_out <= A270; WHEN OTHERS=> Mux_out <= A315; 240

259 PhDThesis Appendix B The above modulator was programmed with the VHDL code for generates the 8PSK digital signal was presented in the simulation code results in Figure (B1.18), where each part of the modulator has been simulated individually. However the PN-sequence code generator has illustrated in Figure (B1.19), where the frequency divider is depicted in the previous simulation. Whilst the carriers phase shifter simulation is shown in the Figure (B1.20). Ultimately, the multiplexer and the data mapping are demonstrated in the Figure (B1.21) and Figure (B1.22) respectively. Carrier_8Phaser:inst mux8to_1:inst1 my_df:u0:q Carrier_8Phaser:inst:q Carrier_input Carrier_input my_df:u0:q~4 my_df:u2:q my_df:u2:q~4 my_df:u4:q my_df:u4:q~4 Direction PN_gen:inst3:PN_out counter:inst2 count_int[0..2] Carrier_8Phaser:inst:q Carrier_8Phaser:inst:q Carrier_8Phaser:inst:q counter:inst2:count_int[0..2] Mux0~26 8_PSK_out COUNT_OUT[0..2] my_df:u6:q my_df:u6:q~4 PN_gen:inst3 pin_name[1..8] Carrier_input PN_out Direction Figure (B1.18) the block diagram of the Behavioral the 8-PSK modulator present_state.state_bit_0 PN_out Carrier_input CLK DATAOUT MCELL present_state.state_bit_1 present_state.state_bit_2 CLK CLK LITERAL[0] LITERAL[1] LITERAL[2] DATAOUT PN_out CLK LITERAL DATAOUT LITERAL[0] LITERAL[1] MCELL DATAOUT MCELL MCELL Figure (B1.19) the block diagram of the Behavioral the PN- code generator 241

260 PhDThesis Appendix B my_not1:u1 my_df:u6 my_not1:u7 A X clk d q A X A315 my_df:u4 my_df:u2 my_df:u0 Carrier_in clk d q clk d q clk d q A0 my_not1:u5 A X A270 my_not1:u3 A X A225 A45 A90 A135 A180 Figure (B1.20) the simulation behavioral of the carrier phase shifter Mux0 s[2..0] A315 A270 A225 A180 A135 A90 A45 A0 SEL[2..0] DATA[7..0] OUT Mux_out MUX Figure (B1.21) the simulation behavioral of the multiplexer for (8 to 1) PN_gen:inst3:PN_out count_int[0] LITERAL[0] DATAOUT LITERAL[1] count_int[1] LITERAL[0] LITERAL[1] DATAOUT count_int[2] LITERAL[0] MCELL LITERAL[2] LITERAL[1] Direction MCELL LITERAL[2] LITERAL[3] LITERAL[4] MCELL DATAOUT count_int[0..2] Figure (B1.22) the simulation behavioral for the data mapping End of the 8PSK Modualtor 242

261 Appendix C Extra Hardware Implementation Appendix - C

262 PhDThesis Appendix C 3. PN Code Generator Topologies: The data source is generates a PN-sequence to transmitting a modulated random binary data over the inductive coupling link for test purposes. There are different topologies to implement the PN-sequence in circuit design, or generates as programmed code. The practical circuit was designed as shown in Figure (C1.0). The board generates five different codes as (1.70kbps, 390kbp, 90kbps, and 3Mbps); the waveform of the test circuit is demonstrated in Figure (C1.1). Figure (C1.0) shown the PN sequence generator circuit Figure (C1.1) the PN sequence waveform output (CH2) 243

263 PhDThesis Appendix C 3.1 The Proposed Implant Digital Modulators (TX/Rx) The investigation was to improve the efficiency performance of the implant device, that for reduce the device size of the implant and the power consumption of the electronics circuits. The proposed full digital modulators are synthesized in programming code in VHDL the demodulator was redesigned by modified and replaced the ASK demodulator with a full digital demodulator that were synthesized in CPLD. Generally, the analogue RF received signal is converted into a digital form, and the output signal from the converter circuit is demodulated with the VHDL digital BPSK demodulator. The block diagram of our proposed VHDL digital modulators are demonstrated in Figure (C1.2), the second proposed RF design converter circuit as second solution for higher frequency. Data Out Data Input Figure (C1.2) the proposed full digital modulators at the implant device BPSK VHDL Modulator LPF BPSK VHDL Demodulator RF- Analogue to Digital Converter Circuit Figure (C1.3) illustrated the second proposed RF-digital circuit converter 244

264 PhDThesis Appendix C The synthesized modulator and demodulator, which are generated by VHDL, code has shown in Figure (C1.4). However, the proposed BPSK demodulator and QPSK modulator are working as discussed in chapter four. Carrier_shift_1:inst6 Carrrier_Input clk_in I0 I180 I270 A0 mux4to_1:inst4 I90 signal_gen:inst3 Clk PN_gen:inst2 PN_out QPSK_map:inst5 Din_PN Q[1..0] Rest B90 C180 D270 s[1..0] Mux_out QPSK_out clk PN_out Q[1..0] PIN_out Carrier_Phase:inst mux_2:inst1 Carrier_in I0 I180 A B S output_mux BPSK_out Rest Figure (C1.4) the BPSK/ QPSK modulator/demodulator generated by VHDL 3.2 Wireless Transmission Investigation for High Data Background The transcutaneous wireless telemetry devices are rising to use higher frequencies up to the microwave region. That needs to design antennas to works in the implant device and matching the electronics device. Typically, the objective of any such antenna must be to maximize the transfer power from and out the body, this required careful design to match the antenna working in ISM band [138]. The frequency investigated in this research is 402 MHz; the consideration for design the antenna is the type of antenna: the size. Generally, the better type of antenna is a directional antenna as appropriate for biomedical applications, because they had advantage as a fewer disturbances to the radiation pattern and to the return loss. However, compared to omnidirectional antenna it should be avoided to use in the implant device. Most of the new telemetry system is developed in order to be fitted with the common characteristic of future a higher performance radio powered implantable stimulators. These required transmitting higher data rate to control the large number of electrode arrays, and accurate definition enough power. 245

265 PhDThesis Appendix C The prototype developed allows demodulating and decoding the information coming though the wireless transcutaneous link with data rates from 1.30 Mbps up to 4.46 Mbps. The proposed PCB antennas have the goal to provide UHF band as an alternative to accomplish a good compact RF system design, the PCB antenna is intended for 310 to 420MHz frequency of operation. Practically, the parameters for design UHF antenna (tracking loop antenna) are demonstrated in Figure (C1.5). Antenna Characteristics Directivity Matching Impedance Polarization VSWR Vertical Horizontal Ellipsoidal Figure (C1.5) demonstrate the parameters for coil antenna design at UHF Conceptually, in biomedical purpose there are gaining acceptances for using 2.4GHz, originally developed for RFID applications [126] [58]. This band of frequencies needs practical antenna mostly designed as track or in printed board, which needs in design to consider the above parameters. Undeniably, the biodevices are still critical to design in UHF the band, as the power consumption is most important for implant devices. In addition, the modulator and PA are the hungry elements in implant device. However, we demonstrate in Figure (C1.6) below our UHF investigation solution over ISM band for short-range communication. In modern wireless technique using the direct modulation can reduce the transmitter size and power, in addition the local oscillator is a key element for efficient modulator design, and many investigations carry on for robust and appropriate design for implantable devices [59] [71]. The second modified solution using direct modulation technique, with VHDL modulator has shown in Figure (C1.7) 246

266 PhDThesis Appendix C Figure (C1.6) the transceiver solution with UHF solution Data Input VHDL Modulator BPF BPF To antenna LC-VCO Figure (C1.7) Modified solution for a direct modulation with UHF at implant device Design Of UHF antenna for biomedical purpose RF-Spiral Inductor Design Methodology The spiral square inductor is the most common applied in RFID, so the target in our project is to design a 150nH spiral square inductor with 10-quality factor Q. To achieve the quality factor of the spiral coil it is necessary to study the materials that form the substrate. Principally, the geometry of the spiral coil deign has been demonstrated in Figure (C1.8). However, to evaluate the inductance of the planar spiral square coil it can be calculated according to the Green s theorem [136] [103], that can be defined in the equation for self-coil for a straight conductor as: 21 AMD µ L = ln T GMD l 4 (1.0) 247

267 PhDThesis Appendix C Where L is the self-inductance in (µh), l is the coil length in cm; GMD and AMD represent the geometric and arithmetic mean distance, of the conductor cross section respectively. T is the frequency correction parameter. Generally, we used the top layer of metal of the spiral coil, it is a thin film inductor with rectangular cross section, and the equation (2.0) can be modified as; 21 a + b L = ln (2.0) a + b 3l In addition, there are many simplified formulas, which can be considered for design of spiralintegrated coils such as micro strip antennas. If we denotes the width and l the length of the coil, while b and h refer to the width and the height of its cross-section, C is equal to C = w + l + 2h in equation (3.0). 2 CN L = ( ) 1.908C + 9b + 10h (H) (3.0) Figure (C1.8) the geometry of a typical rectangular spiral coil Proposed Transmitter and Receiver coils Antenna design The schematic of the miniature square spiral inductor antenna has shown Figure (C1.9). The strips and separation or the gap widths indicated as W and G, respectively. The outer dimensions of the inductor are about mm, the above dimensions typical appropriate for implantable devices. The frequency range is operating in the range 200 to 700 MHz to facilitate the characterization using signal-ground RF probe; a short length of coplanar strip line (CPS) excites the inductors [198]. In Figure (C1.10) is shown the loop trace of a typical inductor as antenna on PCB. It defended, as the loop track inductance and the quality factor are dependent on the strip and separation or gap dimensions. 248

268 PhDThesis Appendix C In addition, elevation inductor by introducing an insulating layer such as spin-on glass (SOG) could improves the performance [205]. Hence, to carry out the parametric study several inductors with strip and gap dimensions in the range of 10 to 15m. In this thesis, we synthesized different types of implant antennas for biomedical purpose, that are shown in Figures (C1.9) first, the second Figure (C1.10) and third Figure (C1.11) geometries of our proposed for UHF and power spiral coil design respectively. Figure (C1.9) geometry of the typical rectangular spiral coil for implant device [205] Figure (C1.10) our first proposed geometry design for UHF and power spiral coils Figure (C1.11) the second proposed geometry of UHF antenna with power spiral coil 249

269 PhDThesis Appendix C Figure (C1.12) the third proposed geometry of UHF antenna with power spiral coil Reader Dipole Antenna Design The dipole antenna is the appropriate design work in the reader part as a receiver for UHF frequency. As alternative, to accomplish a good compact RF system design the PCB antenna is intended for the band 310 to 420MHz. The proposed PCB antennas have the goal to provide UHF band operation; it resembles a dipole antenna characteristic behavior. That is similar to a real one and it can detune by proximity to conductive objects like metal, human body, etc. The fabricated performance of it may vary slightly due to process different from one PCB house to another (dielectric material). The dipole impedance is capacitive in nature with resonance frequency at approximately 650MHz. However, the Table (C1.0) illustrates the matching impedance of the most used frequencies from 300 to 450MHz. For matching the load impedance at 50 or other impedance value, a shunt inductor from the feeding point to ground and a series capacitor from the feed point to the RF circuit are needed as shown in Figure (C1.13) (the values needed for the 6 th frequencies most used). The corrected or modified impedance after the antenna is matched as seen from RF circuit. Frequency (MHz) Z antenna() Z matched() C(pF) L(nH) j j j j j j j j j j Table1 (C1.0) Dipole Antenna impedance and Retuned Impedance with LC circuit with matching values Generally, the matching impedance is critical in order to get lowest VSWR and optimum transmitted power with less reflection to the source [212]. The VSWR is determining the amount 250

270 PhDThesis Appendix C of energy, which is not converted by the antenna into radiated energy. The antenna can be either radiating the energy (desired), or turn it in heat is (undesired). This parameter can be calculated in the formula in equation (4.0). ( 1+ ρ SWR = ( 1 ρ (4.0) RF-Circuit C L Figure (C1.13) Addition of Shunt capacitor for matching Antenna The desired inductive loop or loop antennas in biomedical design need often to consider the quality factor and perform in minimum size. However, the disadvantages of these techniques are the unused area behind the antenna track ground plane area, which affects the PCB antenna performance and detuned the carrier frequency. Typically, this reduces the implant device efficiency when working in UHF and using the micro strip antenna to transmits the data from implant device into reader unit. In addition, the higher frequency used it increases the parasitic capacitance and the interference could disturb the transmitting of information if designed under the PCB antenna. Consequently, to use this work as a practical solution, it may be necessary to update our work in future for specific applications Convert the RF signal to digital signal For working with digital circuits in high or low frequencies it essential to convert the analogue signal into digital form. In our situation, typically we use the CPLD for synthesized modulator and demodulator, which required the analogue RF signal to be converted into a digital signal for processing it in a CPLD chip. Obviously, the circuit size design and power consumption is critical inside the implant devices. Working with different circuits proposed designs for considering the carrier frequency and limited components for processing the analogue signal especially at implant part. The first proposed design is demonstrated in Figure (C1.14), in 251

271 PhDThesis Appendix C the block diagram to illustrate the Simple process essential to convert the analogue modulated received signal, which uses single rectifiers for positive and negative transitions. The Schmitt triggers convert signals and combine them to provide digital signals. The second proposed design is shown in Figure (C1.15), which modifies the first design for higher frequency. BPSK VHDL Modulator TX LPF Wireless coupling RF-digital convertor BPSK VHDL Demodulator Rx Figure (C1.14) the proposed block diagram of RF-digital convertor Figure (C1.15) the proposed completed block diagram of RF-digital convertor 5.3 New Methods for Automatic Control Frequency for the Class Power Amplifier In practice, there are many methods for controlling and adjust the carrier frequency; our goal is to mentoring and controlling the transmitter carrier frequency by the power amplifier. The advantages of this technique which is offer a high transfer wireless power stability that maintains stability of DC voltages at implant device. We investigated another two methods, which can be implemented for monitoring the RF transmitter power, using the feedback control techniques. Obviously, we discussed in the chapter three two methods for this purposes. The first method 252

272 PhDThesis Appendix C was used the VCO techniques we choose the PLL (HEF4046) as a simple implemented control circuit, with the auxiliary circuit for feedback signal. However, this method has been evaluated in hardware, which offers a good performance with class F comparing to class E power amplifier, especially where two coils are too closed. The transmit power and the frequency are affecting in this condition. Respectively, the second practical solution method was investigated with PWM techniques for generates the PWM signal using FPGA. Different methods has been studied for generates Pulse Width Modulation (PWM) in our case programmed by VHDL code. Generally, the proposed design has modified for correct the output PWM signal to perform the duty cycle at 50% at the tuned carrier frequency. This technique has offers a better performance for the suitability of the carrier frequency and the transmitter power amplifier. The main critical point for generates PWM it is the accurate generate frequency at certain value in our case is 135 khz. We have investigated addition methods for more robust control design which discuses as: A. Frequency Control System (Fuzzy logic controller -FPGA) The third method we have proposed for the controller technique has based with fuzzy logic controller for generates a PWM with FPGA or CPLD as shown in Figure (C1.16). The central frequency has chosen in work is the common in all methods which is 135 khz. This method has been simulated with MATLAB using Fuzzy controller tools for evaluate our work. However, this method has still under investigation for improvement and the implemented in hardware using the FPGA or CPLD. FPGA Figure (C1.16) third control method using Fuzzy logic controller 253