ECEG 350L Electronics I Laboratory Fall 2017

Transcription

1 ECEG 350L Electronics I Laboratory Fall 2017 Lab #2: The Basic Difference Amplifier Introduction A common problem in the design of many communication and monitoring systems is that the cables used to carry signals from one location to another pick up interfering signals and noise radiated by other devices. For example, the output from a medical sensor might be transmitted to a monitor via a cable, but that same cable might also pick up 60 Hz common-mode energy from the clinic s AC wiring and electromagnetic radiation from nearby cell phones. These unwanted signals could corrupt the desired sensor signal, leading to misleading displays on the monitor. In this two-week lab exercise you will build a difference amplifier using the 741 op-amp and investigate its ability to amplify differential-mode signals while at the same time rejecting common-mode signals. Group assignments are listed at the end of this handout. Theoretical Background A circuit diagram of a simple difference amplifier is shown in Figure 1. The circuit amplifies the difference in the voltage values between inputs v1 and v2, giving the amplifier its name. 2 v1 v2 1 3 v VPOS VNEG vo 4 Figure 1. A simple difference amplifier. The nodes marked VPOS and VNEG are the connections to the positive and negative power supplies, respectively. The small triangle represents a connection to the ground node. Power supply bypass capacitors are not included in the figure but should be added to the actual circuit. The analysis of the circuit is most easily accomplished using the principle of superposition and leads to an expression for the output voltage given by v o 2 4 = 2 1 v2 v of 6

2 If the resistor ratios obey the relationship 4/3 = 2/1, then the output voltage expression reduces to 2 v o = ( v2 v1 ). This ideal result depends on a perfect match between the two resistor ratios, a condition that cannot be achieved in practice with fixed resistors. 1 As we have seen in the lectures, difference amplifiers are widely used to boost signals arriving via long cables that are susceptible to common-mode noise pick-up. Analysis of the circuit is therefore aided by defining the differential and common-mode input signals as v Id = v 2 v 1 and v 1 v v 2 Icm 2 =. Solving these equations for v1 and v2 yields the equivalent relationships v1 = v Icm 0. 5v Id and v2 = v Icm 0. 5vId. The latter set of expressions suggests a way to model the differential and common-mode voltages applied to a difference amplifier. Figure 2 shows a commonly used approach. 2 VPOS vicm 0.5vId 0.5vId v1 v v VNEG vo Figure 2. Circuit model of differential-mode and common-mode signals at the inputs of a difference amplifier. The electrolytic capacitors connected to the power supply terminals help eliminate noise that enters the circuit through the power leads. The common-mode signal is modeled as a single voltage source vicm referenced to ground, and the differential-mode signal is modeled as split voltage sources each of value 0.5vId connected across the two input terminals. The common-mode gain can be determined by finding the output voltage with the two 0.5vId sources set to zero (in which case the inputs v1 and v2 are connected together). Similarly, the differential-mode gain can be determined by finding the output voltage 2 of 6

3 with the vicm source set to zero. In the latter case, the connection to ground between the two 0.5vId sources should be preserved. The complete expression for the output voltage in terms of the differential and common-mode input signals is (derived in a separate set of course notes): v o = vodm vocm = vid v Icm, Where vod and vocm are the components of the output voltage due to the differential-mode input voltage and the common-mode input voltage, respectively. If the relationship 4/3 = 2/1 is satisfied exactly, the first coefficient (the differential-mode gain) reduces to 2/1, and the second coefficient (the common-mode gain) reduces to zero. In a practical amplifier, the variations of the resistor values from their nominal values and other imperfections prevent perfect cancellation of the common-mode voltages. Design Specifications Your assignment is to design, build, and test a difference amplifier like the one shown in Figure 2 that meets the following specifications: differential-mode gain (vod/vid): Ad = 8 V/V differential-mode input resistance: id = 60 kω Power supply voltages: not critical, but at least ±12 V to avoid clipping Input bias current effects and input offset voltage effect minimized as much as possible You should also connect 10 µf electrolytic capacitors between the op-amp s power supply pins and ground to suppress noise pick-up through that path. (Watch the polarities!) The use of power supply bypass capacitors is a good design practice and should be employed in almost all circuits. One required test will be to measure the output voltage of the amplifier when the inputs are driven by a purely common-mode signal. The resulting output voltage should be very low, possibly as low as 1-10 mv. The measurement could be corrupted by the presence of the output offset voltage of the op-amp, so you will need to take steps to minimize it. The combined effect of the input offset voltage and input bias currents can be measured using the test configuration shown in Figure 3. Of course, your particular circuit would include additional components for output offset voltage mitigation. Those components are not shown in Figure 3. Experimental Procedure After the difference amplifier has been assembled and the effects of the input bias currents and input offset voltage eliminated, apply a purely common-mode DC voltage to the amplifier, and determine the common-mode gain (vocm/vicm) from the measured voltage values. Think about what common-mode voltage level will allow you to make the most accurate measurement possible. You may assume that the bench-top power supplies act as ideal voltage sources (i.e., each has nearly zero output resistance). ecord your measurements and calculations. 3 of 6

4 2 1 VPOS vo 3 4 VNEG Figure 3. Test configuration used for measuring the effects of the input offset voltage and input bias currents. Both inputs of the amplifier are shorted to ground. Measure the exact values of resistors 1 through 4, record their values, and determine whether the common-mode gain you measured is consistent with the actual resistance values. That is, calculate the expected common-mode gain using the appropriate information from the Theoretical Background section. ecord your results. If the calculated gain does not match the measured gain relatively closely (within 20-30% or so), double-check your circuit carefully. If you are confident that the circuit is wired correctly, think of possible reasons why the discrepancy might have occurred. Now apply a differential-mode DC input signal to the amplifier and verify that the amplifier has the specified differential-mode gain. As shown in Figure 2, to do this properly you will need to simulate two equivalent voltage sources with the positive terminal of one and the negative terminal of the other connected to ground. You cannot do this using the bench-top power supply because the bipolar part of the supply is being used to supply the operating voltages for the op-amp. However, you should be able to devise a simple circuit to do the job using one or two op-amps and a few resistors. emember to use modest resistor values in the new circuit to avoid output voltage errors due to the input offset voltage and input bias currents, but make the resistors large enough to keep the op-amps output currents within the rated limit. Alternatively, you may use the 6 V power supply as the differential input if you can correctly apply it as a truly floating voltage. ecord your measurements and calculations. Calculate the differential-mode gain (vod/vid) from your measured data, and verify that it is close to the design value. ecord your results. Demonstrate your operating differential-mode and common-mode test configurations to the instructor. Be prepared to explain how you verified that the differential-mode input test circuit is operating properly when applied to the diff amp circuit under test. Also show your calculated and measured differential-mode and common-mode gain values. Next you will demonstrate how matching the resistor ratios 4/3 and 2/1 as closely as possible leads to a significant reduction in the common-mode gain. eplace one of the fixed resistors in the diff amp with a potentiometer with a range that spans the fixed resistor s value. For example, if one of the fixed resistors is 10 kω, then you could replace it with a 4 of 6

5 20 kω potentiometer. Next, set the function generator to produce a sinusoidal voltage in the low audio frequency range (say, around 1 khz) with an appropriate peak amplitude. Apply the sinusoidal voltage to both inputs of the diff amp as if it were a common-mode signal (like vicm in Figure 2). Adjust the potentiometer while monitoring the output voltage of the diff amp on the oscilloscope. (There might be some interaction with your hand due to stray capacitance effects.) Make sure you understand what you observe. When you do, demonstrate your results to the instructor. For your documentation, calculate the common-mode rejection ratio (CM) of the original amplifier (the one with all fixed resistors) using your measured data, and include it in the table you will prepare that will list all of your results. In the table caption, comment on whether or not your results are consistent with the worst-case CM given by CM min 2nom 1 1nom =, 4ε where ε is the resistor tolerance expressed as a fractional quantity, and 1nom and 2nom are the nominal values (i.e., the marked values) of 1 and 2. Express all CM values in db units. Be sure to note whether the measured CM is vastly greater than the worst-case value, and discuss the implications of that observation. Lab Documentation After the lab sessions are over, compile the following items into a single electronic document: a. A table containing your calculated and measured differential-mode and common-mode gain values (and their percentage differences) and the associated CM (in db) in proper type-set form. The table should be prepared using Microsoft Word. b. An appropriate and descriptive caption for the table that includes the calculated worstcase CM and a brief comment on the relationship between it and the measured CM values. Detailed instructions for preparing tables and captions will be added soon to the Lab Documentation Guidelines document, which is available on the Laboratory web page. The documentation must be in MS-Word (*.doc or *.docx) format using 11-point or larger font. The file size must be less than 5 MB. Include your group members names, the course number (ECEG 350), the lab session dates (Sept , 2017), the lab meeting time (1 pm or 3 pm), and the lab number on the first page. A cover sheet is not required. Use the file naming convention described at the lab web site. One copy per group must be submitted via the course Moodle site by the deadline posted on the lab web page. The documentation must be thorough, well organized, clear, legible, concise, and professional in tone and style. It must also exhibit good writing mechanics, spelling, and grammar. All four margins should be at least one inch. Single line spacing is acceptable. Keep a copy of your documentation if you wish to use it to prepare for the next exam. Carefully review the relevant sections in the Lab Documentation Guidelines available at the lab web site. 5 of 6

6 Lab Scores Each group member will receive the same overall score according to the following criteria. Scores will be quantized at the indicated percentage levels following the rubric that will be posted at the lab web site: 0, 15, 30, 45, 55, 60% Demonstration of DC diff-mode and common-mode tests 0, 2, 5, 8, 10% Demonstration/discussion of common-mode gain test with potentiometer 0, 7, 15, 23, 30% Table and caption summarizing measured data If the demonstration is completed after the deadline, a 10% score deduction for every 24 hours or portion thereof that it is late will be applied (not including weekend days). No demonstration credit will be given four or more days after the deadline, but credit for the lab documentation can still be obtained. Lab documentation submitted after the deadline will have a 10% score deduction applied for every 24 hours or portion thereof that it is late (not including weekend days), but credit for successful demonstrations (70% maximum) will be recorded regardless of when the documentation is submitted. Group Assignments The randomly generated groups for this lab exercise are listed below: 1 pm section Vehra-Dhuicque-Chowenhill Qureshi-Alves-Strunk Evans-Bloschichak-Karki omeyn-kyaw 3 pm section Byanjankar-Yang-Nam Tchokouani-Agosta-Fox Diehl-Awe-Tian Ji-B.Chen-Hubal Schmidt-M.Chen David F. Kelley, Bucknell University, Lewisburg, PA of 6