ELEC 351L Electronics II Laboratory Spring 2014

Transcription

1 ELEC 351L Electronics II Laboratory Spring 2014 Lab #5: Amplifier with Specified Frequency Response Introduction The focus of this three-week lab exercise will be to design and build a common-emitter amplifier with a specified lower cut-off frequency and with an upper cut-off frequency that is as high as possible. However, you will also encounter a potential source of measurement error and learn the importance of using appropriate measurement tools for demanding tasks. Furthermore, you will have an opportunity to assemble the amplifier circuit on a printed circuit board fabricated using modern methods, which should give you an appreciation of some of the challenges of prototyping. Lab groups are listed at the end of this handout. Theoretical Background Figure 1 depicts the common-emitter amplifier circuit topology with which you will be working. The BJT type and power supply voltage are specified so that there is some consistency between lab groups. The load is modeled as a resistance R L in parallel with a capacitance C L. The latter might represent the capacitance between a circuit board trace and the ground plane, the input capacitance of a following amplifier stage, or the capacitance of an interconnecting cable (e.g., coaxial cable). In this lab exercise, it includes the capacitance of the test leads connected to the oscilloscope as well. The load resistance R L can represent a physical resistor, the input resistance of a following amplifier, or the equivalent input resistance of a test instrument (like an oscilloscope). V CC = 12 V C CC = 10 µf Function Gen. R sig = 50 Ω v in C i R 1 R C C o v sig + R 2 2N v o R L C L R E C E Figure 1. Common-emitter amplifier with capacitive load. The part of the load represented by R osc and C osc models the combination of a test probe and the input port of an oscilloscope. 1 of 5

2 Experimental Procedure Week 1 Design a common-emitter amplifier like the one shown in Figure 1 to meet the following specifications: BJT type: 2N3904 Power supply voltage: 12 VDC (unipolar) Small-signal voltage gain magnitude (with load): 30 V/V Lower limit of operational frequency range: 100 Hz Upper limit of operational frequency range: as high as possible Maximum output swing above and below quiescent: ±1 V Minimum input resistance: 2 kω The signal source is the function generator, which has an output impedance of 50 Ω. The oscilloscope s input impedance model is indicated next to the jacks corresponding to each input. Note, however, that the test cable adds considerable capacitance in parallel with the equivalent input impedance. The cables with alligator clip leads use RG-58A/U coaxial cable. The high-quality 10 test probes, which you will also be using, have a significantly different model associated with them that you will need to obtain at some point. The quiescent collector current is not specified, nor are there any other restrictions on the bias circuit design. It is up to you to select reasonable component values that satisfy the specifications yet do not exceed the various device ratings and other practical limits. Hint: the quiescent collector voltage V C in this circuit is directly related to the small-signal voltage gain. You might want to derive the relationship before you proceed with your design. Pay close attention to the maximum ratings on the 2N3904 data sheet, such as maximum power dissipation and maximum collector-emitter voltage. Also pay attention to resistor power ratings and capacitor voltage ratings. To suppress noise and prevent oscillations, remember to include bypass capacitor C CC between the power supply lead and ground. Keep these connections relatively short, and pay attention to the capacitor s polarity. You might want to consider making room for an additional capacitor with a value of 0.1 µf or so to place in parallel with the larger bypass capacitor. Parallel capacitors with widely varying values are often used to mitigate problems with noise and/or feedback over wide frequency ranges. You will not have to explain your design choices in your lab documentation, but you should keep very careful and well organized records so that you can refer back to them easily if you have to make changes. 2 of 5

3 Week 2 Finish the design of the amplifier circuit. You may build an early prototype on the breadboard for partial testing and/or simulate the circuit using the Multisim software package. Lay out a printed circuit board on which to assemble the amplifier using ExpressPCB. A template will be provided that outlines the maximum size of the circuit board and includes a few nonstandard trace and pad patterns you will need. A brief tutorial will be provided during the lab session for anyone who is not familiar with the software. Think carefully about how much room each component will require. Make sure there is enough space to solder components, and make sure there is sufficient clearance around the test lead connection points for the alligator clips and oscilloscope lead hooks. It is especially important to make sure that clip leads to do not touch each other or the ground plane. To allow connections to be made to the test equipment, you should form small wire loops on the PC board as shown in Figure 2 at the input and output nodes. You should also provide solder pads for the power leads (the + and sides of V CC ). pad on component side wire loop via with wire passing through PC board substrate copper trace on solder side solder fillets Figure 2. Suggested method for providing wire loop connection points for external test equipment. Week 3 Assemble the amplifier using the printed circuit board you laid out during the previous lab session. Soldering instructions are available on the Laboratory page of the course web site. Be very careful when you install the 2N3904 and the polarized capacitors. Double-check their orientation before soldering. Remember that v sig, R sig, R L, and C L are not physical components mounted on the PC board. They represent the function generator and the oscilloscope. The power supply leads should be made from roughly 1-meter lengths of #20 or #22 insulated wire. Consider twisting the leads together along their lengths to minimize noise pick-up and wire tangles. 3 of 5

4 Apply DC power (but not yet a signal) to the assembled amplifier, and verify by measurement that the quiescent voltages are reasonably close to their design values. Use the function generator and oscilloscope to verify that the amplifier is achieving the target midband gain and lower cut-off frequency. To begin with, use the simple test leads with alligator clips for the connections to the generator and the oscilloscope. If necessary, add an attenuator to the output of the function generator to obtain a sufficiently low amplitude. Capture an oscilloscope screen image of the input and output voltage waveforms being simultaneously displayed. Choose a frequency in the midband region, and adjust the image so that it clearly demonstrates the target midband voltage gain. Compare the measured gain to the estimated gain determined earlier by analysis, and comment on the results in your documentation. Record any relevant additional data such as the frequency of operation. Using the alligator clip-terminated test leads to connect the output of the amplifier to the oscilloscope, determine the upper cut-off (3-dB) frequency of the amplifier by monitoring the gain as you change the operating frequency of the function generator. Try to determine whether the dominant high frequency pole is due to the load capacitance C L or one of the internal BJT capacitances (C π or C µ ). Consult the information on coaxial cable properties available via the link provided on the Laboratory page to help you determine C L. Use the information on the datasheet to determine possible ball-park values for C π and C µ. We do not have the ability to determine their values independently, but you should be able to obtain enough of a bound on their values to obtain a very rough estimate of their associated pole frequencies. Include a summary of your analysis in your documentation. Now use a 10 test probe to connect the output of the amplifier to the oscilloscope. If you can, determine the upper cut-off frequency of the amplifier with the new configuration. The new cut-off frequency might be above the upper limit of the function generator. If that is the case, try to estimate the cut-off frequency, and explain in your summary how you do it. Also discuss whether you think the cut-off frequency is now dominated by the test probe capacitance, one or both of the internal capacitances C π and C µ, or a combination of all three. Provide some analysis (including equations) to back up your conclusion. After you are satisfied that your amplifier is working properly, demonstrate it to the instructor. You must show that the quiescent output voltage, the midband voltage gain, and the lower cut-off frequency are near their target values. You must also demonstrate the highfrequency performance of the amplifier with both types of test leads. The deadline for the demonstration is 5:00 pm on Tuesday, April 29 (the last day of classes). Lab Documentation Compile the following items into a single document: Analysis of upper cut-off frequencies obtained when alligator-clip test leads and 10 test leads are used to make measurements. Properly labeled and captioned screen capture of input/output waveforms. 4 of 5

5 Interpretation of results and discussion of implications and observations. Try to explain any significant discrepancies between your calculated and measured data. The discussion should include reflections on your unique design/assembly/test experience and address points of interest not obvious to the reader. Do not simply repeat points that have been made in lecture and/or lab sessions. Focus specifically on your experience. The documentation must be in MS-Word (*.doc or *.docx) format, and one copy per group must be submitted via the course Moodle site by 11:59 pm on Tuesday, April 29. The text section, including supporting figures but not necessarily including the screen capture, should be no longer than two pages, and the file size must be less than 5 MB. Formal introductory and concluding sections are not required, but the documentation should be well organized and include the group members names, the course number (ELEC 351), the submission date, and the lab number. Documentation will not be graded directly for writing mechanics, spelling, and grammar, but it must be clear and legible. Figures and equations may be neatly hand-drawn/written, scanned, or photographed and inserted into the MS-Word document. Minimize the file size by using appropriate camera or scanner settings (e.g., black & white and 300 dpi for scanning). Keep a copy of your documentation if you wish to use it to prepare for the next exam. Grading Each group member will receive the same grade based on the following criteria. Scores will be quantized at the indicated percentage levels. 0, 10, 20, 30% ExpressPCB layout of circuit 0, 10, 20, 30, 40% Demonstration of properly operating circuit 0, 2, 5, 8, and 10% each Bulleted items listed in the Lab Documentation section Since all required work except final exams and papers must be completed by the end of the semester, no partial credit will be given for late demonstrations or lab documentation. Group Assignments The randomly generated groups for this lab exercise are listed below: Bekampis-MacGibbon Goesseringer-Brown Hough-Hontz Bennett-Opalinski Ononuju-Hecht-Kwiatkowski David F. Kelley, Bucknell University, Lewisburg, PA of 5