ECEG 350L Electronics I Laboratory Fall 2017

Transcription

1 ECEG 350L Electronics I Laboratory Fall 2017 Introduction Lab #4: Regulated DC Power Supply A simple DC power supply can be designed using only a transformer, a rectifier, and a filter capacitor. However, the average output voltage might not be stable because of line voltage fluctuations, and the output voltage ripple is significant unless a very large filter capacitor is used. Moreover, transformers are not available with a wide variety of secondary voltage options, especially in the very low voltages (e.g., 3.3 V, 1.8 V, or even lower) required by many modern electronic circuits. When a stable low voltage power supply with minimal ripple is required, the most common approach is to use a voltage regulator circuit. A wide variety of integrated circuits and more sophisticated circuits are available for this task, but in less demanding situations, zener diodes can often serve the purpose. In this three-week lab exercise, you will design, assemble, and test a power supply with a zener diode-based regulator. Group assignments are listed at the end of this handout. Theoretical Background Consult the supplemental notes on The Zener Diode as a Voltage Regulator, available at the course Moodle site, for a discussion of the background material you will need to complete the design task that is the focus of this lab exercise. Design Specifications STOP! Before proceeding, please read and understand the following two very important warnings. If they are not clear to you, please discuss them with the instructor or TA. Warning #1: Do not attempt to measure both vsec and vo in Figure 1 with the oscilloscope at the same time. If you try to do this, the ground leads will create a short across diode D4 that will most likely lead to the destruction of diode D1. You should trace the circuit connections in Figure 1 and understand how this can happen before proceeding. Warning #2: Electrolytic capacitors are polarized. Failure to pay attention to their polarity could result in their spectacular destruction, an unpleasant smell for everyone nearby, and possible personal injury. The marking on an electrolytic capacitor s package usually indicates its negative terminal. Look for a thick sign, and interpret chevrons (angled lines) as arrows. Design a regulated power supply like the one shown in Figure 1 using one of the supplied transformer boxes. For safety reasons, the transformer is enclosed in a box with a power cord and a circuit breaker. As shown in Figure 2, there are three jacks on the box that are connected to the secondary winding. The two red jacks connect to the ends of the secondary winding, and the green jack connects to a center tap. You will need to determine which pair of jacks to use by measuring the available voltages. Be aware that the waveform might not be perfectly sinusoidal. Power line noise caused by computer power supplies and heavy equipment in the vicinity of the lab lead to the presence of significant harmonics in the local line voltage. 1 of 5

2 The power supply must meet the following specifications: 1. DC output voltage: approximately 9 V 2. Maximum load current: 50 ma 3. Rectifier diode type: 1N4001 or 1N4007 (data sheet available on lab page) 4. Bleeder resistance Rb: should discharge the capacitor to 5% of its maximum voltage within 5 sec after the power supply is turned off but without loading down the rectifier significantly when the power supply is on (i.e., it should not add significantly to iz il). Note that if there is no load connected (i.e., if RL ), then without Rb there would be no current path available to discharge the capacitor after vc drops below the zener diode s reverse breakdown voltage VZ. 5. All diodes and resistors must be capable of dissipating the maximum expected time average power. This requirement includes any resistors used to simulate the load RL for testing purposes. It might be necessary to estimate the average values of the currents is and/or iz. If so, make sure your estimates are reasonable for the worst cases expected. Apply a 2 safety factor. You may combine resistors in series or parallel for the purpose of meeting power dissipation requirements. 6. The filter capacitor C must be large enough for reliable operation at maximum load current but not excessively large. You may combine capacitors in series and/or parallel if single units with sufficient capacitance are not available. Keep in mind that the tolerance of electrolytic capacitors is typically 20-40% and that electrolytic capacitors are bulky and relatively expensive. Your filter capacitor network (and its complexity) should be consistent with that tolerance range. A design that uses an excessive number of capacitors in an effort to achieve an exact capacitance value or an unnecessarily small ripple on voltage vc will be viewed unfavorably! D1 D2 120 V rms vsec 60 Hz D4 D3 vc C ic is Rb RS iz D5 il RL vo Figure 1. Full-wave bridge rectifier circuit with filter capacitor and zener diode voltage regulator. Resistor Rb is a bleeder resistor that ensures capacitor C quickly discharges when the power is shut off, even if the load is an open circuit. to circuit breaker and power cord connected to 120 V rms AC red jack Figure 2. Connections to transformer inside its enclosure. green jack red jack 0.5vred-red 0.5vred-red vred-red 2 of 5

3 Recommendations and hints: 1. Check the peak voltage of the transformer s secondary (end-to-end and center-to-end). 2. The capacitor will discharge to the zener voltage VZ quickly even without the bleeder resistor Rb in place. (Do you know why?) Select the value of Rb to discharge C the rest of the way to zero volts within a few seconds. 3. Measure or look up the turn-on voltage of the rectifier diodes you use. Consult the appropriate plot in the data sheet. Data sheets for standard pn-junction and zener diodes are available via links on the Laboratory web page. Remember that the peak rectifier diode current is many times greater than the load current. Experimental Procedure Assemble the power supply circuit you have designed, and devise a way to test whether it is working correctly at full rated output current. A successful test includes ensuring that none of the components overheats and that the capacitor discharges within the specified period of time through the bleeder resistor. The output voltage should have only a tiny amount of ripple (maybe mv at full output current) with no large dips. Once you are confident that your circuit is meeting all specifications, demonstrate the following to the instructor: o Calculations used to ensure all components have sufficient power ratings o Oscilloscope image of output voltage waveform at full rated current o No-load discharge of filter capacitor within 5 sec after turning off AC supply At the end of the demonstration, your circuit will be used to supply power to a speaker/amplifier connected to a music source. With the power supply delivering its maximum rated load current, capture an oscilloscope screen image of the output waveform vo. You will probably have to adjust the oscilloscope s settings in order to observe the tiny ripple voltage. The captured image should include as many of the relevant oscilloscope settings (such as V/div for the vertical axis and sec/div for the horizontal axis) as possible. Instructions for capturing screen images will be made available via the Laboratory page at the course web site. In your lab documentation you will add a caption to the screen image to explain its significance. Measure and record the DC output voltage obtained when the supply provides 0%, 25%, 50%, 75%, and 100% of the maximum rated load current. Use the bench-top voltmeter in order to obtain measurements with several digits of accuracy. All of the measured values should be slightly different. In your lab documentation you will present your measured data in a table and add a caption to explain your observations. 3 of 5

4 Lab Documentation After the lab sessions are over, compile the following items into a single Microsoft Word document: a. Captured oscilloscope image of the output voltage waveform that clearly shows its shape and includes the relevant oscilloscope settings. b. An appropriate and descriptive caption for the screen image that clearly but briefly explains the shape of the output voltage waveform. The caption should include any important oscilloscope settings or other parameter values that are not obvious in the screen image. It should also include a brief comment (one or two sentences) on the significance of the image and how it provides clues regarding the practical limitation(s) of the regulator. c. A table containing your measured DC output voltage data. The table must be prepared using Microsoft Word. d. An appropriate and descriptive caption for the table that includes an explanation of why the DC output voltage changes as the load current varies. It should include a brief calculation of the load regulation of the circuit, and the result should be related to the incremental resistance of the zener diode operating in the reverse-breakdown region. The documentation must be in MS-Word (*.doc or *.docx) format using 11-point or larger font. The length of the text in each caption must not exceed 170 words, and the total document file size must not exceed 5 MB. Include your group members names, the course number (ECEG 350), the lab session dates (Oct , 2017), the lab meeting time (1 pm or 3 pm), and the lab number on the first page. A cover sheet is not required. Use the file naming convention described at the lab web site. One copy per group must be submitted via the course Moodle site by the deadline posted on the Laboratory page at the course web site. The documentation must be thorough, well organized, clear, legible, concise, and professional in tone and style. It must also exhibit good writing mechanics, spelling, and grammar. All four margins should be at least one inch. Single line spacing is acceptable. Keep a copy of your documentation if you wish to use it to prepare for the next exam. Carefully review the relevant sections in the Lab Documentation Guidelines available at the lab web site. Lab Scores Each group member will receive the same overall score according to the following criteria. Scores will be quantized at the indicated percentage levels following the rubric posted at the lab web site: 0, 15, 30, 45, 55, 60% Demonstration of power supply that meets specifications 0, 2, 5, 8, 10% each Items a through d listed in the Lab Documentation section If the demonstration is completed after the deadline, a 10% score deduction for every 24 hours or portion thereof that it is late will be applied (not including weekend days). No demonstration credit will be given four or more days after the deadline, but credit for the lab documentation can still be obtained. 4 of 5

5 Lab documentation submitted after the deadline will have a 10% score deduction applied for every 24 hours or portion thereof that it is late (not including weekend days), but credit for a successful demonstration (60% maximum) will be recorded regardless of when the documentation is submitted. Group Assignments The randomly generated groups for this lab exercise are listed below: 1 pm section Bloschichak-Karki-Qureshi Kyaw-Strunk-Chowenhill Romeyn-Dhuicque-Evans Vehra-Alves 3 pm section Fox-Ji-Nam Diehl-Hubal-Tchokouani Agosta-M.Chen-Schmidt B.Chen-Tian-Byanjankar Awe-Yang David F. Kelley, Bucknell University, Lewisburg, PA of 5