Experiment E7 DC Power Supply Worst-Case Design for Half-Wave Rectifier Circuit James J. Whalen Fall 2000

Transcription

1 Experiment E7 DC Power Supply Worst-Case Design for Half-Wave Rectifier Circuit James J. Whalen Fall 2000 Experiment No. 7 DC Power Supply (Half-Wave Rectifier Circuit) provides an opportunity to perform a worst-case design. Since design is the distinguishing characteristic of the engineering profession, ABET recommends the teaching of design at every opportunity. Unfortunately, there is no easy way to teach design. Design, by its very nature, requires iteration. Usually, several designs are necessary. The design values given in the Lecture Slides for EE 312 & EE 352 in Fall 1999 are but a first step. The initial power supply design might not perform well for a +10% & -10% variation in ac voltage and a 100% variation in dc load current. The Zener Diode could burn up at 110% ac voltage when the load resistor is removed. That is not good. The Zener Diode could cut off at 90% ac voltage when the load resistor connected. That is not good. A second design was done in Fall 1999 to deal with these problems. The design procedure developed is called a worstcase design. Important Design Rules 1. Avoid destroying the Zener diode. 2. The design must work for any Zener Diode with V Z = 12 V " 10%. 3. The design must work with the load resistor connected or disconnected. 4. The design must work for an isolation transformer rms ac output voltage = 18 VAC " 10%. 5. The design must work for resistors with a " 10% tolerance. 6. The best design would have the best combination of the following factors: A. The highest allowable value of dc load current at 100% ac voltage. B. Low peak-to-peak ripple voltage under all conditions of load variation and ac voltage variation. C. Small change in dc load voltage under all conditions of load variation and ac voltage variation.

2 Procedure 1. Design the dc power supply and enter your design in your lab notebook. Be as complete as possible. Include the circuit schematic, design equations, and design values. Note that the circuit schematic for a half-wave rectifier circuit is given in the References. 2. In your lab notebook create a table of design values that includes values for the following components: R L, R F, R S, C I, & C F. You will be required to show your table to the Staff before you are allowed to assemble the dc power supply. You may be required to explain some aspects of your design if your design values seem unreasonable. 3. Assemble the entire dc power supply and test it as an assembly. Note that this procedure is different from the procedure used previously in Exp. No. 8 in which the dc power supply was assembled and tested section by section. 4. Test the entire dc power supply at 100% ac voltage (18 VAC) with the load resistor connected. Measure the dc voltages and ac peak-to-peak ripple voltages at the nodes 1, 2 & 3 in Figure 1. Demonstrate to Staff your results. Staff must witness all six values of voltages and sign off on each in a space below the entry. Staff must also check and initial calculations for I Z + I L, I Z, & + I L. 5. Repeat Step 4 with load resistor removed. No demonstration required. 6. Repeat Step 4 at 90% ac voltage (16.2 VAC) with the load resistor connected. Staff must witness dc voltage and ac peak-to-peak ripple voltage at the node 3 and sign off on each in a space below the entry. Staff must also check and initial calculations for I Z + I L, I Z, & + I L. Is the Zener Diode cutoff? 7. Repeat Step 4 at 90% ac voltage with the load resistor removed. No demonstration required. 8. Repeat Step 4 at 110% ac voltage (19.8 VAC) with the load resistor connected. No demonstration required. 9. Repeat Step 4 at 110% ac voltage with the load resistor removed. Staff must witness dc voltage and ac peak-to-peak ripple voltage at the node 3 and sign off on each in a space below the entry. Staff must also check and initial calculations for I Z + I L, I Z, & + I L. Is the Zener Diode maximum current rating exceeded? 10. Enter your result from Steps 4-9 in a TABLE: DC & AC RIPPLE VOLTAGES

3 11. Also enter in the table the percent dc load voltage regulation. The percent dc load voltage regulation is calculated using the dc load voltage obtained in Step 4 as the standard and using the following equation: Load Regulation = {V L (Step N)) - V L (Step 4)} ) V L (Step 4) X 100% where N = 5 to Summarize in 250 words or less the important results. 13. Submit the copies of your lab notebook pages and any PSPICE or ELECTRONIC WORKBENCH simulations done in support of the design done prior to the lab. Zener Diode Information 1N4742 Maximum Ratings DC Power Dissipation Derating Factor Junction Temperature 1 Watt 6.67 mw per degree C 200 degree C Electrical Characteristics at 25 C Nominal Zener Voltage V I ZT Test Current I ZT Max Zener Impedance Z I ZT 12 V 21 ma 9 ohms Test Current I ZK Max Zener Impedance Z I ZK Max Reverse Leakage Current I R 0.25 ma 700 ohms 5 V R = 9.1 V Max DC Zener Current IZM 76 ma

4 Additional Design Information TABLE 1 VALUES OF DC VOLTAGES AT NODES 1-3 AS A FUNCTION OF VAC % VAC (rms) Peak Rectifier Diode V1(dc) 0.9 X (Peak V3(dc) " 10% V1(dc)- V3(dc) Voltage - 0.7) V V V V V V " " " " " "1.2 Important Design Considerations 1. If the load resistor is removed, all the dc current must flow through the Zener Diode. That current must not exceed I ZM = 76 ma. The worst case is at 110% ac voltage. The dc voltage drop across the resistors R F + R S is then given by V1(dc) - V3(dc) = (R F + R S ) X I Z. The worst case occurs at 110% ac voltage where V1 (dc) - V3 (dc) has a maximum value given by max {V1 (dc)- V3 (dc)} = = 13.8 V. To limit the dc current that flows through the Zener Diode to a value less than I ZM = 76 ma, the value for (R F + R S ) must exceed a minimum value for R F + R S given by Min {R F + R S } = max {V1 (dc)- V3 (dc)} ) I ZM = 13.8 V/76mA = kohm Min {R F + R S } = 13.8 V/76mA = kohm

5 If we allow for a 10% tolerance on the resistors, then Min {R F + R S } = kohm + 10% X kohm = kohm Min {R F + R S } = kohm The nominal values available include 100 ohms. Thus an available choice is R F = R S = kohm = 100 ohm 2. Another important consideration is that the dc current through the Zener Diode must not fall below some minimum value I Zmin. The worst case occurs at 90% ac voltage with the load resistor connected. The voltage V1(dc)- V3(dc) has a minimum value min{v1(dc)- V3(dc)} = = 6.8 V. The current through R F + R S is a minimum and is given by Min {IZ + I LOAD } = min {V1 (dc)- V3 (dc)} ) (R F + R S ) Min {IZ + I LOAD } = 6.8V ) 0.200k = 34 ma 3. A value for I Z = 0.25 ma where the Max Zener Impedance Z ZT = 700 ohms is obviously too low. The dc voltage regulation will be poor, and the ac peak-to-peak ripple voltage will be high. As an initial design decision a value for I Zmin = 0.5 X I ZT = 0.5 X 21 ma = 10.5 ma is selected. I Zmin = 10.5 ma It should be noted that no design decision is final. The value selected for I Zmin can be changed in a subsequent design.

6 4. The value for the load current I LOAD can be determined from I LOAD = min {IZ + I LOAD } - I Zmin I LOAD = 34 ma ma = 23.5 ma I LOAD = 23.5 ma 5. The value for the load resistor R L can be determined from R L = V Z ) I LOAD R L = 12V ) 23.5mA = kohm R L = 511 ohm The variable resistor available for R L should be set at 511 ohms. Use the DMM. 6. The resistors available have nominal values as given the Appendix. 7. The capacitors available have values 200 :F, 100 :F, and 50 :F. 8. Initially the 200 :F capacitor & 50 :F capacitor are connected in parallel for the capacitor C I in Figure 1, i. e. the capacitor C I = 250 :F. C I = 250 :F = mf 9. The maximum droop )V across the capacitor across C I in Figure 1 can be estimated. See figure? in Lecture Slides. Using the expression Q = CV where Q is the charge on a capacitor C and V the across the capacitor, the droop )V can be calculated from

7 )V = )Q/C = I)t/C where I = I Z + I LOAD is the discharge current for the capacitor. The worst case droop would be obtained where I = I Z + I LOAD has a maximum value max{i Z + I LOAD }. Since the value for the sum of the resistors (R F + R S ) was chosen to limit the value of the current through them to a value I Z + I LOAD # I ZM = 76 ma, the maximum value for I is I ZM = 76 ma. The maximum droop max{)v} is given by Max {)V} = I ZM /60C Max {)V} = 76mA /(60 X 0.250mF) = 5.1 V where )t has been set equal to 1/f where f = 60 Hz. Actually, as shown in the Lecture slides, the value for )t will be less than 1/f. For example, for )V/V = 0.8 (20% droop), the value for )t is given by )t = 0.9/f. Thus the maximum droop calculated with the equations above would be overestimated by 10%. The filter capacitor also contributes charge to the current that flows through the Zener diode and the R L. If the value of the filter capacitor C F = 100 :F = mf is added to the value of C F = 250 :F = mf, the value obtained is C F + C I = 250 :F :F = 350 :F = 0.35 mf If the value C F + C I = 0.35 mf is used to calculate the droop, the droop value is given by Max {)V} = 76mA /(60 X 0.350mF) = 3.6 V Which value is the better choice: 5.1 V or 3.6 V? That is a question best answered using PSPICE. Since the capacitors have 20% tolerance, the droop calculated or predicted using PSPICE could differ from that measured by 20%.

8 10. The final design decision that must be made is how to divide the sum of the resistors (R F + R S ). The filter capacitor C F and the filter resistor R F form a low pass RC filter and cause a reduction in the ac voltage between the input at node 1 and the output at node 2. The reduction in the ratio V2/V1 for a sinusoidal signal at frequency f is given by V2/V1 = 1/{1 + (R F 2AfC F ) 2 } 0.5 One of the value used for f can be f = 60 Hz. Harmonics at 120 Hz and higher are also present. They harmonics will be attenuated more. Previously, an initial assignment R F = 100 ohms was made. Using R F = 100 ohms, C F = 100 :F, & f = 60 Hz, the value for V2/V1 is given by V2/V1 = 1/{1 + (100X2AX60X100:) 2 } 0.5 = Since the harmonics are attenuated even more, the variation in voltage across C F will be even less then times the variation in voltage across C I. Again this is a question best answered using PSPICE. 11. The Zener diode also causes a reduction in the ac voltage between the input at node 2 and the output at node 3.. The reduction in the ratio V3/V2 is given by V3/V2 = {R L *r d } ) {R S + R L *r d } where r d is the dynamic resistance of the Zener Diode. In E6 Dynamic Impedance a value r d = 5.6 ohms at I Z = 10 ma was measured. Using R S = 100 ohms and R L *r d = 511*5.6 = 5.5, the value for V3/V2 is given by V3/V2 = 5.5 ) { } = Thus the ac voltage at V3 should be more than an order of magnitude less than that at V2. Usually, voltage at V3 is a few mv. Averaging and manual adjustments of the cursors are the best experimental techniques to use to measure voltage at V3.

9 12. The ac voltage at V3 can be now be estimated. Multiple the results obtained for the droop in V1 and the voltage ratios V3/V2 & V2/V1. The results are V3 pp = 5.1V X X = V = 67 mv V3 pp = 3.6V X X = V = 48 mv These results are much larger than that observed.. Again this is a question best answered using PSPICE. 13. The division of the sum of the resistors (R F + R S ) should have as its goal making the overall reduction in the ac voltage large by making the product of the two voltage expressions small. That is make V3/V1 small where V3/V1 is given by V3/V1 = 1/{1 + (R F 2AfC F ) 2 } 0.5 X {R L *r d } ) {R S + R L *r d } The values for R F & R S are limited to what is available on the Heathkit Resistance Substitution Boxes. There are not too many combinations to test. It is recommended that neither R F nor R S be set equal to zero. Remember that R F + R S must exceed the minimum value calculated previously to prevent zapping the Zener Diode. The first set of values recommended for E7 may be summarized as follows: R F = R S = kohm = 100 ohm R L = 511 ohm C I = 250 :F C F = 100 :F

10 TABLE 2 DATA FOR DC POWER SUPPLY WITH FULL-WAVE RECTIFIER The Fluke 8000A DMM was used to measure V T. The HP54600B CRO was used to measure V1(avg), V1(pp), V2(avg), V2(pp), and V3(pp). The Fluke 8010A DMM was used to measure the dc load voltage V3(avg). The load current I L was calculated using I L = V3(avg)/R L. The current I L + I Z was calculated using I L + I Z = {V3(avg) - V1(avg)} {R F + R S }. The Zener Diode current was calculated using I Z = I L + I Z I L. TABLE 2 DATA FOR DC POWER SUPPLY WITH FULL-WAVE RECTIFIER C = R L CONNECTED & NC = R L NOT CONNECTED X DENOTES INITIALS REQUIRED % V T R L V1 V1 V2 V2 V3 V3 I L I L +I Z I Z VAC rms avg pp avg pp avg pp V Ω V V V V V V ma ma ma C Staff Must Initial X X X X X X X X X NC C X X X X X C NC X X X X X

11 PSPICE (or ELECTRONIC WORKBENCH) SIMULATION: Week 2 During the second week a PSPICE EXAM on the dc power supply circuit will be conducted. PSPICE will be used to simulate the half-wave rectifier dc power supply circuit and to determine values for all the voltages and currents measured. The 50 :F capacitor was connected in parallel with the 200 :F. However, it may be that a better dc power supply results by connecting the 50 :F capacitor in parallel with the 100 :F capacitor and using the parallel combination as the filter capacitor C F. This is one of the alternative designs that can be checked using PSPICE. Other alternative designs compatible with the worstcase design procedure such as using 150 ohms & 47 ohms for R F & R S can also be checked. References: 1. Sedra/Smith, Microelectronics Circuits, 4 th ed. New York: Oxford University Press, 1998, Section 3.7 Rectifier Circuits, pp EE 352 Fall 1999 Lecture Slides on Experiment No. 8 DC Power Supply 3. EE 312 Fall 2000 Lecture Slides on Experiment No. 7 DC Power Supply

12 Appendix: Resistance Values Available There are 29 Heathkit boxes that are available. The Heathkit resistance substitution box resister choices are: Low value: 15, 22, 33, 47, 68, 100, 150, 220, 330, 470, 680, 1k, 1.5k, 2.2k, 3.3k, 4.7k 6.8k 10k A different resistance box is used to augment the 29 Heathkit boxes (20 boxes are available). Low Values: 10, 47, 100, 220, 470, 1k, 2.2, 3.3k, 4.7k 6.8k 10k