Embedded inductor design and electromagnetic compatibility issues

Transcription

1 Embedded inductor design and electromagnetic compatibility issues J. Kundrata, D.Bandic and A. Baric University of Zagreb IMOLA Final Workshop Slide 1/22

2 Outline Design challenges Planar inductor designs Layer stack up designs Inductor design in geometrical parameter space Electrical inductor modelling The electromagnetic compatibility of lighting equipment Multi-coil inductor designs EMC of the ibackplane Conclusion Slide 2/22

3 Design challenges OLED module geometry The foil geometry requires a planar inductor structure The OLED tile limits the available inductor area The maximum inductance is determined by the inductor area The OLED cathode is a conductive plane in proximity to the inductor It represents a GND plane mirroring the inductor currents EXAMPLE OLED SIZE 30 x 30 mm2 Slide 3/22

4 Design challenges Inductor requirements The driver chip characteristics Operating frequency 10 MHz Input voltage 40 V Output voltage 7,4 V Output current 340 ma Electrical π-network model The inductor requirements Inductance 3 5 µh Resistance < 1 Ω Port capacitance < 50 pf Resonant frequency > 50 MHz Slide 4/22

5 Design challenges Inductor radiation The EM field of a loop antenna The inductor is basically a loop antenna driven by triangular waveform currents The OLED cathode mirrors the antenna currents Slide 5/22

6 Design challenges Inductor array radiation The EM field of a matrix of OLED cells: The radiated disturbance The relation of neighboring cells phases The influence of geometrical differences (substrate thickness, cell spacing etc.) Slide 6/22

7 Planar inductor designs (I) Single layer design (reference) Double layer - series design: Top and bottom inductors in series: Resistance doubled w.r.t. reference Inductance increases 3-4 times Standard version: Resonant frequency decreases 3-4 times Alternating version: Each top and bottom winding in series Resonant frequency halved Slide 7/22

8 Planar inductor designs (II) Double layer - parallel design: Top and bottom inductors in parallel Resistance halved w.r.t. reference Parallel double-layer inductor design: Halves the resistance doubles the quality factor Series double-layer inductor design: Increases the inductance at the expense of resonant frequency and resistance Slide 8/22

9 Layer stack up design (I) Ferrite Polymer Compound FPC Layer of ferrite granules (D ~ 10 µm) and polymer filler compound Applicable ferrite materials: NiZn, MnZn, CoZrO, CoNiFe, Fe/SiO2 compounds Brandon et al., 2003 Backplane (and planar inductor) is sandwiched between two FPC layers FPC layers shield the inductor from OLED cathode and localize its magnetic field Slide 9/22

10 Layer stack up design (II) FPC OLED cathode FPC REL. INCREASE IN INTERPORT INDUCTANCE REL. INCREASE IN PORT CAPACITANCE Slide 10/22

11 Inductor design in geom. parameter space (I) The modelling workflow: 1. Rectangular grid in w-s-r space 2. Identifying the basic mathematical relationships 3. Mathematical modelling 4. Modelling analysis in DC-DC converter specific context Slide 11/22

12 Inductor design in geom. parameter space (II) Modelling results: high Q Q max C 3,min f r,min limit low C 3 low C 3 C 3,min Slide 12/22

13 Electrical inductor modelling (I) Simple π-network models Interport resistance Interport inductance Port capacitances Expanded π-network models Interport resistance Interport inductance Port capacitances + Resonant behavior Skin effect Slide 13/22

14 Electrical inductor modelling (II) Simple π-model Interport resistance Interport inductance Expanded π-model Slide 14/22

15 The EMC of lighting equipment (I) The EMC standard CISPR 15: Limits and Methods of Measurement of Radio Disturbance Characteristics of Electrical Lighting and Similar Equipment Radiated disturbance limits in the frequency range 9 khz to 30 MHz Large Loop Antenna measurements Radiated disturbance limits in the frequency range 30 MHz to 300 MHz Conducted disturbance limits in the frequency range 30 MHz to 300 MHz Dipole antenna measurements Can be replaced by Coupling-Decoupling Network measurements Slide 15/22

16 The EMC of lighting equipment (II) Radiated disturbance in f = [300 khz, 30 MHz] Large Loop Antenna (LLA) system three perpendicular loop antennas D = 2 m Conducted disturbances in f = [30 MHz, 300 MHz] Coupling-Decoupling (CDNE) Network three-port filter that decouples the conducted RF disturbance from the external power supply and couples it to the measurement port Slide 16/22

17 Multi-coil inductor designs (II) The sub-coils are anti-symmetrically driven SINGLE-SUBCOIL 1L DESIGN DOUBLE-SUBCOIL 2L DESIGN ΔI LLA -20 db Slide 17/22

18 EMC measurements - LLA Example measurements on ibackplane: 2,2 MHz OLED driver Planar inductor 1L and 2L double-layer parallel design SINGLE-SUBCOIL 1L DESIGN z-axis DOUBLE-SUBCOIL 2L DESIGN Slide 18/22

19 EMC measurements - CDN SINGLE-SUBCOIL 1L DESIGN DOUBLE-SUBCOIL 2L DESIGN AFTER POWER SUPPLY Slide 19/22

20 Conclusion Embedded inductor design The foil structure of the IMOLA concept substantially restricts the inductor design options The foil structure implies a planar inductor structure and the OLED tile size limits the maximum available inductor area The OLED cathode degrades the inductor inductance The DC-DC converter sets a number of inductor requirements Besides the single layer inductor designs, numerous double layer designs are available with differing electrical properties Application of ferrite to layer stack up can shield the inductor from the OLED cathode A procedure for inductor design in geometrical parameter space is presented A simple and an expanded π-models are presented Slide 20/22

21 Conclusion EMC issues The CISPR 15 sets the limits on the radiated and the conducted disturbance of the lighting equipment The Large Loop Antenna and the Coupling-decoupling network measurements cover the entirety of OLED module EMC tests The multi-coil inductor designs are more EMC-friendly than the single-coil inductor designs An OLED matrix with neighboring tiles inductors wound antisymetrically has the best performance w.r.t. EMC Slide 21/22

22 Thanks! Slide 22/22