Course Introduction. Content 15 pages. Learning Time 30 minutes

Transcription

1 Course Introduction Purpose This course discusses techniques for analyzing and eliminating noise in microcontroller (MCU) and microprocessor (MPU) based embedded systems. Objectives Learn about how packaging affects efforts to reduce EMI. Understand the necessity for carefully designed decoupling capacitors, such as three-pin teed-through types. Find out how to evaluate EMI countermeasures. Discover the best way to implement EMI reduction techniques. Content 15 pages Learning Time 30 minutes

2 Reducing EMI EMI reduction is a goal shared by both the semiconductor experts who design MPUs and other LSI devices and by the engineers who apply those chips in embedded systems Page 2 Delete the thin line through the illustration Anechoic chamber Balun CISPR 25 Core ECU EMI Harness LISN Power supply TEM Cell WBFC Electronic Control Unit Electromagnetic Interference Explanation of Terms A room designed to block radiation from the outside and to minimize reflections off the room s walls, ceiling, and floor A passive electronic device that converts between balanced and unbalanced electrical signals International Special Committee on Radio Interference (CISPR) publication 25: Limits and methods of measuring radio disturbance characteristics for the protection of receivers on board vehicles. CISPR is a sub-committee of the International Electrotechnical Commission (IEC). A microcontroller chip is composed of a core, I/O ports, and power supply circuitry. The core consists of the CPU, ROM, RAM, and blocks implementing timers, communication, and analog functions. Cables (wires) connecting a board and power supply or connecting one unit in a system to another Line Impedance Stabilization Network Two power supplies are applied to the LSI: Vcc and Vss. The core power supply internal to the LSI is VCL (internal step-down). The Vss-based power supply routed through the LSI is VSL. Transverse Electromagnetic Cell Workbench Faraday Cage

3 Supply Decoupling Basics Design goal for EMI reduction: Increase current supply from decoupling capacitor (Cdc, loop B) and decrease current from main power supply (loop A) as much as possible - Current ratio A/B is determined by the impedance ratio: If possible, this ratio should be <1/100 (-40dB) Loop B Loop A A C C = A + B loop A Ferrite bead (L1) B Decoupling capacitor (Cdc) loop B CPG Module Package Chip Measuring point Two methods for reducing EMI: Increase loop-a impedance by inserting ferrite bead in loop Decrease impedance of loop by decreasing its inductance - Make the loop area as small as possible to minimize its inductance - Use feed-through capacitors because they have intrinsic impedances less than 1/10th those of conventional SMD ceramic capacitors

4 BGAs and CSPs Save Board Space Smaller chip packages allow products to become more compact and convenient, but complicate design efforts to place decoupling capacitors where they will be most effective for reducing EMI QFP BGA CSP WLP 28 mm FBGA (Fine-pitch BGA) Typical Die size 2828: 208pins (256 pins/0.4 mm) 2727: 256 pins 1313: 240 pins 1111: 256 pins

5 Decoupling Capacitors for BGAs Finding sufficient mounting space can be a problem! 27mm BGA Top of circuit board for mounting a BGA Bottom side showing placement of bypass caps

6 Low-ESL Bypass Capacitors Page 6 Problems with Narration Three-pin SMD feed-through capacitors provide very good connections - No extra paths, so 100% of supply current is fed through 3-pin feed-through capacitor* Design alternative: IDC-type Multi-pin capacitor IDC-type capacitor achieves achieves low low supply impedance VCPU *Source: Murata Manufacturing

7 Evaluation of Supply Decoupling Area under device showing pads for decoupling capacitors Page 7 Slide Changed (Text moved to left, away from top photo.) Typical decoupling capacitor Current measurement points (Vcc, PVcc, Vss) Power supply connections Pads for inductors (ferrite beads) Top of evaluation board Bottom of evaluation board

8 Evaluation Example Near-field tests* using the evaluation board allow comparisons of levels of RF current in the power supply lines * MPU: SH7055R Frequency: 80MHz No filter components 12 bypass capacitors added Ferrite bead + 12 caps

9 Near-field Tests Capacitor Tests with 256-pin QFP Twelve 3-pin capacitors (0.1µF each) 256-pin QFP VDE measurement point -20dB One 3-pin capacitor (NFM21: 1µF) Noise (dbµv) NFM21 Caps (for Vcc) Caps (for PVcc, AVcc) VDE Measurements MPU: SH7055R (40MHz) Macro (sensitive) w/o DeCaps 12 DeCaps NFM Frequency (MHz)

10 Near-field Tests Capacitor Tests with 256-pin BGA Eight 2-pin capacitors (0.1µF each) All Decoupling caps : on bottom side 256-pin BGA -20dB One 3-pin capacitor (NFM21: 1µF) Noise (dbµv) NFM21 Caps (for Vcc) Caps (for PVcc, AVcc) VDE Measurements MPU: SH7055R (40MHz) Macro (sensitive) w/o DeCaps 8DeCaps(T) NFM Frequency (MHz)

11 Near-field tests reveal EMI problem distant from MPU - Magnitude of noise near output connector of ECU-B is 20dB higher than that of ECU-A Scan for EMI at All Locations Page 11 Problem with slide Dotted lines in scans have been replaced with solid lines and moved. Please corre ECU-A: Good EMI performance ECU-B: Excess Leakage MPU MPU ECU package

12 Data Shows Progress and Problem Noise reduction efforts were successful for both ECUs, yet insufficient for ECU-B Noise Current (dbµv) - Target level was exceeded by ECU-B s design - Test data when decoupling capacitors were used Noise Current (dbµv) Page 12 Problem with slide Text in the two data traces is missing, and Frequency (MHz) is obscured. x Without caps With caps With caps+fb Target Level ECU-A ECU-B Noise Current (dbµv) - Test data when decoupling capacitors and ferrite bead were used + 0 Test data showing decoupling effects on basic boards Test data showing degradation on ECU-B Frequency (MHz)

13 Effects of Adding Components Decoupling capacitors Page 13 Problem with slide Block diagram (bottom right) is broken up and moved down. Using a ferrite bead and multiple decoupling capacitors is an effective way to reduce EMI Slit (moat) Ferrite bead Vcc Capacitor Power plane Ground plane (no slit) Noise Current (dbµv) Capacitors + Ferrite bead Capacitors added -20dB f = 80MHz Target level GND Core current I/O current Number of Decoupling Capacitors

14 Countermeasure Implementation Page 14 Problem with slide Vertical arrows should be dotted, not solid. It s best to follow a step-by-step EMI reduction procedure: Find the most important noise contributor and eliminate/reduce that problem; then repeat the process until design goal is met Reducing noise from unimportant element has no effect Reducing noise from important element drops overall level by 3dB 60 Effect: 0dB 60 Effect: -3dB EMI level (db) dB EMI level (db) dB Before countermeasure After countermeasure Before countermeasure After countermeasure Noise element 1 Noise element 2 Resulting noise level Noise element A Noise element B Resulting noise level

15 How packaging affects EMI reduction Three-pin SMD feed-through capacitors Evaluating EMI countermeasures Course Summary Iterative method for countermeasure implementation Page 15 Problem with slide Text in the yellow block should be contained within the box, as shown here. For more information on specific devices and related support products and material, please visit our Web site: