Wide-Bandwidth DUAL 2 x 1 VIDEO MULTIPLEXER

Transcription

1 MPC Wide-Bandwidth DUAL x VIDEO MULTIPLEXER FEATURES BANDWIDTH: MHz (.Vp-p) LOW INTERCHANNEL CROSSTALK: 68dB (MHz, SO); 8dB (MHz, DIP) LOW SWITCHING TRANSIENTS: +6mV/ 8mV LOW DIFFERENTIAL GAIN/PHASE ERRORS:.%,. LOW QUIESCENT CURRENT: One Channel Selected: ±.6mA No Channel Selected: ±µa APPLICATIONS VIDEO ROUTING AND MULTIPLEXING (CROSSPOINTS) RADAR SYSTEMS DATA ACQUISITION INFORMATION TERMINALS SATELLITE OR RADIO LINK IF ROUTING DESCRIPTION The MPC is dual, wide-bandwidth, -to- channel video signal multiplexer, which can be used in a wide variety of applications. It was designed for wide-bandwidth systems, including high-definition television and broadcast equipment. Although it is primarily used to route video signals, the harmonic and dynamic attributes of the MPC also make it appropriate for other analog signal routing applications such as radar, communications, computer graphics, and data acquisition systems. The MPC consists of four identical monolithic, integrated, open-loop buffer amplifiers. Two buffer outputs are each connected internally at the output. The bipolar complementary buffers form a unidirectional transmission path and offer extremely high output-to-input isolation. The MPC multiplexer enables the user to connect one of two input signals to the corresponding output. The output of the multiplexer is in a high-impedance state when no channel is selected. When one channel is selected with a digital at the corresponding SEL input, the component acts as a buffer with high input impedance and low output impedance. The wide bandwidth of over MHz at.vp-p signal level, high linearity and low distortion, and low input voltage noise of nv/ Hz make this crosspoint switch suitable for RF and video applications. All performance is specified with ±V supply voltage, which reduces power consumption in comparison with ±V designs. The multiplexer is available in a spacesaving -pin SO and DIP packages. Both are designed and specified for operation over the industrial temperature range ( C to +8 C.) IN IN IN IN TRUTH TABLE SEL SEL SEL SEL V OUT V OUT HI-Z HI-Z IN HI-Z IN HI-Z + SEL SEL SEL SEL V OUT V OUT HI-Z IN HI-Z IN International Airport Industrial Park Mailing Address: PO Box Tucson, AZ 87 Street Address: 67 S. Tucson Blvd. Tucson, AZ 876 Tel: () 76- Twx: 9-9- Cable: BBRCORP Telex: FAX: () 889- Immediate Product Info: (8) Burr-Brown Corporation PDS-D Printed in U.S.A. January, 99

2 SPECIFICATIONS ELECTRICAL At V CC = ±V, R L = kω, R IN =, R SOURCE = Ω, and T A = + C, unless otherwise noted. MPCAP, AU PARAMETER CONDITIONS MIN TYP MAX UNITS DC CHARACTERISTICS INPUT OFFSET VOLTAGE R IN =, R SOURCE = Initial ± mv vs Temperature 6 µv/ C vs Supply (Tracking) V CC = ±.V to ±.V 7 db vs Supply (Non-tracking) V CC = +.V to +.V db vs Supply (Non-tracking) V CC =.V to.v db Initial Matching All Four Buffers ± mv INPUT BIAS CURRENT Initial ± µa vs Temperature na/ C vs Supply (Tracking) V CC = ±.V to ±.V ±7 na/v vs Supply (Non-tracking) V CC = +.V to +.V.6 µa/v vs Supply (Non-tracking) V CC =.V to.v.7 µa/v INPUT IMPEDANCE Resistance Channel On.88 MΩ Capacitance Channel On. pf Capacitance Channel Off. pf INPUT NOISE Voltage Noise Density f OUT = khz to MHz. nv/ Hz Signal-to-Noise Ratio S/N =.7/(V IN MHz) 98 db INPUT VOLTAGE RANGE Gain Error = % ±.6 V TRANSFER CHARACTERISTICS Voltage Gain R L = kω, V IN = ±V.98 V/V Voltage Gain R L = kω, V IN = ±.8V V/V RATED OUTPUT Voltage V IN = ±V, R L = kω ±.8 ±.98 V Resistance One Channel Selected Ω Resistance No Channel Selected 9 MΩ Capacitance No Channel Selected. pf CHANNEL SELECTION INPUTS Logic Voltage + V CC V Logic Voltage +.8 V Logic Current V SEL =.V µa Logic Current V SEL =.8V µa SWITCHING CHARACTERISTICS V IN =.V to +.7V, f = MHz SEL to Channel ON Time 9% Point of V OUT = Vp-p. µs SEL to Channel OFF Time % Point of V OUT = Vp-p. µs Switching Transient, Positive Measured While Switching 6 mv Switching Transient, Negative Between Two Grounded Channels 8 mv POWER SUPPLY Rated Voltage ± V Derated Performance ±. ±. V Quiescent Current One Channel Selected ±.6 ± ma No Channel Selected ± ± µa Rejection Ratio 8 db TEMPERATURE RANGE Operating +8 C Storage + C Thermal Resistance, θ JA 9 C/W The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes no responsibility for the use of this information, and all use of such information shall be entirely at the user s own risk. Prices and specifications are subject to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant any BURR-BROWN product for use in life support devices and/or systems. MPC

3 SPECIFICATIONS AC CHARACTERISTICS (CONT) At V CC = ±V, R L = kω, R IN =, R SOURCE = Ω, and T A = + C, unless otherwise noted. MPCAP, AU PARAMETER CONDITIONS MIN TYP MAX UNITS LARGE SIGNAL BANDWIDTH ( db) V OUT =.Vp-p, C OUT = pf MHz V OUT =.8Vp-p, C OUT = pf MHz V OUT =.Vp-p, C OUT = pf MHz SMALL SIGNAL BANDWIDTH V OUT =.Vp-p, C OUT = pf 7 MHz GROUP DELAY TIME ps DIFFERENTIAL GAIN f =.MHz, V IN =.Vp-p VDC = to.7v. % DIFFERENTIAL PHASE f =.MHz, V IN =.Vp-p VDC = to.7v. Degrees GAIN FLATNESS PEAKING V OUT =.Vp-p, DC to MHz. db V OUT =.Vp-p, DC to MHz. db HARMONIC DISTORTION f = MHz, V OUT =.Vp-p, R L = Ω Second Harmonic 6 dbc Third Harmonic 66 dbc CROSSTALK V IN =.Vp-p MPCAP All Hostile f = MHz, 7 db f = MHz, 8 db Off Isolation f = MHz, 7 db f = MHz, 7 db MPCAU All Hostile f = MHz, 78 db f = MHz, 68 db Off Isolation f = MHz, 7 db f = MHz 76 db TIME DOMAIN RISE/FALL TIME V OUT =.Vp-p, Step % to 9% C OUT = pf, R OUT = Ω. ns SLEW RATE V OUT =.Vp-p C OUT = pf V/µs C OUT = pf 6 V/µs C OUT = 7pF 6 V/µs MPC

4 ABSOLUTE MAXIMUM RATINGS CONNECTION DIAGRAM Power Supply Voltage (±V CC )... ±6V Analog Input Voltage (IN through IN )... ±V CC, ±.7V Operating Temperature... C to +8 C Storage Temperature... C to + C Output Current... ±6mA Junction Temperature... + C Lead Temperature (soldering, s)... + C Digital Input Voltages (SEL through SEL )....V to +V CC +.7V Logic Voltage Input....6V to +V CC +.6V Top View IN GND IN + + SEL SEL V OUT SO/DIP ORDERING INFORMATION +V CC IN + V CC V OUT MODEL DESCRIPTION TEMPERATURE RANGE MPCAP -Pin Plastic DIP C to +8 C MPCAU -Pin SOIC C to +8 C GND IN SEL SEL PACKAGE INFORMATION () PACKAGE DRAWING MODEL PACKAGE NUMBER MPCAP -Pin DIP MPCAU -Pin SOIC NOTE: () For detailed drawing and dimension table, please see end of data sheet, or Appendix D of Burr-Brown IC Data Book. PIN DESCRIPTION MPC PIN DESCRIPTION IN, IN Analog Inputs Channel and IN, IN Analog Inputs Channel and GND Analog Shielding Grounds, Connect to System Ground SEL, SEL Channel Selection Inputs V OUT Analog Output V OUT Analog Output V CC Negative Supply Voltage; typical VDC +V CC Positive Supply Voltage; typical +VDC DICE INFORMATION PAD FUNCTION Input Ground Input +V Supply Input 6 Ground 7 Input 8 Select 9 Select Output V Supply Output Select Select Substrate Bias: Negative Supply. NC: No Connection. Wire Bonding: Gold wire bonding is recommended. MECHANICAL INFORMATION MILS (.") MILLIMETERS Die Size x 76 ±.9 x.9 ±. Die Thickness ±. ±. Min. Pad Size x. x. Backing: Titanium., +.,., +.,.. Gold., ±..76, ±. MPCAD DIE TOPOGRAPHY MPC

5 TYPICAL PERFORMANCE CURVES At V CC = ±V, R LOAD = kω, R IN =, R SOURCE = Ω, and T A = + C, unless otherwise noted. Input Offset Voltage (mv) INPUT OFFSET VOLTAGE vs TEMPERATURE INPUT BIAS CURRENT vs TEMPERATURE Temperature ( C) Temperature ( C) Input Bias Current (µa).m INPUT IMPEDANCE vs FREQUENCY OUTPUT IMPEDANCE vs FREQUENCY Input Impedance (Ω) k k k Output Impedance (Ω) k k M M M G k k M M M G 9 QUIESCENT CURRENT vs TEMPERATURE QUIESCENT CURRENT vs TEMPERATURE 8 7 One Channel Selected No Channel Selected Supply Current (ma) Temperature ( C) Supply Current (µa) 6 8 Temperature ( C) MPC

6 TYPICAL PERFORMANCE CURVES (CONT) At V CC = ±V, R LOAD = kω, R IN =, R SOURCE = Ω, and T A = + C, unless otherwise noted. Output Voltage (V) TRANSFER FUNCTION k k k M M M Input Voltage (V) Voltage Noise (nv/ Hz) INPUT VOLTAGE NOISE SPECTRAL DENSITY. Output Voltage (V) SWITCHING ENVELOPE (Channel-to-Channel Switching) V V SEL +.7V V Output Voltage (mv) SEL SEL SWITCHING TRANSIENTS (Channel-to-Channel) Without Bandwidth Limiting Lowpass Filter t RISE = t FALL = ns V V.7V Time (µs) Time (ns) SEL V IN DB V OUT DB SEL SWITCHING TRANSIENTS (Channel-to-Channel) SMALL SIGNAL PULSE RESPONSE Output Voltage (mv) SEL SEL 6MHz Low Pass Filter V Acc. Eureka Rec. EU9-PG in the Signal Path t RISE = t FALL = ns V Output Voltage (mv) Time (ns) 6 8 Time (ns) C OUT = pf, t RISE = t FALL = ns (Generator), V IN =.Vp-p MPC 6

7 TYPICAL PERFORMANCE CURVES (CONT) At V CC = ±V, R LOAD = kω, R IN =, R SOURCE = Ω, and T A = + C, unless otherwise noted. SMALL SIGNAL PULSE RESPONSE LARGE SIGNAL PULSE RESPONSE Output Voltage (mv) Output Voltage (V) Time (ns) C OUT = 7pF, t RISE = t FALL = ns (Generator), V IN =.Vp-p Time (ns) C OUT = pf, t RISE = t FALL = ns (Generator), V IN = Vp-p LARGE SIGNAL PULSE RESPONSE GROUP DELAY TIME vs FREQUENCY Output Voltage (V) Delay Time (ns) V IN Ω DUT Ω pf + BUF6 V OUT 6 8 Time (ns) C OUT = 7pF, t RISE = t FALL = ns (Generator), V IN = Vp-p DEM-MPC-GC V IN =.8Vp-p M M M G BANDWIDTH vs C OUT WITH RECOMMENDED R OUT GAIN FLATNESS Output (db) pf pf C OUT R OUT f db pf pf Ω MHz pf pf Ω MHz 7pF pf Ω MHz pf Ω MHz 7pF Ω MHz M M M G Output (db).... V IN =.Vp-p M M M G 7 MPC

8 TYPICAL PERFORMANCE CURVES (CONT) At V CC = ±V, R LOAD = kω, R IN =, R SOURCE = Ω, and T A = + C, unless otherwise noted. BANDWIDTH vs OUTPUT VOLTAGE Vp-p.8Vp-p.Vp-p BANDWIDTH vs R LOAD R L = Ω R L = kω Output (dbm).vp-p Output (dbm) 6 M M M G 6 V IN =.8Vp-p, C OUT = pf M M M G BANDWIDTH MATCHING (DB...DB) MHz HARMONIC DISTORTION Output (dbm).8vp-p Harmonic Distortion (dbc) db/div C OUT = pf, R OUT = Ω, V OUT =.8Vp-p db k M M M G M 6M 9M V OUT =.Vp-p, R L = Ω, C OUT = pf ON/OFF CHARACTERISTIC Output Voltage (V) SEL +.7V V.7V Time (µs) SEL V IN DB V OUT DB MPC 8

9 APPLICATIONS INFORMATION The MPC operates from ±V power supplies (±6V maximum). Do not attempt to operate with larger power supply voltages or permanent damage may occur. The buffer outputs are not current-limited or protected. If the output is shorted to ground, currents up to 8mA could flow. Momentary shorts to ground (a few seconds) should be avoided, but are unlikely to cause permanent damage. INPUT PROTECTION As shown below, all pins on the MPC are internally protected from ESD by a pair of back-to-back reverse-biased diodes to either power supply. These diodes will begin to conduct when the input voltage exceeds either power supply by about.7v. This situation can occur with loss of the amplifier s power supplies while a signal source is still present. The diodes can typically withstand a continuous current of ma without destruction. To insure long term reliability, however, diode current should be externally limited to ma whenever possible. The internal protection diodes are designed to withstand.kv (using Human Body Model) and will provide adequate ESD protection for most normal handling procedures. However, static damage can cause subtle changes in the characteristics of the buffer amplifier input without necessarily destroying the device. In precision buffer amplifiers, such damage may cause a noticeable degradation of offset voltage and drift. Therefore, static protection is strongly recommended when handling the MPC. Static damage has been well-recognized as a problem for MOSFET devices, but any semiconductor device deserves protection from this potentially damaging source. The MPC incorporates on-chip ESD protection diodes as shown in Figure. Thus the user does not need to add external protection diodes, which can add capacitance and degrade AC performance. External Pin V CC FIGURE. Internal ESD Protection. +V CC ESD Protection diodes internally connected to all pins. DISCUSSION OF PERFORMANCE Internal Circuitry The MPC is a dual, x, wide-band analog signal multiplexer. It allows the user to connect one of the two inputs (IN /IN or IN /IN ) to the corresponding output. The switching speed between two input channels is typically less than ns. However, in contrast to signal switches using CMOS or DMOS transistors, the switching transients are very low at +6mV and 8mV. The MPC consists of four identical unity-gain buffer amplifiers. Two of the four amplifiers are connected together internally at the output. The open-loop buffer amps, which consist of complementary emitter followers, apply no feedback so their low-frequency gain is slightly less than unity and somewhat dependent on loading. Unlike devices using MOS bilateral switching elements, the bipolar complementary buffers form a unidirectional transmission path, thus providing high output-to-input isolation. Switching stages compatible to TTL-level digital signals are provided for each buffer to select the input channel. When no channel is selected, the outputs of the device are highimpedance. This allows the user to wire several MPCs together to create multichannel switch matrices. Chip select logic is not integrated. The selected design increases the flexibility of address decoding in complex distribution fields, eases bus-controlled channel selection, simplifies channel selection monitoring for the user, and lowers transient peaks. All of these characteristics make the multiplexer, in effect, a quad switchable high-speed buffer. The buffers require DC coupling and termination resistors when driven directly from a low-impedance cable. Highcurrent output amplifiers are recommended when driving low-impedance transmission lines or inputs. An advanced complementary bipolar process, consisting of pn-junction isolated, high-frequency NPN and PNP transistors, provides wide bandwidth while maintaining low crosstalk and harmonic distortion. Bandwidth of over MHz at an output voltage of.vp-p allows the design of multi-channel crosspoint or distribution fields in HDTVquality with an overall system bandwidth of 6MHz. The buffer amplifiers also offer low differential gain (.%) and phase (. ) errors. These parameters are essential for video applications and demonstrate how well the signal path maintains a constant small-signal gain and phase for the low-level color subcarrier at.mhz (PAL) or.8mhz (NSTC) as the luminance signal is ramped through its specified range. The bipolar construction also ensures that the input impedance remains high and constant between ON and OFF states. The ON/OFF input capacitance ratio is near unity and does not vary with power supply voltage variations. The low output capacitance of.pf when no channel is selected is a very important parameter for large distribution fields. Each parallel output capacitance is an additional load and reduces the overall system bandwidth. Bipolar video crosspoint switches are virtually glitch-free when compared to signal switches using CMOS or DMOS devices. The MPC operates with a fast make-beforebreak switching action to keep the output switching transients small and short. Switching from one channel to another causes the signal to mix at the output for a short time, but it interferes minimally with the input signals. The transient peaks remain less than +6mV and 8mV. The generated output transients are extremely small, so DC 9 MPC

10 clamping during switching between channels is unnecessary. DC clamping during the switching dead time is required to avoid synchronization by large negative output glitches in subsequent equipment. The SEL-to-channel-ON time is typically ns and is always shorter than the typical SEL-to-channel-OFF time of ns. In the worst case, an ON/OFF margin of ns ensures safe switching even for timing spreads in the digital control latches. The short interchannel switching time of ns allows channel change during the vertical blanking time, even in high-resolution graphic or broadcast systems. As shown in the typical performance curves, the signal envelope during transition from one channel to another rises and falls symmetrically and shows less overshooting and DC settling effects. Power consumption is a serious problem when designing large crosspoint fields with high component density. Since most of the buffer amplifiers are in the off-state, one important design goal was to attain low off-state quiescent current when no channel is selected. The low supply current of ±µa when no channel is selected and ±.6mA when one channel is selected, as well as the reduced ±V supply voltage, conserves power, simplifies the power supply design, and results in cooler, more reliable operation. A resistor (Ω to Ω) in series with the input of the buffers may help to reduce peaking. Place the resistor as close as possible to the pin. Plug-in prototype boards and wire-wrap boards will not function well. A clean layout using RF techniques is essential. () SEL IN () GND () IN () DB DB SEL () SEL +V CC = +V () () V CC = V V OUT () CIRCUIT LAYOUT The high-frequency performance of the MPC can be greatly affected by the physical layout of the circuit. The following tips are offered as suggestions, not as absolutes. Oscillations, ringing, poor bandwidth and settling, higher crosstalk, and peaking are all typical problems which plague high-speed components when they are used incorrectly. Bypass power supplies very close to the device pins. Use tantalum chip capacitors (approximately.µf), a parallel 7pF ceramic chip capacitor may be added if desired. Surface-mount types are recommended due to their low lead inductance. PC board traces for signal and power lines should be wide to reduce impedance. Make short and low inductance traces. The entire circuit layout should be as small as possible. Use a low-impedance ground plane on the component side to ensure that low-impedance ground is available throughout the layout. Grounded traces between the input traces are essential to achieve high interchannel crosstalk rejection. Do not extend the ground plane under high-impedance nodes sensitive to stray capacitances, such as the buffer s input terminals. Sockets are not recommended, because they add significant inductance and parasitic capacitance. If sockets are required, use zero-profile solderless sockets. Use low-inductance and surface-mounted components for best ac-performance. (9) IN DB () GND SEL (6) (8) IN DB (7) FIGURE. Simplified Circuit Diagram. V OUT () MPC

11 V IN IN DB BUF6 V OUT Ω Ω Ω V IN =.Vp p V IN Ω IN IN IN DB DB DB MPC Ω V OUT Ω V OUT kω kω BUF6 V OUT Ω SEL SEL SEL SEL Ω Interchannel Crosstalk (db) 6 8 k M MPCAP MPCAU M M M FIGURE. All Hostile Crosstalk Grounded Input. V IN IN DB BUF6 V OUT Ω Ω V IN =.Vp p Ω V IN Ω IN IN IN DB DB DB MPC Ω V OUT Ω V OUT kω BUF6 kω V OUT Ω SEL SEL SEL SEL Ω Interchannel Crosstalk (db) 6 8 k M MPCAP MPCAU M M M FIGURE. Off Isolation Crosstalk Input. Ω V IN IN DB BUF6 V OUT Ω Ω Ω Ω V IN =.Vp-p Ω V IN Ω IN IN IN DB DB DB MPC V OUT Ω V OUT kω BUF6 kω V OUT Ω SEL SEL SEL SEL Ω Off Isolation (db) 6 8 k M MPCAP MPCAU M M M FIGURE. Off Isolation Crosstalk Test Circuit. MPC

12 VPOS VPOS +V J R J7 SEL C.µ C n C 7.µ C 9 n C.µ C n POS SW C.µ C n C 8.µ C n C.µ J GND C n NEG J R 6 SW J8 SEL CH J CH J CH J CH J VNEG R R R R R R 9 R 8 R R R R R 7 V 7 +V DB DB DB DB MPC V 9 8 R 9 Ω R Ω R C C R C6 C +V BUF6 U V +V BUF6 U V 8 8 R Ω R 6 Ω J OUT J6 OUT R 7 J9 SEL SW R 8 SW J SEL Component Side Silk Screen Solder Side FIGURE 7. Test Circuit and Board Layout. MPC

13 DEM-MPC-GC Ω In R IN DUT R OUT + R B Ω Out Ω MHz Scope R IN = Ω Ω DB to DB C OUT BUF6 R IN = Ω Pulse Generator FIGURE 8. Test Circuit Pulse Response. Generator R IN = 7Ω.MHz 7Ω MPC 7Ω V IN DUT of kω OPA6 + Ω 7Ω 7Ω Video Analyzer R IN = 7Ω VDC Ω FIGURE 9. Test Circuit Differential Gain and Phase. MPC SEL Inputs 7 MPC SEL Inputs 7 MPC SEL Inputs 7 MPC SEL Inputs 7 MPC SEL Inputs 7 MPC SEL Inputs 7 SER In D 6 7 Parallel Out HC9 SER Out 6 7 Parallel Out HC9 SER Out 6 7 Parallel Out HC9 SER Out Clock STR OE FIGURE. Serial Bus-Controlled Distribution Field. MPC

14 PACKAGE DRAWINGS MPC