4 MEMORY. MUSHU/M52277EVB Drawn by:

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1 Table of ontents NOTES MFX PROESSOR MEMORY UIO OE POWER SUPPLIES SP, US, N, RS, TIMERS RESET N IRQ M N LOKS SHRP L INTERFE L, REKOUT IO, N S US TO M LOK Revisions Rev escription ate pproved Released to F // K Pilot Release // Fixed non RoHS comps // K - etailed L rework etailed serial port rework - Fixed N // K - hanged PWM signal - Input to Rev layout Production Release // K - dded diode protection // K in power supply - Replaced Logic P with a pin non shrouded header - hanged L_OFF signal on LP con to PI to match on board L - hanged _REF pin hdrs to a single pin hdr - Updated J Footprint // K Production Release // K - Replaced obsolete // K KHz xtal - Replaced Freescale silicon with IT compliant MFVMJ K // K Updated default switch and jumper settings // K dded text regarding OOTMO pins connected to SV // K Transportation & Standard Products Group William annon rive West ustin, TX - This document contains information proprietary to Freescale Semiconductor and shall not be used for engineering design, procurement or manufacture in whole or in part without the express written permission of Freescale Semiconductor. esigner: rawing Title: NIEL KRUZEK MUSHU/MEV rawn by: NIEL KRUZEK TITLE PGE pproved: Size ocument Number Rev NIEL KRUZEK PF: SPF- SOURE: SH- Wednesday, February, ate: Sheet of

2 Resistor Tolerance is % unless otherwise noted rawing Title: MUSHU/MEV NOTES Size ocument Number Rev PF: SPF- SOURE: SH- Wednesday, February, ate: Sheet of

3 UF IVP. UF. UF. UF PF PLL_V RT_V OS_V PLL_V, RT_V and OS_V are supplied by the filtered supply circuits shown on page IVP P S_VP V_US OS_VSS YPSS PITORS U E IV F IV J IV K IV E E F F G H J K K E S_V E S_V F S_V G S_V H S_V J S_V J S_V K S_V K S_V V_US PLL_V H RT_V J OS_V G H OS_VSS F VSS F VSS G VSS G VSS G VSS H VSS H VSS H VSS J VSS J VSS [..] [..] (pg,) (pg) XTL (pg) EXTL (pg) XTL_K (pg) EXTL_K (pg) RESET_ (pg,,,) RSTOUT_ (pg) OOTMO (pg) OOTMO (pg) JTG_EN (pg,) L_[..] (pg,) L_SPL_SPR (pg,) L_LSLK (pg,) L_VSYN (pg,) L_HSYN (pg,,) _IN[..] (pg) _REF (pg) IRQ_ (pg,) IRQ_ (pg) IRQ_ (pg,,) L_REV (pg,,) L_ONTRST (pg) TIN/SPI_S (pg,) TIN (pg) UTS_ (pg) URTS_/US_VUS_O (pg) UTX (pg) URX (pg,) UTS_/L_LS (pg,) URTS_/L_PS (pg) UTX/SSI_TX (pg) URX/SSI_RX (pg) I_SL/NTX (pg) I_S/NRX (pg) SI (pg,) SO (pg,) SLK (pg,) PSTLK/TLK (pg,) KPT_ (pg) T (pg) T (pg) T (pg) T (pg,) PST (pg,) PST (pg,) PST (pg,) PST L_[..] _IN[..] L OHM.K TEST JTG_EN L_ L_ L_ L_ L_ L_ L_ L_ L_ L_ L_ L_ L_ L_ L_ L_ L_ L V is supplied by a filtered supply circuit shown on page PSTLK_ R _IN _IN _IN _IN _IN _IN _IN _IN. R _V _VSS PSTLK_ G F K J J K H G E K E E E E L L P N P N P N M M M K J L K M L P P N P N M L P N M L XTL EXTL XTL_K EXTL_K RESET_b RSTOUT_b OOTMO OOTMO TEST JTG_EN L_/PWM L_/PWM L_/L_ L_/L_ L_/L_ L_/L_ L_/PWM L_/PWM L_/L_ L_/L_ L_/L_ L_/L_ L_/NRX L_/NTX L_/L_ L_/L_ L_/L_ L_/L_ SP/Touchscreen locks Reset/Mode Pins L_/L_OE/L_SPL_SPR L_LSLK L_FLM/L_VSYN L_LP/L_HSYN _V _VSS _IN _IN _IN _IN _IN _IN _IN _IN _REF IRQ_b/US_LKIN/SSI_LKIN IRQ_b/REQ_b/SPI_S IRQ_b TIN/TOUT/L_REV TIN/TOUT/L_ONTRST TIN/TOUT/SF_S_b/SPI_S TIN/TOUT/SSI_MLK UTS_b/TOUT/US_VUS_EN URTS_b/TIN/US_VUS_O UTX/NTX URX/NRX UTS_b/SSI_LK/L_LS URTS_b/SSI_FS/L_PS UTX/SSI_TX URX/SSI_RX I_SL/NTX/UTX I_S/NRX/URX SI/TI SO/TO SLK/TRST_b PSTLK/TLK KPT_b/TMS T T T T PST PST PST PST M I L ontroller IRQs TIM URTs SPI/SF SRM ontrol Flexus ontrol ata us ddress us US F_/F_S_b F_/F_S_b F_ F_ F_ F_ F_ F_ F_/S_ F_/S_ F_/S_ F_/S_ F_/S_ F_ F_/S_ F_/S_ F_/S_ F_/S_ F_/S_ F_/S_ F_/S_ F_/S_ F_/S_ F_/S_ /S_ /S_ /S_ /S_ /S_ /S_ /S_ /S_ /S_ /S_ /S_ /S_ /F_ /F_ /F_ /F_ /F_ /F_ /F_ /F_ /F_ /F_ /F_ /F_ /F_ /F_ /F_ /F_ /F_ /F_ /F_ /F_ S_b/S_QM S_b/S_QM S_b/S_QM S_b/S_QM F_LK TS_b/K_b T_b OE_b RW_b F_S_b F_S_b F_S_b/S_S_b F_S_b S_LK S_LK_b S_KE S_RS_b S_S_b S_WE_b S_ S_S_b S_QS S_QS S_SR_QS SPI_LK/SF_LK/UTS_b SPI_IN/SF_IN/URX SPI_OUT/SF_OUT/UTX SPI_S/SPI_SS_b/URTS_b US_MNS US_PLS E E E E F F F G G H J K K K K L L L M N P M N P L M G G G G H H H H M N P L M N P L L J N J P F H N M M N F P N F L F J P M FLK_ S_QM S_QM OE_ RW_ S_ R. S_LK S_LK_ S_KE S_RS_ S_S_ S_WE_ S_ S_S_ S_QS S_QS S_SR_QS FLK_ [..] R TP [..] (pg) S_QM (pg,) S_QM (pg) S_QM (pg) S_QM (pg) F_LK (pg) TS_ (pg) T_ (pg,) OE_ (pg) RW_ (pg) S_ (pg) S_ (pg) S_ (pg) S_ (pg) S_LK (pg) S_LK_ (pg) S_KE (pg) S_RS_ (pg) S_S_ (pg) S_WE_ (pg) S_ (pg) S_S_ (pg) S_QS (pg) S_QS (pg) SPI_LK (pg,,) SPI_IN (pg,) SPI_OUT (pg,,) SPI_S (pg) US_MNS (pg) US_PLS (pg) MFX Recommended Socket: Emulation Technology PW--G- P YPSS PITORS S_VP YPSS PITORS UF. UF. UF. UF. UF. UF. UF. UF PF PF UF. UF. UF. UF. UF. UF. UF. UF PF PF rawing Title: MUSHU/MEV MFX PROESSOR Size ocument Number Rev PF: SPF- SOURE: SH- Wednesday, February, ate: Sheet of

4 M x bit MOILE R S_V YPSS PITORS (pg) [..] [..] UF. UF. UF. UF PF PF (pg,) [..] (pg) S_ (pg) S_WE_ (pg) S_S_ (pg) S_RS_ (pg) S_S_ (pg) S_QS (pg) S_QS (pg) S_QM (pg) S_QM (pg) S_KE (pg) S_LK (pg) S_LK_ [..] S_LK S_LK_ S_ Series terminations should be placed as close to U as possible RN RN RN RN RN RN RN RN RN RN RN RN RN RN RN RN RN RN RN RN RN RN RN RN RN S_ S_ S_ S_ S_ S_ S_ S_ S_ S_ S_T S_ S_ S_ S_ S_ S_WE_T S_S_T S_RS_T S_S_T S_QST S_QST S_QMT S_QMT S_KET J J K K K K J J J H J H H F H H G G G H E E F F G G G U MR_RM Q Q Q Q Q Q Q Q Q Q /P Q Q Q ()EXT Q Q Q WE# S# RS# N_F S# LQS UQS LM UM KE K K# E E F S_ S_ S_ S_ S_ S_ S_ S_ S_ S_ S_ S_ S_ S_ S_ S_ S_V Series terminations should be placed as close to U as possible F K E U MR_RM POWER V V V VQ VQ VQ VQ VQ VSS VSS VSS VSSQ VSSQ VSSQ VSSQ VSSQ F K E RN RN RN RN RN RN RN RN RN RN RN RN RN RN RN RN UF UF S_V. UF. UF PF UNUSE OMPONENTS RN RN PF R MTHMLFK- R should be placed as close to U as possible U S_V MTHMLFK- RN RN S_ G S_ F S_ E S_ S_ F S_ E S_ S_ S_ E S_ F S_ S_ S_ E S_ F V V Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q L J J G K H H K G J K H J K J H K H efault Position is - J S_V HR X RN (pg) S_ (pg) OE_ (pg) RW_ (pg,,,) RSTOUT_ TP TP RN RN RN RN RN RN S_V S_ OE_ RW_ RSTOUT_ G F E RY E L E RFU L E RFU L F RFU L F RFU L RFU L H RFU L H E#f RFU K OE# RFU K WE# RFU K RFU H LK RFU J RFU J V# RFU G RFU G RESET# RFU G RFU F WP# RFU RFU RFU M RFU M N RFU N RFU N RFU N RFU J RFU G VSS RFU VSS RFU TP M x bit NOR FLSH SWSNPFW TIN (pg) TIN/SPI_S J HR X TIN (pg,) SPI_S (pg,) R.K R.K (pg,,) SPI_OUT (pg,,) SPI_LK (pg,) SPI_IN SPI_S SPI_IN U HOL V U U U U S Q U U U U VSS W SPI_LK SPI_OUT Mbit SERIL OOT FLSH rawing Title: MUSHU/MEV MEMORY MP-SO Size ocument Number Rev PF: SPF- SOURE: SH- Wednesday, February, ate: Sheet of

5 (pg,) URX URX (pg) UTX/SSI_TX UTX J HR X J HR X SSI_RX URX/SSI_RX (pg) UTX (pg,) SSI_TX (pg) SSI_LK (pg,) TIN (pg,) IRQ_ (pg,,) SPI_LK (pg,,) SPI_OUT.UF.UF GN LUE LINE-IN GN LIME GREEN LINE-OUT GN G G GN G GN G GN GN PINK MI-IN J OE_INR IN IN OE_INL OE_OUTR IN IN OE_OUTL N N N MI_IN GN U_JK_PORT GN R.K.UF.K R OE_INL OE_INR OE_OUTR OE_OUTL GN SSI_MLK SPI_S SPI_LK SPI_OUT UF MI_IS MI_IN GN GN J H J J J G H F J J UIO U XTI/MLK XTO LKOUT S SLK SIN MIIS MIIN VMI LLINEIN RLINEIN TLVI. UF V G V E V HPV GN GN HPGN F E GN N_ N_ N_J N_J J J MOE RHPOUT LHPOUT LK IN OUT LRIN LROUT LOUT ROUT J.K R SSI_LK SSI_TX SSI_RX SSI_FS U N_ N_E N_ N_E N_ N_E N_ N_F N_ N_F N_ N_F N_ N_F N_ N_F N_ N_F N_ N_F N_ N_G N_ N_G N_ N_G N_ N_G N_ N_G N_ N_G N_ N_G N_ N_H N_ N_H E N_ N_H E N_E N_H E N_E N_H E N_E N_H N_E N_H TLVI E E E F F F F F F F G G G G G G G H H H H H H H. UF SSI_FS (pg) L OHM L OHM GN. UF rawing Title: MUSHU/MEV UIO OE Size ocument Number Rev PF: SPF- SOURE: SH- Wednesday, February, ate: Sheet of

6 J V_IN SW MSQE L Ohm/Mhz. UF F.. UF SM.OT MRL MRL UF UF PV IVP PLL_V R %, -% R SML-LXLG IVP R UF %, -%. UF UF PF. UF RT_V TP TP TP UF S_V H HR_X_M.UF R UF S_VP R K R PF ON PWR V ENTER POSITIVE. V REGULTOR L.UH R K R K. UF RLS UF R.K PV L S_V UH PV U FREQ INV VOUT VIN VIN SW SW GN GN PGN PGN V VST OOT S SL LKSYN LKSEL RST RT EN EN R GN GN V VIN LRV S LO LF LMP R.K R.K R.K.UF.UF PF PV R. R.K R.K R.K UF. V REGULTOR R.K PV U NTNLTG UF.UF H UF HR_X_M R P P R P OS_VSS R P R _VSS UF %, -% UF OS_VSS %, -% UF %, -% L OHM L OHM %, -%. UF _VSS OS_VSS. UF. UF PF OS_V V_US _V OS_VSS _VSS UF IV H HR_X_M.UF R UF IVP R K R. V REGULTOR PF L.UH R K R.K. UF RLS R.K PV L UH IV PV U FREQ INV VOUT VIN VIN SW SW GN GN PGN PGN V VST OOT S SL LKSYN LKSEL RST RT EN EN R GN GN V VIN LRV S LO LF LMP R.K R.K.UF R. UF R.K PV U NTNLTG. V REGULTOR V. TP R.K L MHZ Filter circuits should be located as close to U as possible UF R.K UF.UF UF VREG_RESET_ (pg) Note: ll power rails ending in "P" are dedicated M supplies. The header and ohm resistor facilitate current measurement on these supplies. R.K.UF PF R.K PV _V UF. UF. UF. UF. UF. UF. UF rawing Title: MUSHU/MEV POWER SUPPLIES YPSS PITORS _VSS Size ocument Number Rev PF: SPF- SOURE: SH- Wednesday, February, ate: Sheet of

7 _IN[..] (pg,,) _IN[..] (pg) _REF _IN _IN _IN _IN _IN _IN _IN _IN J HR_X _VSS SP TOUHSREEN _VSS J HR X _V H HR_X_M H HR_X_M H HR_X_M H HR_X_M H HR_X_M R SML-LXLSY R SML-LXLSY (pg,,) L_REV (pg,,) L_ONTRST (pg,) TIN (pg,) TIN R SML-LXLSY.K R US S R SML-LXLSY (pg) US_MNS (pg) US_PLS ohm series terminations on US_MNS and US_PLS should be located as close to U as possible. and - lines should be routed as ohm differential pair. (pg) I_SL/NTX (pg) I_S/NRX (pg,) URTS_/L_PS US_MNS US_PLS NTX HR X J J HR_X J R R I_SL NRX VUSON I_S L_PS SSI_FS URTS_ R K R K. UF PV.K R U EN EN IN GN MI-YM FLG FLG OUT OUT US_VUS_O. UF. UF. UF. UF -.UF URTS_ UTX RS_RX RS_TS_.K R. UF U V V- V - - IN IN RIN RIN GN OUT OUT ROUT ROUT R NP S R K VUS - I G NTX NRX RS_TX RS_RTS_ URX UTS_ J US_MINI_. UF U V RS R SNHV RS_TS_ RS_RTS_ RS_TX RS_RX VREF. UF NH NL GN TP HR X J.K R R U VL EN EP GN HR X J MXE H HR_X_M V I/OV I/OV I/OVL I/OVL HR X J PV PI --> VUSON HR X J VUSON M M J HR_X MX (pg,) UTX (pg,) L_LS (pg) SSI_LK J HR_X UTS_ UTX UTS_/L_LS UTS_ R.K URX UTX UTS URTS U RST REGIN SUSPEN V SUSPEN VUS RI - TR SR TX N RX N RTS N TS N N N GN N GN N GN N N N.UF. UF US-_P US-_N S S - G V J URX US_TYPE_ (pg,) US_VUS_O P US to serial converter TP US_VUS_EN (pg) URTS_/US_VUS_O J HR X UTS_ URX (pg) (pg) URTS_ URTS_ (pg) UTX UTX I_SL (pg) I_S (pg) L_PS (pg,) SSI_FS (pg) UTS_/L_LS (pg,) rawing Title: MUSHU/MEV SP, US, N, RS, TIMERS Size ocument Number Rev PF: SPF- SOURE: SH- Wednesday, February, ate: Sheet of

8 YPSS PITORS UNUSE GTE SW SPST P NO R.K U PRST VTOL.VTOL GN VIN.VIN VRST.VRST PV R SML-LXLI IRQ_ (pg) UF UF PV. UF. UF. UF. UF. UF UF S_V. UF. UF PF PF R.K U LVG S SW SPST P NO R.K U PRST VTOL.VTOL VIN.VIN VRST PV.K R U LVG U LVG GN S.VRST P_RESET_ RESET_ (pg) U LVG (pg,) M_RESET_ TP (pg) U_RESET_ (pg) VREG_RESET_ (pg,,,) RSTOUT_ TP SML-LXLI R WRNING: The OOTMO[:] signals are part of the domain, so they should have been pulled up through the switches to the.v domain instead of the.v SV. No functional issues have been seen on the EV as a result of this misconnection, but customers who are using this design as a reference should make sure to connect the OOTMO[:] pins correctly (pulled up to.v and pulled down to GN as needed). S_V SW OOTMO (pg) OOTMO (pg) efault Switch Set-Up SW- = ON >> OOTMO = SW- = OFF >> OOTMO = S_V SW_IP-_SM.K R.K R S_V SW- = ON >> = SW- = ON >> = SW- = ON >> = SW- = ON >> = SW- = OFF >> = SW- = OFF >> = SW- = OFF >> = SW- = OFF >> Not onnected SW SW_IP-_SM.K.K.K.K R R R R U G GN V S_V Y Y Y Y LV (pg,) (pg,) (pg,) (pg,) S_V SW SW_IP-_SM.K.K.K R R R U G.K R GN V Y Y Y Y LV (pg,) (pg,) (pg,) rawing Title: MUSHU/MEV RESET N IRQ Size ocument Number Rev PF: SPF- SOURE: SH- Wednesday, February, ate: Sheet of

9 S_V IV.K R.K R.K R.K R R K R M_RESET_ (pg,) J (pg,,,) RSTOUT_ (pg,) PST (pg,) PST (pg) T (pg) T KPT_ SLK TLK SI SO PST PST T T PSTLK T_ KPT_ (pg,) SLK (pg,) EXTERNL_SI (pg) T_ (pg,) HR_X M ONNETOR (pg) (pg) T T (pg,) PST (pg,) PST (pg,) SO TLK (pg,) PSTLK/TLK efault position is not populated J.K R HR X PSTLK J efault position is - JTG_EN (pg) HR X (pg) XTL_K EXTL_K (pg) R M Y J R ON SM..KHZ J efault position is - PF PF Y.K R Y V OE LK OUT GN MHz HR X J HR X efault position is - EXTL (pg) MHZ YPSS PITORS (pg) XTL OS_VSS R.M NP UF PF OS_VSS PF ll clock lines should be routed as short as possible. UF rawing Title: MUSHU/MEV M N LOKS Size ocument Number Rev PF: SPF- SOURE: SH- Wednesday, February, ate: Sheet of

10 L_V (pg,) I_SL/NTX L_MO NV.K R L Q UF PI --> LOFF_.UF.UF R K. UF TS TS TS.K R. UF. UF. UF R K NP. UF R K R.K H HR_X_M UF U SUPM IN SHN RY RVN FN REF TGN TGN GN MXEUP. UF XP XN OUT SUPP SUPN F RVP FP INTG PGN.UF PF. UF. UF L_V R. UF. UF. UF. UF UF R K R.K TS TS TS L_V.UF.UF PV J ON X GN GN R K M M R.K TOUH_TOP TOUH_RIGHT TOUH_OTTOM TOUH_LEFT Q L. UF R R K R.K L_V LTG Q. UF UF R G G S S _IN _IN _IN _IN Q SIEY Q SIEY TP (pg,,) (pg,,) (pg,,) (pg,,).uf R.K K. UF UF NV PV L_V (pg,) L_LSLK (pg,) L_HSYN (pg,) L_SPL_SPR L_LSLK L_HSYN L_SPL_SPR L_LSLK L_HSYN L_SPL_SPR (pg,) L_VSYN (pg,) L_PS (pg,,) L_REV (pg,) L_[..] L_REV L_VSYN L_[..] UF L UH U MSH- R NP R VL VL L_ L_ L_ L_ SPS U/L L_MO R.K LUE LUE LUE LUE R NP SPR L_LS VOM LR L_PS L_REV M M J ON X GREEN GREEN GREEN GREEN GREEN GREEN RE RE RE RE RE RE OM LUE LUE L_ L_ L_ L_ L_ L_ L_ L_ L_ L_ L_ L_ L_ L_ (pg,,) L_ONTRST. UF IN TRL OMP PGN GN EP LX OUT S MXET. UF R. J N J RE PINNE OUT TO E OMPTILE WITH SHRP L PNEL LQQH L_LS (pg,) rawing Title: MUSHU/MEV SHRP L INTERFE Size ocument Number Rev PF: SPF- SOURE: SH- Wednesday, February, ate: Sheet of

11 (pg,) L_[..] L_[..] LOGIP L ONNETOR PV J PV (pg,) L_SPL_SPR (pg,,) L_ONTRST (pg,) L_PS (pg,) L_HSYN (pg,,) L_REV L_ RE L_ RE L_ RE L_ GREEN L_ GREEN L_ GREEN L_ LUE L_ LUE L_ LUE L OE L_ONTRST L_LS L_PS L_HSYN L_REV _IN _IN RE L_ RE L_ RE L_ GREEN L_ GREEN L_ GREEN L_ LUE L_ LUE L_ LUE L_ L_VSYN L_HSYN L_LSLK PI --> LOFF_ L_VSYN L OE _IN _IN _IN _IN (pg,,) (pg,,) HR X _IN _IN (pg,,) (pg,,) L_LS (pg,) (pg,) I_SL/NTX (pg,) L_LSLK (pg,) L_VSYN UNIVERSITY REKOUT ONNETOR.K R (pg,) UTX (pg,) URX (pg,) URTS_/L_PS (pg,) UTS_/L_LS (pg,,) SPI_OUT (pg,) SPI_IN (pg,,) SPI_LK (pg) SPI_S (pg,) SPI_S (pg,) IRQ_ (pg,) S_QM (pg) S_QM L_ L_ PWM PWM SPI_OUT SPI_IN SPI_LK SPI_S SPI_S SPI_S J TIN TIN TIN TIN S_ S_ S_ SL S PWM PWM F_LK TS_ L_ L_ IRQ_ (pg) U_RESET_ (pg) RSTOUT_ (pg,,,) L_REV (pg,,) L_ONTRST (pg,,) TIN TIN S_ (pg) S_ (pg) S_ (pg) I_SL (pg) I_S (pg) F_LK (pg) TS_ (pg) HR_X P SPI_S SPI_OUT SPI_LK SPI_IN IRQ_ T /T M VSS V LK VSS T T _SW _WP_OMMON WP MM-S onnector rawing Title: MUSHU/MEV L N SERIL IO ONNETORS Size ocument Number Rev PF: SPF- SOURE: SH- Wednesday, February, ate: Sheet of

12 F_RESET M_RESET_ (pg,) F_TE T_ (pg,) P&E Microcomputer Systems US old Fire Multilink M Interface F_SO F_FREEZE F_SLK SO (pg,) PSTLK/TLK (pg,) SLK (pg,) F_KPT KPT_ (pg,) PST PST (pg,) PST PST (pg,) PST PST (pg,) PST PST (pg,) F_SI SI (pg) EXTERNL_SI EXTERNL_SI (pg) rawing Title: MUSHU/MEV P&E M LOK Size ocument Number Rev PF: SPF- SOURE: SH- Wednesday, February, ate: Sheet of

Revision History 1 TITLE PAGE Revision Date Description 2 BLOCK DIAGRAM 3 MCU_INTERFACE 4 USB_DEBUG. Table of Contents

Revision History 1 TITLE PAGE Revision Date Description 2 BLOCK DIAGRAM 3 MCU_INTERFACE 4 USB_DEBUG. Table of Contents Table of ontents Revision History TITLE PGE Revision ate escription LOK IGRM MU_INTERFE // Inital raft US_EUG //. US Section updates. URT_ONNETORS. MU Section updates. //. onnector Section added. Revision