Bridges to the Future

Transcription

1 FOURTH EDITION report Accelerating the next technology revolution In this edition: Bridges to the Future Why industry collaboration on technology innovation and manufacturing productivity is more important than ever

2 In this Edition... A note from Michael R. Polcari, President and CEO, SEMATECH The theme of this quarter s Tech Report building bridges is figurative, but resonates deeply within SEMATECH, across our industry, and around the globe, particularly during the current economic crisis. More than ever, our industry s success depends on interdependence and engagement, on bridging differences and making seamless connections, in several contexts: between research, development, and manufacturing sectors of our businesses as we move technology innovations from concept to commercialization; between university, industry, and government partners in collaborative alliances; between chipmakers and equipment and materials manufacturers coming together to achieve common goals; between professional colleagues sharing knowledge across various scientific and engineering disciplines; Contents Bridges to the Future 4 Industry collaboration on technology innovation and manufacturing productivity, and the multidimensional role of the SEMATECH Knowledge Series SEMATECH Knowledge Series This year s SKS lineup is a comprehensive set of meetings focused on the most critical challenges facing the semiconductor industry. and between established and emerging technologies, as we bridge to the smart solutions of the future. The TechReport articles offer several cases in point: Our SEMATECH Knowledge Series (SKS) is a signature set of public conferences and workshops designed to bring together experts from across the nanoelectronics community to share ideas and forge consensus. Given the current economic picture, we have scoped our 2009 series to focus on the most pressing challenges in the following areas next-generation lithography, advanced transistors, 3D development, and manufacturing productivity and drive, collectively, toward the best and most cost-effective solutions for our industry. One of our SKS conferences the annual ISMI Manufacturing Week brings together hundreds of technologists, fab engineers and managers to share both 3D workshop chair helping drive industryconsensus on the different 3D options 8 An interview with workshop chairs, Larry Smith, SEMATECH s 3Dreliability and product interlock expert SEMATECH Acquires TSV RIE Tool From Tokyo Electron Limited mm TSV RIE tool to be installed at SEMATECH s 3D R&D center at UAlbany NanoCollege 2 SEMATECH TECH REPORT

3 nuts and bolts and strategic ways to improve manufacturing productivity and reduce costs in manufacturing operations. Surely this conference, which puts so much emphasis on the practical and the affordable, will be an even more important and timely resource for our industry in In the arena of advanced and emerging technology, SEMATECH s 3D through-silicon-via program at the College of Nanoscale Science and Engineering of the University at Albany has continued to grow in scope and membership. It is a prime example of how chipmakers, equipment manufacturers, and others from disciplines across the industry are collaborating with universities and government to transform one of the most promising emerging design technologies into highvolume manufacturing. Our long-time partner and member Tokyo Electron has recently provided a leading-edge 300mm tool to help refine processes for through silicon via (TSV) etch development, and NEXX Systems has joined as a member of the 3D program to lead work on electrodeposition solutions. And finally, the Report highlights a couple of awards that deserve mention: one that ISMI gave to TEL and Applied Materials for excellence in equipment energy reduction, as part of our growing focus on environmental sustainability, and the Solid State Devices and Materials (SSDM) Best Paper Award that SEMATECH received for its seminal work on the reliability of high-k metal gates. These examples show some of the ways that SEMATECH builds bridges to connect labs and fabs, experts across disciplines, and organizations around the globe all in the service of innovative technology that will drive our industry and our economy in the years to come. NEXX Systems and SEMATECH to Collaborate on 3D Interconnect Research at UAlbany NanoCollege 11 SEMATECH Research on Reliability of Workfunction Controlled High-k Metal Gates Recognized 12 SEMATECH technologists report technical results on new materials and device structures at SSDM 2008 in Japan ISMI Manufacturing Week 14 Leading industry speakers, informative sessions and keynote speakers from Toshiba and Texas Instruments focused on best practices and business strategies that shape manufacturing growth ISMI Recognizes TEL and Applied Materials for Excellence in Equipment Energy Reduction 16 FOURTH EDITION 3

4 Bridges to the Future Industry collaboration on technology innovation and manufacturing productivity, and the multidimensional role of the SEMATECH Knowledge Series More than ever, our industry s technology and manufacturing solutions are the product of an enterprise culture that encourages sharing and open interactions among our scientists, engineers, and manufacturing experts. SEMATECH is at the heart of this culture, serving as the bridge between R&D and manufacturing and driving the pre-competitive cooperation and collaborative processes that have been fundamental to so many of the industry s breakthroughs. SEMATECH s dynamic network includes the major players in the semiconductor industry, as well as companies and teams investigating emerging technology options. This breadth of engagement gives us a good view of future industry needs, and allows us to offer our members programs that respond to those needs. And, through our global outreach, we play a key role in stimulating and shaping important directions in technology and manufacturing. Shaping Important Directions Every year SEMATECH and its subsidiaries sponsor, host, and participate in the SEMATECH Knowledge Series (SKS), a variety of public semiconductor industry meetings and events worldwide aimed at forging consensus and driving solutions to critical industry challenges. Attended by thousands of experts each year, these knowledge-sharing, content-laden meetings and public conferences enhance global cooperation and serve as important forums to foster dialogue and cooperative action. Providing continuous education in the evolving domain of nanoelectronics, the SKS offers a variety of introductory and advanced technical courses, workshops, and symposia to not only SEMATECH members, but also the industry at large, and related academic and research institutions. 4 SEMATECH TECH REPORT

5 SKS 2009 The timely content of these SKS meetings is tuned to the needs of the various target audiences and to trends and changes in the nanoelectronics industry. But in general, the SKS sessions gather experts from around the world to Rank critical issues required to bring R&D concepts to commercial production Guide the industry in seeking effective and manufacturable solutions for future technology generations Build on critical supplier and manufacturer relationships required to accelerate innovation Share data and methodologies for lowering manufacturing costs and increasing productivity in both existing and nextgeneration fabs Focus on ways to extend the use of current materials and methods in the face of increasing costs Support the ongoing development and refinement of the International Technology Roadmap for Semiconductors (ITRS), an influential guide for the industry. Global Collaboration for Achieving a Common Goal Collaboration is a key driver for the continuous acceleration of innovation and productivity that will keep our industry strong and prosperous in the 21st century. The more we work together, the better we become at developing and perfecting the tools, culture, and processes that bridge differences, define common goals, and implement smart solutions. No other industry engenders this kind of collaboration or interdependence, and SEMATECH is proud to play a leadership role, through its SEMATECH Knowledge Series, in bringing people together, fostering creative cooperation, and building bridges to the future. FOURTH EDITION 5

6 SEMATECH Knowledge Series This year s SKS lineup is a comprehensive set of meetings focused on the most critical challenges facing the semiconductor industry. Lithography SEMATECH EUV Source Workshop In 2009, fully integrated extreme ultraviolet (EUV) LPP lithography sources with output power of approximately 100 W are scheduled to be delivered to exposure tool manufactures for integration into the pre-production EUV scanners. This workshop will review the progress made in source performance and provide an overview of the critical challenges and technology developments of EUV lithography sources. The objective of the workshop is to develop an understanding of the current status and performance of these lithography sources, identify remaining challenges, and identify development and engineering gaps in current EUV source technology. May in Baltimore, MD SEMATECH Advanced Mask Cleaning Workshop Held in conjunction with the BACUS Conference, this full-day workshop provides a forum for SEMATECH members, mask and wafer cleaning suppliers, and researchers to discuss advancements in technologies and solutions applicable to advanced mask cleaning and surface preparation challenges. Topics include sub-30nm particle removal, molecular contamination removal, mask inspection defect analysis, and environmental approaches to mask cleaning. Sept. 14 in Monterey, CA 2009 International Symposium on Extreme Ultraviolet Lithography The EUVL Symposium, hosted by EUV CRC in cooperation with SEMATECH, Selete, and EUVA, is part of SEMATECH s ongoing commitment to help mature the technology and infrastructure for extreme ultraviolet lithography (EUVL), including sources, masks, optics, resists, contamination control, and metrology to support EUVL pilot line manufacturing requirements. Oct in Prague, Czech Republic 6th International Symposium on Immersion Lithography Extensions The Immersion Extensions Symposium focuses on efforts to extend 193nm lithography to the 22nm half-pitch node and beyond. The primary emphasis will be placed on patterning processes that enable pitch division, techniques for improving process control, and on emerging technologies that will extend optical lithography. Hosted by SEMATECH in collaboration with IMEC and Selete, and co-located with the EUVL Symposium. Oct in Prague, Czech Republic Advanced Technologies SEMATECH Surface Preparation and Cleaning Conference, This conference which brings together the leading researchers from the semiconductor industry and the university community focuses on advanced wafer and mask cleaning and surface preparation technologies. Speakers and participants will explore current developments and ITRS challenges in wafer and mask cleaning, including wafer front-end, wafer back-end, advanced mask, and environment, safety and health issues for the 32nm node and beyond. March in Austin, TX SEMATECH 3D Interconnect Workshop - Metrology for 3D Interconnect Stacking layers of silicon with through-silicon vias 3D ICs can improve electrical performance, shrink device size, enable the integration of heterogeneous devices, lower power consumption, and reduce cost. However, 3D ICs can exacerbate thermal problems and will require new thinking in terms of architecture, design, and test. SEMATECH will continue to host workshops to address the design, test, equipment and thermal challenges associated with this innovative new technology. July 15 in San Francisco, CA Other meetings may be added during the remainder of the year 6 SEMATECH TECH REPORT

7 SKS 2009 International Symposium on Advanced Gate Stack Technology This symposium focuses on the technical challenges for functional stacks in future (sub 32nm node) logic and memory devices. Functional stacks include: high-k/metal gate stacks for Si, SiGe, III-V high performance MOSFETs; metal/high-k/ metal gate stacks for storage capacitors and resistive change memory; high-k/metal gate for flash memory; insulators and metals needed for high performance NEMS and sensors; and magnetic material stacks needed for spin based devices. The symposium will feature industry experts presenting their latest research in both invited and contributed talks, and a discussion panel of representatives from major semiconductor device makers, equipment makers, and academia. August 2009 in San Francisco, CA Manufacturing AEC/APC Symposia These ISMI-sponsored symposia covering advanced equipment control and advanced process control (AEC/APC) bring IC manufacturers and suppliers together to accelerate the industry toward more efficient and more intelligent manufacturing through automated data-driven decision making. European AEC/APC Conference, April in Sicily, Italy North America AEC/APC Symposium, Sept in Ann Arbor, MI AEC/APC Symposium-Asia, Nov. 5-6 in Kumamoto, Japan Next Generation Factory Briefing and E-manufacturing Workshops These workshops, jointly sponsored with SEMI, provide a vision and roadmap to further align IC manufacturers and suppliers in their next-generation factory and e-manufacturing implementation strategies for continuous factory improvement. SEMICON West, July 17 in San Francisco, CA SEMICON Japan, Dec. 1 in Makuhari, Japan ISMI Manufacturing Week ISMI Manufacturing Week features two full days of workshops and short courses on a wide range of manufacturing-related topics, followed by the 6th Annual ISMI Symposium on Manufacturing Effectiveness, the industry s only symposium focused entirely on increasing productivity and reducing manufacturing expenses through advances in equipment, processes, resources, sustainability, and manufacturing methods. Additional information about the latest products, services and novel ideas for increasing profits can be found at the supplier exhibits throughout the week. Oct in Austin, TX Other Industry-wide Events International Technology Roadmap for Semiconductors (ITRS) Conferences The entire ITRS will be revised in 2009, with new information and assessments from 2009 through These public conferences offer technologists and strategists from the manufacturing and supplier communities the opportunity to participate in building the next ITRS by providing input to the working group teams of industry and research experts who revise the semiconductor industry Roadmap. Summer Conference, 15 July in San Francisco, CA Winter Conference, Dec in Hsin Chu, Taiwan SEMATECH and ISMI Symposia Senior executives and managers from SEMATECH and ISMI will hold symposia in Taiwan and Japan to present program updates and examples of how SEMATECH s models for consortial R&D are accelerating the next technology revolution worldwide. Public sessions will focus on key technology, manufacturing, and business issues in today s global semiconductor industry, with opportunities for networking; member-only sessions will be devoted to reviewing program activities, technology transfer, and member feedback. Taiwan Symposium, Sept. 15 in Hsin Chu, Taiwan Japan Symposium, Sept. 17 in Tokyo, Japan FOURTH EDITION 7

8 3D Workshop Chair Helping Drive Industry Consensus on the Different 3D Options An interview with workshop chairs, Larry Smith, SEMATECH s 3D reliability and product interlock expert One of the highlights of SEMATECH s 2008 Knowledge Series was the completion of a successful series of three SEMATECH-sponsored 3D workshops that included Design and Test Challenges, Equipment Challenges for 3D Interconnect, and Manufacturing and Reliability Challenges for 3D ICs using TSVs. 1. Overall, have the 3D workshops achieved their goal? In 2008, we hosted three workshops: Design and Test Challenges, Equipment Challenges for 3D Interconnect, and Manufacturing and Reliability Challenges for 3D ICs using TSVs. Our goal in these series of workshops was to identify specific, focused topics in the general area of 3D ICs that we believed were key to accelerating the adoption of 3D technologies, and to provide a forum where the leading researchers, practitioners, and other interested parties could evaluate the state of the industry to address these topics. of developing consensus, but it will take some time for this consensus to emerge. In the Design/Test workshop, we pulled together a panel to discuss how the EDA industry is responding to TSVs. The panel included participants from EDA vendors and from the design community. The goal was to get a current snapshot of market needs, understand the strategies of some of the key EDA vendors, and identify hurdles to moving forward. This was a challenging topic, because the needs are very diverse and the large EDA companies need to see a large market for their tools before making the large investments that will be necessary. I want to thank Clem Meas from Quickstart Consulting for pulling this together. 3. How do these workshops benefit your attendees? As well as a chance to network with other industry experts, I see these workshops as an opportunity for the attendees to hear from leading practitioners who will help them better assess where the industry stands, helping their own companies formulate strategies. Overall, I believe we succeeded in the above goals, based on attendance and participant feedback. 2. What was your biggest challenge? The field of 3D ICs covers a very wide range of applications, technologies, and approaches. The field is still in its early stages, and everyone is still trying to get a handle on how things will evolve: what applications will be the drivers, what integration approaches will dominate, how the supply chain will be configured. Meetings like these are part of the process 8 SEMATECH TECH REPORT

9 3D Interconnect 4. What has been the general feedback from the participants? Several attendees have told us that the Manufacturability/Reliability Workshop was the best conference on 3D ICs last year. At the conclusion of each workshop, we conducted a survey. Overall, we ve received very positive feedback. Specifically, participants felt the panel discussions were very valuable; they also enjoyed the networking opportunities. 5. Will you be chairing more workshops next year? If so, has there been a decision yet on what your technical focus will be for next year? There is a move to organize a large international 3D conference in September 2009 to replace some of the smaller workshops; we intend to support this effort, and therefore are reconsidering the number of workshops we will hold. Current plans for 2009 are to hold a workshop on metrology methods for 3D ICs at SEMICON West. EUV Source Workshop May 29-30, 2009 Baltimore, MD Industry experts have identified the critical gaps in the development of source technology that must be addressed in order to prevent further development delay. The focus of this workshop is to measure the progress that has been made toward these challenges and develop a realistic schedule for when solutions will be available. Don t miss the opportunity to be a part of the solution. FOURTH EDITION 9

10 SEMATECH Acquires TSV RIE Tool From Tokyo Electron Limited 300 mm TSV RIE tool is installed at SEMATECH s 3D R&D center SEMATECH is pleased to announce that it has received a 300mm Telius SP UD system from Tokyo Electron Limited (TEL). The Telius SP UD system is the latest generation through silicon via (TSV) etch tool that has the versatility to investigate various chemistries to etch vias ranging from sub-1 micron to tens of microns wide. The TSV reactive ion etch (RIE) tool, which is a critical component of all 3D TSV integration schemes, will be used in SEMATECH s 3D R&D Center at CNSE s Albany NanoTech Complex in Albany, NY. TEL was the first associate member of the 3D program and has been a valued partner of the Interconnect division for many years. Given their experience in deep silicon etching, we are very pleased to partner with TEL on this critical aspect of developing 3D interconnects, said John Warlaumont, SEMATECH s vice president of advanced technology. Leveraging CNSE s pilot line to establish a 300 mm 3D R&D center is a unique opportunity. It allows our researchers to address the technical and manufacturability issues of creating 3D interconnects within a state-of-the-art CMOS environment. The integration of TEL s leading-edge 3D tools with SEMATECH s R&D capabilities and know-how will bring significant benefits to our semiconductor customers by refining our processes for TSV etch development. Masayuki Tomoyasu, senior vice president and chief engineer for TEL Michael Tittnich, associate vice president for technical operations at CNSE, said, The strategic partnership between the UAlbany NanoCollege and SEMATECH continues to demonstrate global leadership in accelerating cutting-edge nanoelectronics education, research, development, and deployment for the benefit of a growing number of worldwide industry partners. This latest acquisition of Tokyo Electron s next-generation TSV RIE tool expands CNSE s state-of-the-art 300 mm line, while also illustrating the success of SEMATECH s 3D R&D program and its growing presence and partnerships at CNSE s Albany NanoTech Complex. Issues that have restricted 3D interconnects from entering high volume manufacturing encompass the front-end, assembly and packaging, and design and test. In an effort to transcend these barriers, SEMATECH s 3D program has been working jointly with chipmakers, equipment and materials suppliers, and assembly and packaging service companies from around the world on early development challenges, including cost modeling, technology option narrowing, and technology development and benchmarking, while also building industry consensus. 10 SEMATECH TECH REPORT

11 NEXX Systems and SEMATECH to Collaborate on 3D Interconnect Research 3D Interconnect NEXX Systems, Inc., a leading provider of process equipment for advanced wafer-level packaging applications, has become a member of SEMATECH s 3D Interconnect Program. As a member of SEMATECH s 3D program, NEXX will collaborate with SEMATECH in leading-edge research on innovative electrodeposition technology and the development of high yield, low cost copper electroplating solutions that will enable high density 3D through-silicon-vias (TSVs). Dr. Tom Walsh, NEXX Systems, President and CEO said, We are excited to be part of the SEMATECH 3D Interconnect program, working with the most advanced 300 mm equipment and technologists in developing this leading-edge technology. Our Stratus electrodeposition platform is uniquely suited to achieve significant improvements in both the reliability and cost-effectiveness of 3D devices, aiding their rapid adoption into mainstream electronics. We all recognize that collaboration among various disciplines across the industry will be required to realize the full potential of 3D. Launched two years ago, the 3D program has been actively engaging with leading edge equipment and materials suppliers and leveraging their expertise to deliver manufacturable process solutions, said John Warlaumont, SEMATECH vice president of technology. NEXX s membership is the latest example of this new collaborative model that encourages participation with SEMATECH members in focused, cooperative R&D. Richard Brilla, vice president for strategy, alliances and consortia at CNSE, said, We are delighted to welcome NEXX Systems to the UAlbany NanoCollege, where it joins a host of the world s leading high-tech companies engaged in next-generation nanoelectronics research and development. This new partnership is further evidence that SEMATECH s expansion at CNSE is paying significant dividends, not only in world-class education and cuttingedge research, but also in economic outreach and growth. NEXX is well known for its innovation and expertise in the area of advanced wafer-level packaging items, and their participation in SEMATECH s 3D program will be very valuable, said Sitaram Arkalgud, SEMATECH s 3D program director. Our mission is to make 3D-TSV both manufacturable and cost effective, and we look forward to working with NEXX to deliver processes that will accelerate progress toward industry-wide implementation. The goal of SEMATECH s 3D IC program at the UAlbany NanoCollege is to ready TSV technology by addressing the infrastructure and development challenges in 3D-TSV, including materials characterization, unit processes and integration, equipment hardening, reliability, cost and benefit to device and circuit performance. Eventually, 3D interconnects will provide cost-effective ways to integrate diverse CMOS technologies and chips with emerging technologies such as micro- and nanoelectromechanical systems (MEMS, NEMS) and bio-chips. FOURTH EDITION 11

12 SEMATECH Research on Reliability of Workfunction Controlled High-k Metal Gates Recognized SEMATECH technologists report technical results on new materials and device structures at SSDM 2008 in Japan SEMATECH received the Solid State Devices and Materials (SSDM) Best Paper Award for its work on reliability of high-k metal gates. The paper was presented at the International Conference on Solid State Devices and Materials in September 2007 by Chang Yong Kang, research engineer in the Front End Processes (FEP) division of SEMATECH. The award ceremony took place on September 24 at the Tsukuba International Congress Center during the 2008 International Conference on Solid State Devices and Materials in Ibaraki, Japan. The paper, entitled nmosfet Reliability Improvement attributed to the Interfacial Dipole formed by La Incorporation in HfO2, was co-authored by Paul Kirsch, Dawei Heh, Chadwin Young, Gennadi Bersuker, Byoung Hun Lee, Prassana Sivasubramani, Seung Chul Song, Rino Choi and Raj Jammy of SEMATECH, and Daniel Lichtenwalner, Jesse Jur, and Angus Kingon of North Carolina State University. The paper investigates the reliability of nmosfets with lanthanumdoped HfO2 dielectrics, whose device performance and voltage threshold are suitable for future technology nodes applications. The best paper is selected each year by the attendees and the program committee. It gives me great pleasure to congratulate our engineers for this prestigious recognition of their success as they continue to address the challenges of integrating new materials and device structures for functionality, said Raj Jammy, vice president of materials and emerging technologies at SEMATECH. Quality work such as this paper and those being presented by our technologists this year - is representative of SEMATECH s commitment to provide innovative and practical solutions for continued scaling of semiconductor technologies that can easily be incorporated in real-world manufacturing environments. Figure shows TEM images of pmosfets with a high-k HfSiO2 gate dielectric/metal gate deposited on epi-sige channel. HfSiO2 remained amorphous with a little SiO2 interfacial layer. Additionally, at this year s conference, engineers from SEMATECH s FEP division delivered five technical papers describing new findings in advanced materials and device structures for continued scaling of semiconductor technologies. The papers outlined SEMATECH s leading-edge research related to high-k/metal gate (HKMG) materials and planar and non-planar CMOS technologies, including: 12 SEMATECH TECH REPORT

13 Emerging Technologies Performance and Reliability of High-k/Metal Gate Stacks: Interfacial Layer Defects examines high-pressure oxygen anneal (HPOA) and high-pressure hydrogen anneal (HPHA) processes applied to MOSFETs with metal electrode/high-k dielectric stacks. Mechanisms of Oxygen and Hydrogen Passivation using High Pressure Post-annealing Processes to Enhance the Performance of MOSFETs with Metal Gate/High-k Dielectric examines results on the performance and reliability of the high-k/metal gate stack transistors and discuss physical properties of the defects affecting these characteristics. High Mobility SiGe Channel pmosfets Epitaxially Grown on Si (100) Substrates with HfSiO2 High-k Dielectric and Metal Gate demonstrates high-mobility pmosfets on high quality epitaxial SiGe films selectively grown on Si substrates using a CVD system. Additive Process Induced Strain (APIS) Technology for Lg = 30nm Band-Edge High-k/Metal Gate nmosfet demonstrates that stressor spacer can be used to transfer stress into the channel for short channel devices in bandedge high-k/metal gate MOSFETs. Mitigation of CMOS Variability with Metal Gate examines the variability of polysilicon gate compared to metal gate process. The International Conference on Solid State Devices and Materials is an annual conference that provides a platform for technical experts to discuss the latest developments in solidstate devices and materials via presentations, seminars and plenary sessions. SEMATECH has been an active contributor to SSDM conferences since SSDM is one of many industry forums it uses to collaborate with scientists and engineers from corporations, universities and other research institutions, many of whom are research partners. Low Vt of -0.41V (25% Ge) and -0.24V (40% Ge) of SiGe channel pmosfets, which are significantly lower than Vt of ref. Si channel. GIDL currents are governed either by gate leakage current (25% Ge) or substrate current (40% Ge), which confirms a high BTBT current on small band gap energy channel materials (or high Ge %). FOURTH EDITION 13

14 ISMI Manufacturing Week Leading industry speakers, informative sessions and keynote speakers from Toshiba and Texas Instruments focused on best practices and business strategies that shape manufacturing growth ISMI M an u f ac tu r in g We e k O CTOBE R 2008 AU ST IN, T E XA S On October 20-23, more than 300 technologists, fab engineers, and managers gathered to discuss volume productivity issues in the semiconductor industry at this year s ISMI Manufacturing Week, featuring the 5th ISMI Symposium on Manufacturing Effectiveness. Held in Austin, TX, not far from SEMATECH s headquarters, the four-day event, themed Productivity Challenges, included two days of 13 short courses and workshops and attracted 42 exhibitors along with a record-setting 13 sponsors. More than 80 dynamic, data-driven presentations were given by experts in fab and equipment productivity, yield and metrology, environmental design, simulation and modeling, statistical methods, and other critical areas. A robust set of poster sessions augmented conference session topics, and at the close of each day, a networking reception was held to provide attendees an opportunity to exchange information. Kicking off the 5th ISMI Symposium on Manufacturing Effectiveness, keynote speaker, Masakazu Kakumu, vice president of semiconductor system LSI division of the Toshiba Corporation, laid out Toshiba s strategic vision and discussed the best practices applied to Toshiba s 300 mm CR for enhancing productivity. Specifically, the company will focus on next-generation factory (NGF) methods to boost productivity, improve yields, gain savings through environmental programs, and achieve more energy efficiency. 14 The following day, keynote presenter Steve James, Dallas wafer fab (DFAB) manager for Texas Instruments, discussed lean manufacturing principles and the dramatic impact of such methods on fab operations within TI. The semiconductor industry is the epitome of high-tech, but we need to integrate low-tech programs for factories to perform. These low-tech best practices are a critical component of manufacturing, and we should apply methodologies for improvement from other industries. In our case, we ve seen huge improvement in people productivity, quality, cost, and cycle time using a largely unconventional approach. Steve James, Dallas wafer fab (DFAB) manager for Texas Instruments James described Kaizen Blitzes (e.g., continuous improvement) as a method TI s DFAB Dallas used to improve productivity. Last year, the fab conducted 46 Kaizen Blitz events involving 455 people; as a result, productivity has been steadily rising. Other speakers at the annual symposium detailed the importance of preventive maintenance techniques. One ISMI Symposium highlight was a timely panel discussion that addressed tough questions on real-world barriers posed by the unfolding economy and its effect on the future state SEMATECH TECH REPORT

15 ISMI of semiconductor manufacturing, specifically in G7 countries. The panel, entitled Will Semiconductor Manufacturing Survive in the G7 Countries?, was moderated by worldrenowned industry expert Dan Hutcheson, CEO of VLSI Research, and featured a panel of high profile executives including the following: Brett Hodess, deputy director of U.S. equity research and co-leader of the technology sector for Merrill Lynch Mike Cadigan, general manager, Semiconductor Solutions, Global Engineering Solutions of IBM Harvey Frye, president, Tokyo Electron America (TEA) Kenneth Flamm, professor and Dean Rusk chair in International Affairs at the LBJ School of Public Affairs at UT-Austin. Approximately, 200 attendees listened as the panel discussed why the major industrial nations should retain chip-making for the foreseeable future, as well as addressed their concerns surrounding the current and future direction of semiconductor manufacturing in G7 countries: U.S., Japan, Germany, France, UK, Canada, and Italy. IBM s Mike Cadigan thanked the folks from ISMI for hosting the event. I think that the industry we all know and love is going to be in for a fairly challenging time and I do think that the topics that have been discussed at the Symposium are very much aligned with what challenges the industry is going to face. From left: Mike Cadigan, Kenneth Flamm, Harvey Frye and Brett Hodess during the panel discussion The week concluded with ISMI s 450 mm wafer transition strategy and next generation factory (NGF) sessions. Over 100 attendees gathered for an in-depth technical briefing on the status of the 450 mm transition and updates on the NGF program. SAVE THE DATE ISMI Manufacturing Week October 19-22, 2009 FOURTH EDITION 15

16 ISMI Recognizes TEL and Applied Materials for Excellence in Equipment Energy Reduction ISMI The International SEMATECH Manufacturing Initiative (ISMI) has recognized Tokyo Electron Limited (TEL) and Applied Materials, Inc. for their dedication to resource conservation in the semiconductor equipment industry. In appreciation of their excellence in equipment energy reduction, plaques were presented to Mr. Satoshi Saito, director EHS, TEL, and Dr. Stanley Hughes, product safety director, Applied Materials, during a reception that followed the recent Equipment Energy and Utility Reduction Workshop sponsored by ISMI. The workshop was held in conjunction with ISMI Manufacturing Week, October in Austin, Texas. Sandro Pampel, ISMI s ESH Energy Conservation Program leader and workshop organizer said, This year s recipients demonstrated a sustained commitment to resource conservation for semiconductor manufacturing equipment. Pampel added, These companies have implemented effective internal processes to characterize and improve the environmental performance of their products, influenced industry standards for resource conservation, and demonstrated improved performance and roadmaps for their 300 mm semiconductor manufacturing equipment product lines. Companies who are recognized by ISMI for equipment energy reduction are suppliers who have significantly and consistently contributed to process equipment energy conservation initiatives. Subscribe to the SEMATECH Tech Report Keep up to date with the latest SEMATECH and ISMI industry news and information. To subscribe online, visit or complete the form below and fax to , attention Kristy Coulter, or mail it to us at: SEMATECH Tech Report Subscription 257 Fuller Rd, Suite 2200 Albany, NY I would like to receive the Tech Report (please tick): mail Company...Contact Name... Address... City... State...Zip Code... Address SEMATECH TECH REPORT