National Projects on Semiconductor in NEDO
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1 National Projects on Semiconductor in NEDO June 17, 2011 Toru Nakayama New Energy and Industrial Technology Development Organization (NEDO), Japan
2 Contents About NEDO NEDO s projects for semiconductor EUV Lithography Outline of the new project
3 NEDO s Mission and Approach 2 Mission As Japan s largest funding agency promoting research and development as well as the diffusion of energy, environmental, and industrial technologies, NEDO has a crucial mission to carry out. Addressing energy and global environmental challenges Enhancement of industrial competitiveness Approach Based on the goals of outcome oriented and user friendly operation, NEDO, a professional research and development management organization, employs a Plan-Do-See (PDS) approach. Promotion of R&D through Selecting and Focusing Flexible and agile project management through rigorous evaluations
4 NEDO s Role in R&D 3 Ministry of Economy, Trade and Industry (METI) Budget: 210 billion Number of personnel: Approx 1,000 Coordination with National policy Promotion of R&D projects Autonomous and advanced R&D project management R&D activities with flexible and agile project management Combined efforts of industry, government, and academia Industry Universities Public research institutes
5 Chairman President Executive Directors Organization of NEDO (as of July 1, 2010) Auditors Auditor Support Office Head Office General Affairs and Policy Planning Department Assets Management Department Personnel Affairs Department Accounting Department Inspection and Operational Management Department Information and Systems Department Evaluation Department Industrial Technology Center Technological Development Promotion Department Electronics, Materials Technology and Nanotechnology Department Biotechnology and Medical Technology Department Machinery Systems Department 4 Energy and Environment Center Energy and Environment Policy Department International Affairs Department Smart Community Department New Energy Technology Department Environment Department Kyoto Mechanisms Promotion Department Overseas Offices Branch Offices Washington, Palo Alto, Europe, Beijing, Bangkok-Jakarta, New Delhi Hokkaido, Kansai, Kyushu
6 NEDO s Program by Tech Segments Energy <60.5BY> Photovoltaic and solar-thermal, Wind, Biomass, Geothermal and hydraulic, Fuel cell, Smart community etc. 5 Environment <6.7BY> 3R (Reduce, Reuse, Recycle)/Water recycling, HFC, PFC, and SF6 measures etc. Electronics and Information <14.7BY> Semiconductor, Storage memory, Network, Display devices Machinery and Manufacturing <4.5BY> Robot, MEMS & laser, Aircraft & space, Welfare equipment Materials and Nanotechnology <8.4BY> Materials & components, Energy, resources, and environment etc. Life Science <8.9BY> Health care (Drug discovery), Medical technology etc.
7 About NEDO NEDO s projects for semiconductor EUV Lithography Outline of the new project
8 Past 10 Years R&D Items 7 LSI DESIGN High Efficiency Design for SoC, Next Generation Design For Manufacturing FEOL High-k Materials, High Mobility Channel, Fluctuation in MOS Device BEOL Low-k Materials, Advanced Interconnects LITHOGRAPHY Design, Drawing and Inspection of Photomask, EUV Exposure System, EUV resist materials, Inspection, Repairing, and Handling of EUV Mask ASSEMBLY & PACKAGING High Density Packaging, 3D-Integration Packaging Devices and Circuits High-speed Nonvolatile Memory, Low-power Circuits, Nano-electronics
9 Related NEDO Projects 1 8 More Moore High-k gate mat., Low-k insulation mat., Fin-FET, EUVL mask and sources, etc. *Next-generation Semiconductor Materials and Process Technology (MIRAI) Project (FY ) Design-Process integration *Next-generation Process-friendly Design Technologies (FY ) Low-power design *Extremely Low-power Circuits and Systems (FY ) More Than Moore 3D-integration *3D-Integration Technology (FY )
10 Related NEDO Projects 2 9 Beyond CMOS Ⅲ-Ⅴ Semiconductor, CNT, Phase change devices, Non-Silicon devices *Nano-electronics Device Technology (FY ) *Spintronics Nonvolatile Technology (FY ) *High-speed Nonvolatile Memory Technology (FY ) Others *SoC Manufacturing Systems Control Technology (FY ) *Next-generation Power Electronics Technology (FY ) Optical devices, Silicon Photonics *High speed Network Device Technology (FY )
11 About NEDO NEDO s projects for semiconductor EUV Lithography Outline of the new project
12 Focus on EUV Lithography 11 Fiscal Year α-tool Evaluation Mask Resist & Process MIRAI1 & 2(BI) / ASET EUV Patterning System prj /ASET Blanks Inspection Mirror Cleaning Nanolithography Materials /Tokyo Ohka & Hiachi Integration/Selete SFET EUV Resist Evaluation /ASET EUV1 MIRAI3 MIRAI3 EUV Mask prj /Selete Utilizing outcomes Sharing Information Canon Nikon Exposure System EUV Optics Metrology /ASET, EUVA(Nikon & Canon) EUV Exposure System prj /EUVA(Ushio, Komatsu, Nikon, & Canon) EUV Optics Metrology /Nikon & Canon EUV Exposure System /Nikon & Canon High Power Source /Ushio & Komatsu Leading Project on Source /15 Universities MIRAI3 High Reliability Source /EUVA(Ushio & Komatsu) :NEDO :MEXT :Industries Activity
13 Typical Achievements of MIRAI3 Project 12 EUV Mask Blank Inspection Develop. of of phase-defect inspection tool for 6 6 blank Confirmation of of present-status of of defects for 6 6 blank Successful detection of of small defect with H1.1nm and W20nm EUV Sources Develop. of of Sn Ion mitigation with magnetic field and high conversion efficiency (CE) with pre-pulse irradiation in in LPP Develop. of of fast ion charge mitigation and high CE with advanced laser trigger method, and lifetime evaluation of of collector with 1Gshots exposure in in DPP
14 About NEDO NEDO s projects for semiconductor EUV Lithography Outline of the new project
15 Background for New EUVL Project 14 A lot of fundamental achievements were accomplished by domestic consortia including Selete, EUVA, ASET, and AIST in EUVL related projects last 10 years. To facilitate the EUVL commercially, critical issues on mask and resist technologies in which Japanese industries have advantages should be solved. NEDO starts New EUVL Project focusing on R&D of mask inspection and resist process and materials. The project is executed by cooperation among selected competitive companies and academia in Japan, involving global collaboration.
16 New EUVL Project Outline 15 Objective EUV Mask Technology and Resist Process/Materials for hp16 nm node and beyond Term FY NEDO Budget 2.8 billion (FY 2011) Framework of Project Concentrated R&D in Tsukuba Innovation Arena International Joint Development Inter-Enterprise and Industries/Academia Collaboration NEDO Contract EIDEC JD EBARA, Lasertec Recontract Osaka Univ., Univ. of Hyogo JD Hynix Semicon. Intel Samsung Elec. TSMC
17 New EUVL Project Outline (cont d) 16 First Phase (FY ) Development for hp16 nm Node New Mask Blank Inspection Establishment of fundamental technology and clarification of technical indices on phase defect inspection for 6 blank New Mask Pattern Inspection Establishment of fundamental technology and clarification of technical indices on pattern defect inspection for 6 blank New EUV Resist Process and Materials Determination of criteria on LWR, sensitivity and outgas, and development of resist materials with these criteria Second Phase (FY ) Further Development of above technologies applicable to hp11 nm Node Advanced Inspection Technologies Advanced Resist Process and Materials
18 Summary 17 NEDO has been promoting various kinds of R&D projects on More Moore. Specifically in EUVL related projects, there were a lot of outcomes in the fields of source, exposure tool, resist, mask and so on produced by domestic consortia such as Selete, EUVA, ASET, and AIST. NEDO strongly recognizes that collaboration among major semiconductor makers, companies of mask, equipment and materials, and academia accelerates the practical use of EUVL technology. Thus, NEDO started New EUVL Project which is promoted by joint R&D between domestic and overseas organizations.
19 18 Thank you for your attention. More information can be found on NEDO s Web site at
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