Curriculum Vitae. Education. Distinctions. Personal info

Transcription

1 Personal info Full name: Date/Place of birth: February 24 th, 1982, Athens, Greece Nationality: Greek Personal website: Education , Ph.D. in Microelectronics / Digital Hardware Design National and Kapodistrian University of Athens, Informatics and Telecommunications Department Thesis: Using scripting languages for hardware/software co-design Advisor: Associate Professor E. Manolakos (National and Kapodistrian University of Athens, Greece) , MSc in Microelectronics - Integrated Circuit Design National and Kapodistrian University of Athens, Informatics and Telecommunications Department Thesis: Design of an SOM IP core with systolic architecture and implementation on an FPGA device Advisor: Associate Professor E. Manolakos (National and Kapodistrian University of Athens, Greece) , BSc in Electronic Engineering Technological Educational Institution of Athens, Electronics Department Thesis: Applications with Java Cards Advisor: Professor P. Hatzidiakos (Technological Educational Institution of Athens, Greece) , 1 st Technical High School, Galatsi, Athens, Greece, Grade 19.2/20 (first in my year) Distinctions

2 , scholarship for PhD studies from the State Scholarship Foundation of Greece (IKY). Working experience 2018 now, Infineon Technologies, Austria, Integrated Circuit Senior Digital Designer for Automotive applications. In this role I had the following tasks and responsibilities: RTL design Digital/mixed signal blocks architectural specification writing RTL auto-generation tools development Design/verification strategies definition RTL formal/functional verification FPGA lab validation , NXP Semiconductors, Austria, Integrated Circuit Digital Designer for Automotive applications. In this role I had the following tasks and responsibilities: RTL design Digital/mixed signal blocks architectural specification writing RTL formal/functional verification Power/timing constraints development Static Timing Analysis Workflow automation and scripting Lab validation , I have worked in a company ( which specializes in the design and construction of automated systems. My main task was the PCB design and programming of various microcontrollers (PIC, AVR) in assembly and embedded C language. Research experience , involved in a project for my PhD thesis for the development of a High Level digital hardware description tool, called SysPy (System Python). SysPy focuses on the design of processor-centric systems, targeting FPGA implementations.

3 Advisor: Associate Professor E. Manolakos, National and Kapodistrian University of Athens, Greece, Informatics and Telecommunications Department , Hardware implementation of neural network algorithms with the use of FPGA devices. The architecture has been described as an IP core in synthesizable VHDL. A systolic array approach has been used for the software to hardware transition of the specific algorithm. Various parameters of the designed IP core are tunable making the design flexible enough for a large number of applications. Advisor: Associate Professor E. Manolakos, National and Kapodistrian University of Athens, Greece, Informatics and Telecommunications Department , participation in the design and construction of an experimental PET (Positron Emission Tomography) scanner. During my involvement in this project I have designed and constructed several analog and digital electronic circuits for the testing and processing hardware units of the scanner (design of DAQ and motor control systems). Advisor: Professor G. Tzanakos, National and Kapodistrian University of Athens, Greece, Physics Department Teaching experience , student supervisor at the laboratories of the following postgraduate courses at the Informatics and Telecommunication Department of the National and Kapodistrian University of Athens, Greece: Embedded Systems Digital Signal Processing Systems. During my assignment I have been involved in the authoring of the laboratory exercises for the necessities of both courses. The teaching professor of both courses is the Associate Professor E. Manolakos. Technical skills Hands on experience in synthesizable VHDL/Verilog/SystemVerilog and schematic software for digital design targeting FPGA/ASIC implementation.

4 Hands on experience in digital verification methodologies, using formal (PSL) and functional (HDL self-checking testbenches) tests. Hands on experience in analog/digital mixed-mode ASIC design/verification. Hands on experience in high performance computing applications using customized digital hardware accelerators, e.g. neural network algorithms. Hands on experience in digital backend design activities (digital synthesis, timing (SDC) / power (CPF) constraints definition, Static Timing Analysis). Hands on experience in C/embedded C, assembly (for x86 and MIPS processors and for various microcontrollers), Java (especially for smart card programming), Matlab. Hands on experience in embedded systems design for FPGA implementations, using processor soft/hardwired IP cores (Leon, OpenRisc, MicroBlaze, PowerPC, PicoBlaze), in conjunction with embedded Linux OS. Hands on experience in scripting languages (e.g. Python, Tcl). Hands on experience in using/administrating Linux/Unix/Windows operating systems. Experience in embedded software/hardware and low level programming for IoT devices and networks. Experience in PCB design (Cadence s tools). Experience in DSP processor programming (Texas Instrument s tools). Experience in DAQ software (e.g. LabView). Languages Greek (native speaker) English (First Certificate in English, University of Cambridge, 1997)

5 Publications Journal papers E. Logaras, O. G. Hazapis, and E. S. Manolakos, Python to accelerate embedded SoC design: a case study for systems biology, ACM Transactions on Embedded Computing Systems, vol. 13, no. 4, pp. 84:1-84:25, February, 2014 G. Tzanakos, M. Nikolaou, D. Drakoulakos, D. Karamitros, G. Kontaxakis, E. Logaras, G. Panayiotakis, S. Pavlopoulos, M. Skiadas, G. Spyrou, T. Thireou and D. Vamvakas, Design considerations and construction of a small animal PET prototype, Nuclear Instruments and Methods in Physics Research Section A: Accelerators, Spectrometers, Detectors and Associated Equipment, VOL 569, Issue 2, DECEMBER 2006, p Conference papers G. Vrettos, E. Logaras, and E. Kalligeros, Towards standardization of MQTT-alertbased sensor networks: protocol structures formalization and low-end node security, in Proc. IEEE International Symposium on Industrial Embedded Systems (SIES), 2018 E. Logaras, A. Weitzer, Using Python tools to assist mixed-signal ASIC design and verification methodologies, in Proc. Austrochip workshop on Microelectronics, pp , 2017 E. Logaras, E. Koutsouradis and E. S. Manolakos, Python facilitates the rapid prototyping and hw/sw verification of processor centric SoCs for FPGAs, in Proc. IEEE International Symposium on Circuits and Systems (ISCAS), pp , 2016 O. G. Hazapis, E. Logaras and E. S. Manolakos, A soft IP core generating SoCs for the efficient stochastic simulation of large Biomolecular Networks using FPGAs, in Proc. IEEE International Conference on Electronics, Circuits and Systems (ICECS), pp , 2012 E. Logaras and E. S. Manolakos, SysPy: using Python for processor-centric SoC design, In Proc. IEEE International Conference on Electronics, Circuits and Systems (ICECS), pp , 2010

6 C. Pafilis, A. Gaitanis, C. Gatis, G. Kontaxakis, E. Logaras, S. Pavlopoulos, G. Panayiotakis, G. Spyrou, G. Tzanakos, D. Vamvakas, Construction and initial studies of a two block small animal PET scanner, International conference on imaging techniques in subatomic physics, astrophysics, medicine, biology and industry, E. S. Manolakos, E. Logaras, and F. Paschos, Wireless Sensor Network Application for Fire Hazard Detection and Monitoring, Proc. 1st International Conference on Sensor Networks Applications, Experimentation and Logistics (SENSAPPEAL), 2009 K. Samalekas, E. Logaras, E. S. Manolakos, Embedded web server for the AVR Butterfly enabling immediate access to wireless sensor node readings, In Proc. 1st International Conference on Sensor Networks Applications, Experimentation and Logistics (SENSAPPEAL), 2009 Manolakos, I. Logaras, E., High Throughput Systolic SOM IP Core for FPGAs, In Proc. IEEE International Conference on Acoustics, Speech, and Signal Processing (ICASSP), vol. 2, pp. II-61-II-64, 2007 S. Pavlopoulos, D. Drakoulakos, D. Karamitros, G. Kontaxakis, E. Logaras, M. Nikolaou, G. Panayotakis, M. Skiadas, G. Spyrou, T. Thireou, G. Tzanakos, D. Vamvakas, Tests and Measurements for Characteristics Optimization of Photomultiplier Tubes used in a Positron Emission Tomography System, In Proc. IEEE NSS and MIC Conference, 2004 S. Pavlopoulos, D. Drakoulakos, D. Karamitros, G. Kontaxakis, E. Logaras, M. Nikolaou, G. Panayotakis, M. Skiadas, G. Spyrou, T. Thireou, G. Tzanakos, D. Vamvakas, Design Considerations and Initial Evaluation Results of a Small Animal PET Prototype, In Proc. IEEE NSS and MIC Conference, 2004 Invited talks/seminars Programming Silicon in the era of mixed signal processing, University of the Aegean, Department of Information and Communication Systems Engineering, Samos, Greece, 2016