MC74LVX8051. Analog Multiplexer/ Demultiplexer High Performance Silicon Gate CMOS

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MC74X051 Analog Multiplexer/ Demultiplexer igh Performance Silicon Gate CMOS The MC74X051 utilizes silicon gate CMOS technology to achieve fast propagation delays, low ON resistances, and low leakage

1 MC74X051 Analog Multiplexer/ Demultiplexer igh Performance Silicon Gate CMOS The MC74X051 utilizes silicon gate CMOS technology to achieve fast propagation delays, low ON resistances, and low leakage currents. This analog multiplexer/demultiplexer controls analog voltages that may vary across the complete power supply range (from to ). The X051 is similar in pinout to the high speed C4051A and the metal gate MC14051B. The Channel Select inputs determine which one of the Analog Inputs/Outputs is to be connected, by means of an analog switch, to the Common Output/Input. When the Enable pin is IG, all analog switches are turned off. The Channel Select and Enable inputs are compatible with standard CMOS outputs; with pull up resistors they are compatible with STT outputs. This device has been designed so that the ON resistance (R on ) is more linear over input voltage than R on of metal gate CMOS analog switches. Features Fast Switching and Propagation Speeds ow Crosstalk Between Switches Diode Protection on All Inputs/Outputs Analog Power Supply Range ( ) = 2.5 to.0 Digital (Control) Power Supply Range ( ) = 2.5 to.0 Improved inearity and ower ON Resistance Than Metal Gate Counterparts ow Noise In Compliance With the Requirements of JEDEC Standard No. 7A Chip Complexity: X FETs or 4 Equivalent Gates These Devices are Pb Free and are RoS Compliant SOIC D SUFFIX CASE 751B PIN ASSIGNMENT TSSOP DT SUFFIX CASE 94F X2 X1 X0 X3 A B C X4 X X X7 X5 Enable NC MARKING DIAGRAMS 1 1 X051G AWYWW SOIC X 051 AYW TSSOP X051 = Specific Device Code A = Assembly ocation W, = Wafer ot Y = Year WW, W = Work Week G or = Pb Free Package (Note: Microdot may be in either location) ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page of this data sheet. Semiconductor Components Industries, C, 14 August, 14 Rev. 1 Publication Order Number: MC74X051/D

2 MC74X051 X0 13 X1 14 X2 ANAOG INPUTS/ X3 12 OUTPUTS X4 1 X5 5 X 2 X7 4 A CANNE SEECT B INPUTS C 9 ENABE MUTIPEXER/ DEMUTIPEXER PIN = PIN = 3 X COMMON OUTPUT/ INPUT FUNCTION TABE MC74X051 Control Inputs Select Enable C B A X = Don t Care X X X ON Channels X0 X1 X2 X3 X4 X5 X X7 NONE OGIC DIAGRAM MC74X051 Single Pole, Position Plus Common Off MAXIMUM RATINGS Symbol Parameter alue Unit Positive DC Supply oltage (Referenced to ) 0.5 to +7.0 IS Analog Input oltage 0.5 to in Digital Input oltage (Referenced to ) 0.5 to I DC Current, Into or Out of Any Pin ± ma P D Power Dissipation in Still Air, SOIC Package TSSOP Package T stg Storage Temperature Range 5 to +0 C T ead Temperature, 1 mm from Case for Seconds C Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. Derating: SOIC Package: 7 mw/ C from 5 to 1 C TSSOP Package:.1 mw/ C from 5 to 1 C mw This device contains protection circuitry to guard against damage due to high static voltages or electric fields. owever, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high impedance circuit. For proper operation, in and out should be constrained to the range ( in or out ). Unused inputs must always be tied to an appropriate logic voltage level (e.g., either or ). Unused outputs must be left open. RECOMMENDED OPERATING CONDITIONS Symbol Parameter Min Max Unit Positive DC Supply oltage (Referenced to ) IS Analog Input oltage 0.0 in Digital Input oltage (Referenced to ) IO * Static or Dynamic oltage Across Switch 1.2 T A Operating Temperature Range, All Package Types C t r, t f Input Rise/Fall Time (Channel Select or Enable Inputs) = 3.3 ± 0.3 = 5.0 ± 0.5 Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond the Recommended Operating Ranges limits may affect device reliability. *For voltage drops across switch greater than 1.2 (switch on), excessive current may be drawn; i.e., the current out of the switch may contain both and switch input components. The reliability of the device will be unaffected unless the Maximum Ratings are exceeded ns/ 2

3 MC74X051 DC CARACTERISTICS Digital Section (oltages Referenced to ) Symbol Parameter Condition I I I in Minimum igh evel Input oltage, Channel Select or Enable Inputs Maximum ow evel Input oltage, Channel Select or Enable Inputs Maximum Input eakage Current, Channel Select or Enable Inputs R on = Per Spec 2.5 R on = Per Spec 2.5 Guaranteed imit 55 to C 5 C 1 C in = or ±0.1 ±1.0 ±1.0 A Unit I CC Maximum Quiescent Supply Current (per Package) Channel Select, Enable and IS = or ; IO = A DC EECTRICA CARACTERISTICS (Analog Section) Symbol Parameter Test Conditions R on Maximum ON Resistance in = I or I IS = to I S.0 ma (Figures 1, 2) R on I off I on Maximum Difference in ON Resistance Between Any Two Channels in the Same Package Maximum Off Channel eakage Current, Any One Channel Maximum Off Channel eakage Current, Common Channel Maximum On Channel eakage Current, Channel to Channel in = I or I IS = or (Endpoints) I S.0 ma (Figures 1, 2) in = I or I IS = 1/2 ( ) I S.0 ma in = I or I ; IO = or ; Switch Off (Figure 3) in = I or I ; IO = or ; Switch Off (Figure 4) in = I or I ; Switch to Switch = or ; (Figure 5) Guaranteed imit 55 to C 5 C 1 C Unit A A 3

4 MC74X051 AC CARACTERISTICS (C = 50 pf, Input t r = t f = 3 ns) Symbol t P, t P t P, t P t PZ, t PZ t PZ, t PZ Parameter Maximum Propagation Delay, Channel Select to Analog Output (Figure 9) Maximum Propagation Delay, Analog Input to Analog Output (Figure ) Maximum Propagation Delay, Enable to Analog Output (Figure ) Maximum Propagation Delay, Enable to Analog Output (Figure ) Guaranteed imit 55 to C 5 C 1 C C in Maximum Input Capacitance, Channel Select or Enable Inputs pf C I/O Maximum Capacitance Analog I/O pf (All Switches Off) Common O/I Feedthrough Unit ns ns ns ns C, = 5.0 C PD Power Dissipation Capacitance (Figure 13)* 45 * Used to determine the no load dynamic power consumption: P D = C PD 2 CC f + I CC. pf ADDITIONA APPICATION CARACTERISTICS ( = 0 ) Symbol Parameter Condition imit* C Unit BW Maximum On Channel Bandwidth or Minimum Frequency Response (Figure ) f in = 1Mz Sine Wave; Adjust f in oltage to Obtain 0dBm at OS ; Increase f in Frequency Until db Meter Reads 3 db; R = 50, C = pf Mz Off Channel Feedthrough Isolation (Figure 7) f in = Sine Wave; Adjust f in oltage to Obtain 0dBm at IS f in = kz, R = 00, C = 50 pf db f in = 1.0 Mz, R = 50, C = pf Feedthrough Noise. Channel Select Input to Common I/O (Figure ) in 1Mz Square Wave (t r = t f = ns); Adjust R at Setup so that I S = 0 A; Enable = R = 00, C = 50 pf m PP R = k, C = pf TD Total armonic Distortion (Figure 14) f in = 1 kz, R = k, C = 50 pf TD = TD measured TD source IS = 2.0 PP sine wave IS = 4.0 PP sine wave IS = 5.0 PP sine wave % *imits not tested. Determined by design and verified by qualification. 4

5 MC74X051 Ron, ON RESISTANCE (OMS) C 5 C C - 55 C IN, INPUT OTAGE (OTS) Figure 1a. Typical On Resistance, = R on, ON RESISTANCE (OMS) 5 1 C 5 C C - 55 C R on, ON RESISTANCE (OMS) 5 1 C 5 C C - 55 C IN, INPUT OTAGE (OTS) Figure 1b. Typical On Resistance, = IN, INPUT OTAGE (OTS) Figure 1c. Typical On Resistance, = POTTER PROGRAMMABE POWER SUPPY MINI COMPUTER DC ANAYZER - + DEICE UNDER TEST ANAOG IN COMMON OUT Figure 2. On Resistance Test Set Up 5

6 MC74X051 A NC ANAOG I/O I I Figure 3. Maximum Off Channel eakage Current, Any One Channel, Test Set Up Figure 4. Maximum Off Channel eakage Current, Common Channel, Test Set Up A ON N/C f in 0.1 F ON OS C * R db METER ANAOG I/O I Figure 5. Maximum On Channel eakage Current, Channel to Channel, Test Set Up Figure. Maximum On Channel Bandwidth, Test Set Up f in 0.1 F IS R OS C * R db METER R ANAOG I/O R ON/ /ON R C * TEST POINT I or I CANNE SEECT in 1 Mz t r = t f = 3 ns CANNE SEECT Figure 7. Off Channel Feedthrough Isolation, Test Set Up Figure. Feedthrough Noise, Channel Select to Common Out, Test Set Up

7 MC74X051 CANNE SEECT 50% ANAOG I/O ON/ /ON C * TEST POINT t P t P ANAOG OUT 50% CANNE SEECT Figure 9a. Propagation Delays, Channel Select to Analog Out Figure 9b. Propagation Delay, Test Set Up Channel Select to Analog Out ANAOG IN 50% ANAOG I/O ON C * TEST POINT t P t P ANAOG OUT 50% Figure a. Propagation Delays, Analog In to Analog Out Figure b. Propagation Delay, Test Set Up Analog In to Analog Out t f t r 90% CC ENABE 50% % t PZ t PZ ANAOG OUT ANAOG OUT 50% 50% t PZ t PZ % 90% Figure a. Propagation Delays, Enable to Analog Out IG IMPEDANCE O O IG IMPEDANCE POSITION 1 WEN TESTING t PZ AND t PZ POSITION 2 WEN TESTING t PZ AND t PZ ANAOG I/O ENABE ON/ C * Figure b. Propagation Delay, Test Set Up Enable to Analog Out 1k TEST POINT 7

8 MC74X051 f in 0.1 F R IS ON OS ANAOG I/O ON/ /ON A NC R R C * R C * CANNE SEECT Figure 12. Crosstalk Between Any Two Switches, Test Set Up Figure 13. Power Dissipation Capacitance, Test Set Up IS OS 0.1 F TO f in ON DISTORTION R METER C * Figure 14a. Total armonic Distortion, Test Set Up db FUNDAMENTA FREQUENCY DEICE SOURCE FREQUENCY (kz) Figure 14b. Plot, armonic Distortion APPICATIONS INFORMATION The Channel Select and Enable control pins should be at or logic levels. being recognized as a logic high and being recognized as a logic low. In this example: = = logic high = 0 = logic low The maximum analog voltage swing is determined by the supply voltage. The positive peak analog voltage should not exceed. Similarly, the negative peak analog voltage should not go below. In this example, the difference between and is five volts. Therefore, using the configuration of Figure, a maximum analog signal of five volts peak to peak can be controlled. Unused analog inputs/outputs may be left floating (i.e., not connected). owever, tying unused analog inputs and outputs to or through a low value resistor helps minimize crosstalk and feedthrough noise that may be picked up by an unused switch. Although used here, balanced supplies are not a requirement. The only constraints on the power supplies are that: = 2 to volts When voltage transients above and/or below are anticipated on the analog channels, external Germanium or Schottky diodes (D x ) are recommended as shown in Figure. These diodes should be able to absorb the maximum anticipated current surges during clipping.

9 MC74X051 0 ANAOG SIGNA ON ANAOG SIGNA 0 D x D x ON/ D x D x 9 TO EXTERNA CMOS CIRCUITRY 0 to 5 DIGITA SIGNAS Figure. Application Example Figure. External Germanium or Schottky Clipping Diodes ANAOG SIGNA ON/ ANAOG SIGNA * R R R ANAOG SIGNA ON/ ANAOG SIGNA 9 STT/NMOS CIRCUITRY 9 STT/NMOS CIRCUITRY * 2K R K CT1GT50 BUFFERS a. Using Pull Up Resistors b. Using CT Interface Figure 17. Interfacing STT/NMOS to CMOS Inputs A EE SIFTER 13 X0 14 X1 B EE SIFTER X2 12 X3 C 9 EE SIFTER 1 X4 5 X5 ENABE EE SIFTER 2 X 4 X7 Figure 1. Function Diagram, X051 3 X 9

10 MC74X051 ORDERING INFORMATION MC74X051DR2G Device Package Shipping SOIC (Pb Free) 00 Tape & Reel MC74X051DTG TSSOP (Pb Free) 9 Units / Rail MC74X051DTR2G TSSOP (Pb Free) 00 Tape & Reel For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD0/D.

11 MC74X051 PACKAGE DIMENSIONS TSSOP CASE 94F ISSUE B 0. (0.00) T 0. (0.00) T 0. (0.004) T SEATING PANE U PIN 1 IDENT. U D S S 2X /2 C X K REF 0. (0.004) M T U S S K 9 1 A G J1 K1 ÇÇÇ ÉÉÉ B SECTION N N U J N 0. (0.0) M N F DETAI E DETAI E W NOTES: 1. DIMENSIONING AND TOERANCING PER ANSI Y1M, CONTROING DIMENSION: MIIMETER. 3. DIMENSION A DOES NOT INCUDE MOD FAS. PROTRUSIONS OR GATE BURRS. MOD FAS OR GATE BURRS SA NOT EXCEED 0. (0.00) PER SIDE. 4. DIMENSION B DOES NOT INCUDE INTEREAD FAS OR PROTRUSION. INTEREAD FAS OR PROTRUSION SA NOT EXCEED 0. (0.0) PER SIDE. 5. DIMENSION K DOES NOT INCUDE DAMBAR PROTRUSION. AOWABE DAMBAR PROTRUSION SA BE 0.0 (0.003) TOTA IN EXCESS OF TE K DIMENSION AT MAXIMUM MATERIA CONDITION.. TERMINA NUMBERS ARE SOWN FOR REFERENCE ONY. 7. DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PANE W. MIIMETERS INCES DIM MIN MAX MIN MAX A B C D F G 0.5 BSC 0.02 BSC J J K K BSC 0.2 BSC M 0 0 SODERING FOOTPRINT* PITC X 0.3 X 1.2 DIMENSIONS: MIIMETERS *For additional information on our Pb Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SODERRM/D.

12 MC74X051 PACKAGE DIMENSIONS A 9 1 B SOIC CASE 751B 05 ISSUE K P P 0. (0.0) M B S NOTES: 1. DIMENSIONING AND TOERANCING PER ANSI Y1M, CONTROING DIMENSION: MIIMETER. 3. DIMENSIONS A AND B DO NOT INCUDE MOD PROTRUSION. 4. MAXIMUM MOD PROTRUSION 0. (0.00) PER SIDE. 5. DIMENSION D DOES NOT INCUDE DAMBAR PROTRUSION. AOWABE DAMBAR PROTRUSION SA BE (0.005) TOTA IN EXCESS OF TE D DIMENSION AT MAXIMUM MATERIA CONDITION. MIIMETERS INCES DIM MIN MAX MIN MAX A B C D F G 1.27 BSC BSC J K M P R T SEATING PANE G D P 0. (0.0) M T B S A S K C M R X 45 J F SODERING FOOTPRINT* X.40 X X PITC 9 DIMENSIONS: MIIMETERS *For additional information on our Pb Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SODERRM/D. ON Semiconductor and the are registered trademarks of Semiconductor Components Industries, C (SCIC) or its subsidiaries in the United States and/or other countries. SCIC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCIC s product/patent coverage may be accessed at Marking.pdf. SCIC reserves the right to make changes without further notice to any products herein. SCIC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCIC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Typical parameters which may be provided in SCIC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including Typicals must be validated for each customer application by customer s technical experts. SCIC does not convey any license under its patent rights nor the rights of others. SCIC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCIC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCIC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCIC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCIC was negligent regarding the design or manufacture of the part. SCIC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBICATION ORDERING INFORMATION ITERATURE FUFIMENT: iterature Distribution Center for ON Semiconductor P.O. Box 53, Denver, Colorado 0217 USA Phone: or Toll Free USA/Canada Fax: or Toll Free USA/Canada orderlit@onsemi.com N. American Technical Support: Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: Japan Customer Focus Center Phone: ON Semiconductor Website: Order iterature: For additional information, please contact your local Sales Representative MC74X051/D

MC74LVX8051. Analog Multiplexer / Demultiplexer. High Performance Silicon Gate CMOS

MC74LVX8051. Analog Multiplexer / Demultiplexer. High Performance Silicon Gate CMOS MC74X051 Analog Multiplexer / Demultiplexer igh Performance Silicon Gate CMOS The MC74X051 utilizes silicon gate CMOS technology to achieve fast propagation delays, low ON resistances, and low leakage