Application Note 1320

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1 ATF-3P8 9 MHz High Linearity Amplifier Application Note 3 Introduction Avago Technologies ATF-3P8 is an enhancement mode PHEMT designed for low noise and high linearity applications. With a noise figure of.6 db and OIP3 of 4 dbm, the ATF-3P8 is well suited as a base station first- or secondstage LNA. Application Guidelines This device operates as a normal FET requiring input and output matching, as well as DC biasing. Unlike a depletion mode transistor, this enhancement mode device only requires a single positive power supply, which means a positive voltage is placed on the drain and gate in order for the transistor to turn on. System Design Basics In order to fully appreciate the performance of the ATF-3P8, a designer must first understand a few simple system level basics. For example, the ATF-3P8 may be designed into a CDMA, WCDMA or GSM base station LNA. This may be a one-stage, two-stage or three-stage amplifier chain, as well as tower mounted or non-tower mounted. This application note assumes a two-stage LNA with Q and devices arranged as shown in Figure. Note that the performance requirements in, output IP3 and input IP3 differ for each stage. Additionally, if three stages are used then the requirements on those three amplifiers would slightly differ from this two-stage configuration. Typically, the first stage requires very low noise figure ( db or less) and good input IP3. This can be explained by the cascade noise figure, Equation : SYS = G a G a a2 () For example, if a low noise amplifier is trying to receive a mobile user on channel 3 in the presence of two in-band users at a higher power, then channel and channel 2 may create intermodulation products that fall directly on channel 3 (Figure 2). Thus, having good input IP3 lowers the IM3 products and allows better selectivity of channel 3. Otherwise, higher power in-band interferers obscure lower power mobile users that are farther away. ANT Q Figure. Two-stage base station LNA. From the total Input IP3 in equation 2, it is clear why each device must have good Input IP3. What is not noticeably apparent is the fact that all IIP3 measurements must be referred back to the same point. This is why succeeding stages need higher IIP3 than the previous stage. A later cascade example clarifies this point. The main point here is that cascaded IIP3 adds similar to resistors in parallel with the weakest amplifier dominating the entire chain. IIP3 DB G a G a a2 IIP3 2 IIP3 3 (2) The noise figure of the first stage completely dominates the noise figure of the entire system. For the second stage, or, noise figure is not as important, but it must have better input IP3 than Q. The final stage usually requires excellent output IP3 and excellent input IP3, but noise figure is definitely not an issue. Thus the question arises of why Input IP3 is so important. CH CH 2 CH 3 COMM. TOWER Figure 2. Ch and Ch2 create IM3 products on Ch3.

2 RF Input and Output Matching The ATF-3P8 may be matched either for maximum return loss, minimum noise figure, or maximum linearity. Figure 3 shows the impedance position of all of these points on a Smith Chart. Clearly there must be some tradeoff at least in linearity. From the previous discussion, it is clear that if this is the first device in a LNA chain, then is most important. Additionally, if this device is the second or third stage, then linearity and noise figure must both be well balanced. For a more detailed discussion on RF matching and DC biasing, refer to the application section of the Avago ATF-2P8 data sheet. For this application note, both first- and second-stage low noise amplifiers are presented. The first stage or Q is matched to on the input and on the output; that is, the input is matched for optimum noise figure and the output is matched for maximum linearity. The second stage amplifier is matched to.6-7 on the input and on the output; that is, the input match is a balance between VSWR and IP3, and the output is matched for maximum linearity. S* ΓSOURCE A Γ LOAD S22* B PCB Layout Figure 3. Input impedance (A) and output impedance (B) taken directly from the data sheet. C4 Avago R2 R4 C3 BCV62B R R3 C R R6 C2 C6 J L C L2 L3 C7 L4 R7 R8 Figure 4. ATF-3P8 PCB layout and component placement 2

3 First-stage LNA Active biasing helps keep the device drain current constant over temperature and over part-to-part variations. (Figure ) RF IN J R2 = 374 Ω R4 = 68. Ω C3 =. µf C2 = pf C = 2.2 pf L =. nh Vg R = Ω Q L2 = 2 nh 2 7 3PL ATF-3P8 Vbe Vds R = 6.4 Ω R3 = 4.32 Ω C =. µf R6 =.2 Ω C6 = pf L3 = nh C7 =.8 pf L4 = 2.7 nh Vdd = V C4 = µf RF OUT Table. First-stage LNA Bill of Materials C = 2.2 pf Phycomp 42CG229C9B C2 = pf Phycomp 63CGJ9B C3, C =. µf Phycomp 632F4M8B C4 = µf AVX 8ZCKATZA C6 = pf Phycomp 63CGJ9B C7 =.8 pf Phycomp 42CG89C9B L =. nh TOKO LL-FHNS L2 = 2 nh TOKO LL-FH2NJ L3 = nh TOKO LL68-FSRJ L4 = 2.7 nh TOKO LL-FH2N7S R = 6.4 Ω KOA RK73HJLTD6R4F R2 = 374 Ω KOA RK73H374F R3 = 4.32 Ω KOA RK73HJ4R32F R4 = 68. Ω KOA RK73HJ68RF R = Ω KOA RK73HJRF R6, R8 =.2 Ω KOA RK73HJR2F R7 = Ω Rohm MCRJ Q, Philips BCV62B J, Johnson R7 = Ω R8 =.2 Ω Figure. Schematic for low noise match with active bias Performance at 96 MHz GAIN (db) Figure 6. Gain and noise figure GAIN INPUT AND OUTPUT RETURN LOSS (db) Figure 7. Input and output return loss S22 S 4 3 OIP3 (dbm) 3 IIP3 (dbm) Figure 8. OIP3 Figure 9. IIP3 3

4 Second-stage LNA Table 2. Second-stage LNA Bill of Materials RF IN J R2 = 374 Ω R4 = 68. Ω C3 =. µf C2 = pf C =. pf L =. nh R7 = 8.2 Ω Vg R = Ω Q L2 = 2 nh 2 7 3PL ATF-3P8 Vbe Vds R = 6.4 Ω R3 = 4.32 Ω C =. µf R6 =.2 Ω C6 = pf L3 = nh C7 = 2.7 pf L4 = 2.7 nh R8 = Ω Vdd = V C4 = µf RF OUT C =. pf Phycomp 42CG9C9B C2 = pf Phycomp 63CGJ9B C3, C =. µf Phycomp 632F4M8B C4 = µf AVX 8ZCKATZA C6 = pf Phycomp 63CGJ9B C7 = 2.7 pf Phycomp 42CG279C9B L =. nh TOKO LL-FHNS L2 = 2 nh TOKO LL-FH2NJ L3 = nh TOKO LL68-FSRJ L4 = 2.7 nh TOKO LL-FH2N7S R = 6.4 Ω KOA RK73HJLTD6R4F R2 = 374 Ω KOA RK73H374F R3 = 4.32 Ω KOA RK73HJ4R32F R4 = 68. Ω KOA RK73HJ68RF R = Ω KOA RK73HJRF R6 =.2 Ω KOA RK73HJR2F R7 = 8.2 Ω KOA RK73HJ8R2F R8 = Ω Rohm MCRJ Q, Philips BCV62C J, Johnson Figure. Schematic for high IP3 with active bias Performance at 96 MHz GAIN (db) GAIN Figure. Gain and noise figure 4 INPUT AND OUTPUT RETURN LOSS (db) Figure 2. Input and output return loss -3-4 S22 S.23 MHz OIP3 (dbm) ACPR (dbc) MHz Figure 3. OIP POUT (dbm) Figure MHz 4

5 LNA Cascade Example Using the two amplifiers presented, a simple two-stage balanced LNA may be designed. For better control of gain and out-of-band interference, often a filter or an attenuator is inserted between stages. See Figure. ANT Q DB Total Cascaded Gain: Ga TOT = G a G a2 Ga TOT = 8.6 db 4.8 db Ga TOT = 33.4 db Total Cascaded Noise Figure: TOT = 2 - G a TOT =.6 db TOT =.2 db Total Cascaded Input IP3: IIP3 3.6 db db G a IIP dbm 9.4 dbm 28.2 dbm 9.7 dbm Total Cascaded Output IP3: OIP3 TOT = G a2 OIP3 OIP3 2 Figure. Two-stage LNA example Summary at 96 MHz Using the Avago ATF-3P8, first- and second-stage low noise amplifiers have been presented. The keys to the designs are low noise figure for the first stage and good linearity for the final stage. Table 3 summarizes the performance achieved with the ATF-3P8 for these amplifier positions. Table 3. Specifications for a Two-stage Amplifier at 96 MHz Q.6 db 3. db Ga 8.6 db 4.8 db S -8.3 db -4.7 db S22-2. db -6. db OIP3 3 dbm 4 dbm IIP3 6.4 dbm 2.2 dbm PdB 24.3 dbm 22.3 dbm Vds 4 V 4 V Ids 3 ma 3 ma Note. No board losses have been subtracted out from these measurements. OIP3 TOT = 43 dbm OIP3 TOT = 42.6 dbm For product information and a complete list of distributors, please go to our web site: Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies in the United States and other countries. Data subject to change. Copyright - Avago Technologies. All rights reserved EN - August 24,

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