E3 237 Integrated Circuits for Wireless Communication

Transcription

1 E3 237 Integrated Circuits for Wireless Communication Lecture 8: Noise in Components Gaurab Banerjee Department of Electrical Communication Engineering, Indian Institute of Science, Bangalore

2 Outline Noise in Components Thermal Noise Induced Gate Noise Flicker Noise

3 Thermal Noise of Resistors R (noiseless) R (noisy) = = R (noiseless) f = measurement Bandwidth, T = absolute temperature

4 Thermal Noise of Resistors Some numbers to remember at 300 K : For a 50 Ohm resistor: Some Definitions: Spot Noise : Mean square noise density integrated over 1 Hz bandwidth at the frequency of interest. Assume that the noise density is constant over 1 Hz BW. Equivalent to power dissipated in 1 Ohm resistor -> Often used in instrumentation. White Noise : When Spot Noise is independent of frequency -> Typical of resistors

5 Available Noise Power Maximum noise power that can be delivered to the load under conditions of conjugate match R + R e 0 - -> In a receiver chain, we often start with this value of noise assuming a conjugate matched input. Note that ktb is Independent of R Proportional to T Proportional to Bandwidth -> as B increases, ktb increases. For low noise applications, minimize B and T, do not overdesign bandwidth! Available noise power per unit bandwidth = kt W/Hz Remember!

6 An Example: a system Received signal power = -82 dbm at 20 MHz BW Noise power = x W/Hz x 20 MHz = 8.29 x W P avg = -100 dbm SNR = -82 dbm (-100 dbm) = 18 db If -82 dbm is the worst case RX input power, 18 db is the maximum possible SNR SNR gets worse as noisy gain stages are added Ideal receiver provides 18 db -> Best possible SNR With P avg = -100 dbm, rms voltage across 50 Ohm resistor = 2.23 uv At the lower end of the dynamic range, noise limits SNR At the higher end, distortion limits SNR.

7 Thermal Noise in MOSFETs MOSFET as a resistor in the triode region I DS Slope = For the same device in saturation, the gm is given by: v DS Resistor will have thermal noise due to Brownian motion of charge carriers Noisy MOS Noiseless MOS = γ= 2/3 for long channel MOS

8 γ = 2/3 is due to the distributed nature of inversion layer charge What is the right noise multiplier? Probably biased in avalanche multiplication regime (Scholten TED 2003) Navid, Lee, and Dutton," A Circuit-Based Noise Parameter Extraction Technique for MOSFETs," ISCAS 2007 Drain Current Noise NQS effects Layout Dependent Short channel effects 0.18um, f=3 GHz, VDS = 1.8V, VGS = 1V A.J. Scholten et al.,," Noise Modeling for RF CMOS Circuit Simulation, IEEE Trans. Electon. Dev., March 2003

9 velocity Short Channel MOSFETs V d = constant Charge carriers get accelerated from source to drain. V d = µ E Velocity saturation Velocity of carriers at drain v = µ E if E < E critical v = v sat if E > E critical Electric Field As E-Field is increased beyond E critical, the carrier velocity and kinetic energy saturate. Work done is dissipated as heat -> sometimes called carrier heating. Excess noise is produced due to hot carriers. If γ = 3, compared to long channel MOSFETs, noise is 3/(2/3) = 4.5x higher! Hot carrier or gm/gds? Hard to say as noise is not measured but inferred.

10 Induced Gate Noise in MOSFETs Ideal Channel With variations in channel charge Channel charge variations cause local channel potential variations. These variations couple through the gate oxide capacitance to produce gate noise (displacement current) Van der Ziel s model i ng increases as ω increases -> frequency dependent blue noise.

11 Flicker Noise in MOSFETs Caused by random trapping/de-trapping of charge carriers in oxide interface Gate Area Transition Frequency = Use large Area (WL) for low v n Generally, PMOS is considered more effective in reducing 1/f noise (noise or area?) 1/f noise is very important in oscillators and frequency synthesizers -> As 1/f noise goes up, phase noise goes up. Also important in base band circuits -> eats into usable bandwidth -> Use low-if architecture or DC free coding -> significant problem with direct conversion architecture with narrow channel bandwidth.