IR2153Z PD SELF-OSCILLATING HALF-BRIDGE DRIVER. Features. Product Summary

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1 Features Floating channel designed for bootstrap operation Fully operational to +600 Tolerant to negative transient voltage d/dt immune Undervoltage lockout Programmable oscillator frequency 1 f = 1.4 (T + 75 Ω) CT Matched propagation delay for both channels Micropower supply startup current of 90 µa. Shutdown function turns off both channels Low side output in phase with T PD I2153Z SELF-OSCILLATING HALF-BIDGE DIE Product Summary OFFSET 600 max. Duty Cycle 50% IO+/- 200 ma / 400 ma clamp 15.6 Deadtime (typ.) 1.2 µs Description The I2153Z is a high voltage, high speed, self-oscillating power MOSFET and IGBT driver with both high and low side referenced output channels. Proprietary HIC and latch immune CMOS technologies enable ruggedized monolithic construction. The front end features a programmable oscillator which is similar to the 555 timer. The output drivers feature a high pulse current buffer stage and an internal deadtime designed for minimum driver crossconduction. Propagation delays for the two channels are matched to simplify use in 50% duty cycle applications. The floating channel can be used to drive an N-channel power MOSFET or IGBT in the high side configuration that operates off a high voltage rail up to 600 volts. Absolute Maximum atings Absolute Maximum atings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute voltages referenced to COM. The Thermal esistance and Power Dissipation ratings are measured under board mounted and still air conditions. Symbol Parameter Min. Max. Units B High Side Floating Supply oltage S High Side Floating Supply Offset oltage B - 25 B High Side Floating Output oltage S B Low Side Output oltage -0.3 CC T T oltage -0.3 CC CT C T oltage -0.3 CC I CC Supply Current (Note 1) 25 I T T Output Current -5 5 d s /dt Allowable Offset Supply oltage Transient 50 /ns P D Package Power T A +25 C 1.0 th JA Thermal esistance, Junction to Ambient 100 T J Junction Temperature T S Storage Temperature C T L Lead Temperature (Soldering, 10 seconds) ma W C/W

2 ecommended Operating Conditions The Input/Output logic timing diagram is shown in Figure 1. For proper operation the device should be used within the recommended conditions. The S offset rating is tested with all supplies biased at 15 differential. Symbol Definition Min. Max. Units B High Side Floating Supply Absolute oltage S + 10 S + 20 S High Side Floating Supply Offset oltage 600 High Side Floating Output oltage S B Low Side Output oltage 0 CC I CC Supply Current (Note 1) 5 ma Dynamic Electrical Characteristics BIAS ( CC, BS ) = 12, C L = 1000 pf and T A = 25 C unless otherwise specified. Symbol Definition Min. Typ. Max. Units Test Conditions t r Turn-On ise Time t f Turn-Off Fall Time ns t sd Shutdown Propagation Delay 660 DT Deadtime 1.2 µs D T Duty Cycle 50 % Typical Connections I2153Z 600 MAX CC B T S CT Shutdown COM Note 1: Because of the I2153 s application specificity toward off-line supply systems, this IC contains a zener clamp structure between the chip CC and COM which has a nominal breakdown voltage of Therefore, the IC supply voltage is normally derived by forcing current into the supply lead (typically by means of a high value resistor connected between the chip CC and the rectified line voltage and a local decoupling capacitor from CC to COM) and allowing the internal zener clamp circuit to determine the nominal supply voltage. Therefore, this circuit should not be driven by a DC, low impedance power source of greater than CLAMP. 2

3 Static Electrical Characteristics BIAS ( CC, BS ) = 12, C L = 1000 pf, C T = 1 nf and T A = 25 C unless otherwise specified. The IN, TH and I IN parameters are referenced to COM. The O and I O parameters are referenced to COM and are applicable to the respective output leads: or. Symbol Definition Min. Typ. Max. Units Test Conditions f OSC Oscillator Frequency 20.0 T = 35.7 kw khz 100 T = 7.04 kw CLAMP CC Zener Shunt Clamp oltage 15.6 I CC = 5 ma CT+ 2/3 CC Threshold 8.0 CT- 1/3 CC Threshold 4.0 CTSD C T shutdown Input Threshold 2.2 T+ T High Level Output oltage, CC - T I T = -100 µa I T = -1 ma T- T Low Level Output oltage I T = 100 µa I T = 1 ma m OH High Level Output oltage, BIAS - O 100 I O = 0A OL Low Level Output oltage, O 100 I O = 0A I LK Offset Supply Leakage Current 50 B = S = 600 I QBS Quiescent BS Supply Current 10 I QCCU Micropower CC Supply Startup Current 90 µa CC < CCU I QCC Quiescent CC Supply Current 400 CC > CCU I CT C T Input Current CCU+ CC Supply Undervoltage Positive Going 9.0 Threshold CCU- CC Supply Undervoltage Negative Going 8.0 Threshold CCUH CC Supply Undervoltage Lockout Hysteresis 1.0 I O+ Output High Short Circuit Pulsed Current 200 ma O = 0 I O- Output Low Short Circuit Pulsed Current 400 O =

4 CCU+ CLAMP CC T C T Figure 1. Input/Output Timing Diagram Figure 2. Switching Time Waveform Definitions Figure 3. Deadtime Waveform Definitions 4

5 Functional Block Diagram T B + - H LEEL SHIFT PULSE FILTE S Q /2 + - S Q Q DEAD TIME PULSE GEN S CC C T /2 + - GIC DEAD TIME DELAY 15.6 U DETECT COM Lead Definitions Lead Symbol Description T C T B S CC COM Oscillator timing resistor input,in phase with for normal IC operation Oscillator timing capacitor input, the oscillator frequency according to the following equation: 1 f = 1.4 (T + 75 Ω) CT where 75W is the effective impedance of the T output stage High side floating supply High side gate drive output High side floating supply return Low side and logic fixed supply Low side gate drive output Low side return 5

6 Case Outline and Dimensions MO-036AA I2125Z I2153Z WOLD HEADQUATES: 233 Kansas St., El Segundo, California 90245, Tel: (310) I GEAT BITAIN: Hurst Green, Oxted, Surrey H8 9BB, UK Tel: I CANADA: 15 Lincoln Court, Brampton, Ontario L6T3Z2, Tel: (905) I GEMANY: Saalburgstrasse 157, Bad Homburg Tel: I ITALY: ia Liguria 49, Borgaro, Torino Tel: I FA EAST: K&H Bldg., 2F, 30-4 Nishi-Ikebukuro 3-Chome, Toshima-Ku, Tokyo Japan 171 Tel: I SOUTHEAST ASIA: 1 Kim Seng Promenade, Great World City West Tower, 13-11, Singapore Tel: I TAIWAN:16 Fl. Suite D. 207, Sec. 2, Tun Haw South oad, Taipei, 10673, Taiwan Tel: Data and specifications subject to change without notice. 8/27 6