Design and FPGA Implementation of Channelizer & Frequency Hopping for Advanced SATCOM System

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1 Intrnational Journal on cnt and Innovation Trnds in Computin and Communication ISSN Volum: Issu: 6 Dsin and FPG Implmntation of Channlizr & Frquncy Hoppin for dvancd STCOM Systm Mahsh Kumar¹, Dura Didarsini², T.V.S. am³ ¹ ² ³Spac pplications Cntr (SC), Indian Spac sarch Oranization (ISO) hmdabad, Gujarat, India mahshk@sac.isro.ov.in, didarsini@sac.isro.ov.in, tvsram@sac.isro.ov.in bstract dvancd satllit communication systms should b capabl of prvntin unauthorizd accss or xploitation of communication srvics by advrsaris. This can b achivd by us of widband multi-channl diital transcivrs which mploy channlizr to xtract th channl of intrst from diitizd F bands for furthr basband procssin. Various anti-jammin tchniqus lik Frquncy hoppin ar usd to prvnt th systms from intntional jammin by th hostil systms. This papr prsnts an fficint channlizr architctur which supports widband as wll as narrowband channls with prorammabl channl bandwidth followd by frquncy hoppin for th proposd STCOM systm. Th tart dsin is a flxibl channlization unit which divids th incomin data links of MHz bandwidth into two data links in ranularity of 0.5 MHz dpndin upon usr rquirmnts. First link is furthr sub-channlizd into two sub-links ach havin a bandwidth of 25 KHz that is frquncy hoppd at a usr prorammabl rat with dsird random squnc. Th sam channlizr can b wll applicabl in any softwar dfind radio rcivr platforms du to flxibility of th dsin. Proposd dsin is tstd on tart hardwar Xilinx Virtx-IV FPG xc4vsx35-0ff668. Th dsin and implmntation of th channlizr and frquncy hoppin tchniqu ar discussd in dtail. Kywords-channlizr, frquncy hoppin, ddc, cic, fpa. ***** I. INTODUCTION Satllit basd communication systm srvs wll for providin prsonal communication lobally. Ths systms ar pron to intntional jammin by th unauthorizd systms. Hnc, advancd satllit communication systms, which incorporat various anti-jammin tchniqus lik frquncy hoppin to combat jammin, ar rquird for applications rquirin a robust communication fr from any intrcption of communication sinals by th jammr. Ths systms incorporat widband multi-channl transcivrs capabl of supportin multipl channls pr F band. Typically a channlizr is usd to xtract th indpndnt communication channls from diitizd F bands. Thr ar mainly thr prdominant architcturs availabl for channlization, namly Poly-phas FFT filtr banks (PFFB), Frquncy Domain Filtrin and Diital Down Convrsion (DDC) tchniqu []. lthouh PFFB channlization tchniqu is fficint in trms of computational complxity, it is limitd to channl structurs consistin of qually spacd channls. In nral, numbr of channls must b qual to th dcimation rat and samplin rat must b powr of two tims th basband bandwidth. This tchniqu is not wll suitd for transcivrs supportin flxibl channl architcturs. Frquncy Domain Filtrin and Diital Down- Convrsion (DDC) channlization tchniqus offr similar capability in trms of flxibility for any typ of channl spacin and bandwidth but Frquncy domain filtrin approach maks us of FFT which ar computation intnsiv. lso, mixin opration is prformd on th block of data vs. continuous tim procssin which maks zro carrir offsts for individual block of data, cratin a rotatin phas offst btwn ach block if th carrir cycl at th /D sampl rat is not an intr numbr of block siz. Hnc, DDC basd channlization tchniqu is mployd for supportin flxibl channl architcturs for th proposd systm. This papr will xplain th dsin and FPG implmntation of a flxibl channlization unit basd on DDC tchniqu which supports both widband as wll as narrowband channlization with prorammabl channl bandwidth followd by frquncy hoppin which is th most crucial lmnts in any advancd satllit communication systms. Th flxibility incorporatd in th dsin maks it also applicabl for any widband transcivr for softwar dfind radio platform. Th rmaindr of this papr is outlind as follows. Sction II discusss th systm architctur and th frquncy plan of proposd STCOM systm. In Sction III, th dsin and implmntation of th channlizr is dscribd. Sction IV, illustrats th dsin and implmntation of frquncy hoppin tchniqu. Sction V shows th hardwar tst stup with spcifications usd in th dsin and analysis of rsults followd by Sction VI which concluds th papr. IJITCC JN 203,

2 mplitud in db Intrnational Journal on cnt and Innovation Trnds in Computin and Communication ISSN Volum: Issu: 6 II. POPOSED SYSTEM CHITECTUE Fiur 2: Frquncy plan Th basic block diaram for th proposd widband satllit communication systm is prsntd in Fiur. It compriss F Front-nd (consists of antnna sction for transmission & rcption of F sinals, F to IF downconvrtr for convrtin F down to Intrmdiat Frquncis) and th diital subsystm for furthr diital sinal procssin. In this papr, rcivr sid of onboard systm is mphasizd to show th capabilitis of flxibl channlizr which xtracts th channl of intrst from diitizd F bands for furthr basband procssin in FPG. This procss is rvrsd on th transmit sid whr individual channls ar combind and rtransmittd. sinl channlization unit supports multipl channls which can b widband or narrowband channls. Th channlizd narrowband sinals ar frquncy hoppd at usr prorammabl rat dpndin upon th systm spcifications. F sinal In F to IF convrtrs DC FH outputs to transmit sction FPG Basd Diital Subsystm (Channlization & Frquncy Hoppin) Fiur : Basic block diaram of proposd STCOM Systm Th flxibl frquncy plan for th proposd STCOM systm is prsntd in Fiur 2 for hardwar proof of concpt (POC). Incomin data links occupis a total of MHz bandwidth which is dividd into two widband channls in ranuls of 0.5 MHz dpndin upon th usr rquirmnts. Ths widband channls ar furthr subchannlizd into two narrowband channls in ranuls of 25 KHz which can rsid anywhr insid a widband channl. Implmntation of individual blocks of channlizr architctur in FPG with th spcifications as dscribd in Tabl I is discussd in th nxt sction. MHz MHz Widband channls channls Frquncy in MHz MHz TBLE I. SPECIFICTIONS OF TEST INPUTS Paramtr Spcifications No. of Widband Channls 2 No. of Channls 2 Widband Channl Cntr Frquncis (CH,CH2) Channl Cntr Frquncis (subch,subch2) 5 MHz, 5 MHz 5.25 MHz, MHz IJITCC JN 203, III. Widband Channl BWs Channl BWs Sinal Powr MHz 25 KHz -5 dbm DESIGN OF CHNNELIZE USING DDC Th proposd channlizr architctur is basd on th Diital Down Convrsion (DDC) tchniqu which is an intral part of any diital communication rcivr. In this tchniqu, th incomin diitizd F widband sinal is shiftd from its carrir frquncy down to basband throuh mixin with a synthsizd carrir at or nar th carrir frquncy of that sinal. Th rsultin sinal is thn filtrd and dcimatd to xtract th channl of intrst [2]. This tchniqu rducs th amount of ffort to a rat xtnt for subsqunt procssin of th sinal without loss of any information. Fiur 3 illustrats th basic block diaram of a typical DDC. F Widband DC Complx multiplir Complx Oscillator Low pass Filtr Channlizr block Dcimator Fiur 3: Basic DDC rchitctur Basband Th advanta of usin DDC approach is th flxibility in choosin th carrir frquncy and channl bandwidth. Th Cascadd Intrator (CIC) filtr is usd instad of low pass FI filtr and dcimator is proposd in channlizr architctur for xtractin widband channls as wll as narrowband channls. CIC Filtr inhrntly provids dcimation in addition to low pass filtrin so that th procssin rquirmnts for subsqunt stas ar rlaxd. Th filtr bandwidth can b prorammd to th usr rquirmnts by only chanin th dcimation factor. Postfiltrin is don to compnsat for th pass band droop. Th advanta of CIC filtr is that it supports multiplir lss filtr 2

3 Intrnational Journal on cnt and Innovation Trnds in Computin and Communication ISSN Volum: Issu: 6 architctur which rducs th hardwar complxity in any diitizd multiplxd input data. Th sin sinal is usd to FPG basd dsin. nrat th in Phas componnt whil th cosin nrats Fiur 4 shows th widband and narrowband th quadratur componnt of th complx sinal. Th DDS channlizr architctur utilizin DDC tchniqu [2]. First, has to b clockd at th sampl frquncy so that sin and th widband sinal is filtrd and dcimatd down to th cosin data ar prsntd to th mixrs at th sam rat as dsird channl bandwidth throuh widband channlizr. that of input data. Fiur 5 illustrats a typical DDS Th dcimatd sinal is thn passd to narrowband architctur. uartr Wav Symmtry is utilizd to rduc channlizr to xtract th narrowband channl of intrst. th siz of Sin/Cosin lookup tabl for FPG lthouh, both channlizrs hav similar architctur but implmntation to minimiz no. of block mmoris. Phas narrowband channlizr works at a low procssin rat than dithrin is mployd to t bttr frquncy rspons. Tabl that of widband channlizr. III summarizs th DDS spcifications for th frquncy plan mntiond in Fiur 2. /D Multiplxd Input DDS Widband I Widband DDS Mixr Mixr Frquncy Tunin Word Mixr Mixr Frquncy Tunin Word Cascadd Intrator Cascadd Intrator Cascadd Intrator Cascadd Intrator Cascadd Cascadd Widband Channlizr Cascadd Cascadd Channlizr PFI PFI PFI PFI Widband I Widband I Fiur 4: Widband and Channlizr rchitctur usin DDC Tchniqu. Implmntation of Mixr Th Mixr multiplis th multiplxd input data sampls with th synthsizd carrirs at or nar th carrir frquncy of th channl of intrst to brin th dsird channl to th basband lvl. Th output of th mixr contains both th sum and diffrnc frquncy componnts at incomin sampl frquncy. Th mixr usd in this dsin is dsird to run at th sampl frquncy of DC for hardwar proof of concpt. Th followin Tabl II summarizs th mixr spcifications. TBLE II. Paramtr Input Data Bits Carrir Bits Sampl Frquncy of DC Cntr Frquncy of CH Cntr Frquncy of CH2 Cntr Frquncy of subch Cntr Frquncy of subch2 MIXE SPECIFICTIONS Spcifications 4 bits 0 bits 25 MHz 5 MHz 5 MHz 25 KHz 250 KHz B. Implmntation of Dirct Diital Synthsizr Th Dirct Diital Synthsizr (DDS) is dsind to nrat th sin and cosin carrirs rquird to mix with th Phas Incrmnt IJITCC JN 203, clk Phas ccumulator clk Phas Offst u a n t i z r Dithr Squnc Fiur 5: rchitctur of DDS in FPG TBLE III. Paramtr Sampl Frquncy Phas Incrmnt Word lnth Output Bit Width Carrir Frquncy for CH Carrir Frquncy for CH2 Carrir Frquncy for subch Carrir Frquncy for subch2 DDS SPECIFICTIONS Sin/ Cosin Lookup Tabl Spcifications 25 MHz 32 bits 0 bits 5 MHz 5 MHz 25 KHz 250 KHz C. Implmntation of CIC and Post FI filtr In DDC architcturs, two major functions namly low pass filtrin and dcimation ar ncssary for furthr sinal procssin. Low pass filtrin is rquird immdiatly aftr Mixr to rmov th unwantd sinal frquncis that would aris du to mixin function and th dcimation is ssntial for rducin th incomin sampl rat to th minimum rquird to rlax th sinal procssin rquirmnts for subsqunt stas. CIC filtr is an fficint way of prformin dcimation alon with filtrin. Fiur 6 shows th CIC filtr structur consistin of N cascadd intrator stas clockd at sampl frquncy f s, followd by a rat chan by a factor, followd by N cascadd comb stas runnin at (f s /) whr N is th numbr of stas or th filtr ordr [3][4]. CIC filtrs ar hardwar fficint filtr structurs as thy us only shiftrs and addrs to prform th filtrin function as shown in Fiur 6. 3

4 Dcimat by Intrnational Journal on cnt and Innovation Trnds in Computin and Communication ISSN Volum: Issu: 6 is known to th transmittr and rcivr. psudo-random cod nrator is usd as a drivr for a frquncy synthsizr (DDS) at th transmittr to psudo-randomly hop th carrir frquncy of th narrowband sinal xtractd throuh th narrowband channlizr unit as shown in Fiur 7. Fiur 6: CIC Dcimator Filtr rchitctur Frquncy synthsizr Frquncy hoppd sinal Th prsnt filtr has a frquncy rspons ivn by H(f) = [sin(πf)/sin(πf)]³ (q.) Whr f is th normalizd frquncy rlativ to th input sampl rat and is dcimation rat. Th filtr passband bandwidth is controlld by th dcimation factor which can b usr prorammd to provid th flxibl bandwidth. Th filtr paramtrs for th frquncy plan mntiond in Fiur 2 ar dscribd in Tabl IV. TBLE IV. CIC FILTE SPECIFICTIONS Paramtr Spcifications Input Sampl Frquncy 25 MHz No. of Stas (N) 3 Diffrntial Dlay (M) oundin Convrnt Post finit impuls rspons (PFI) filtr is rquird aftr th CIC filtr sta to compnsat for th passband droop. It can b sinl rat or multi-rat filtr structurs. Th filtr lnth for ach filtr rans from 0 to 024 taps. Th cofficint prcision may also b customizd and rans from to 32 bits. Th full-prcision rsults ar not passd btwn adjacnt procssin stas, bias-fr convrnt roundin is mployd for this procss. s pr th frquncy plan in Fiur 2, th widband channl prsnt at 5 MHz and 5 MHz ar xtractd throuh widband channlizr and th narrowband channlizr filtrs out th narrowband channls prsnt at 5.25MHz and MHz ach havin 25 KHz bandwidth. Th narrowband channls ar thn frquncy hoppd to usr prorammabl rat. IV. DESIGN OF FEUENCY HOP UNIT dvancd satllit communication systm dmands prvntion from any jammin scnario. Th hostil systms try to intrcpt th transmittd sinal and disrupt th communication channl. Frquncy hoppin (FH) tchniqu is an fficint anti-jammin tchniqu mployd in STCOM systms as it is rlativly asy to oprat ovr lar spctral bands [7]. Frquncy Hoppin indicats that transmittr and rcivr chan frquncy rapidly in a dfind pattrn which Cod Clock andom squnc nrator sinal Fiur 7: Frquncy Hop Unit Th hoppin cod slction is vry critical in any communication systms. It should hav a lar priod, lar sd and random apparanc to provid dsin scrcy. It should possss lar linar complxity so that jammr intrvntion is nliibl. Th minimum hoppin rat is dcidd basd upon th jammr location w.r.t. transmittr and rcivr [5]. In this dsin, slow frquncy hoppin mthod is usd whr hop priod is lon with rspct to a data bit priod. Each narrowband channlizr output is frquncy hoppd as pr th spcifications mntiond in Tabl V. TBLE V. SPECIFICTIONS FO FEUENCY HOP Paramtr Spcifications Hop at 500 Hops/s Input Channl Bandwidth 25kHz Total Output Bandwidth 000 khz No of Channls 2 Hoppin Squnc Prorammabl V. ESULTS ND DISCUSSIONS Simulink modl is dvlopd for proof of concpt of th proposd channlizr architctur with spcifications mntiond in Tabl I. It consists of widband transmittrs nratin two channls of MHz modulation bandwidth at 5MHz and 5MHz IF s. Th combind channl output spctrum fd to th two channl rcivr containin th proposd channlizr which xtracts individual channls from th combind spctrum rsultin in zro BE as shown in Fiur8. Similar modl is dsind and tstd for narrowband channlizr. Various dsin paramtrs ar simulatd usin Simulink modl so that hardwar implmntation bcoms asir. IJITCC JN 203, 4

5 Intrnational Journal on cnt and Innovation Trnds in Computin and Communication ISSN Volum: Issu: 6 channlizrs followd by FH unit. Both channlizrs includ synthsizd carrir from DDS, Mixr output, CIC filtr output followd by channlizd output at basband. FH unit includs frquncy tunin word nratd from PBS nrator and frquncy hoppd sinal output. Th hardwar tst stup is shown in Fiur which involvs VSG for input sinal nration and tart FPG board for procssin of th sinals. Th channlizr and FH outputs from FPG ar passd throuh DC of th board and rsults ar obsrvd usin spctrum analyzr. Fiur 8: Channlizr Dsin in Simulink Th ntir dsin is implmntd usin Vrilo HDL 200 without th us of any FPG IP cor so that th dsin bcoms platform indpndnt and portabl to any FPG lik Xilinx or ctl. Howvr, FPG implmntation is don usin XilinxISE9.2i and functional simulation is carrid out in usta Sim 0.0b tartin Xilinx Virtx-4 FPG xc4vsx35-0ff668 for hardwar POC. Fiur 9: Functional Simulation sults for Widband Channlizr Fiur Hardwar Tst Stup Fiur 2 shows th multi-channl widband spctrum containin two MHz bandwidth sinals input to th channlizr which xtracts th individual widband channls. For bttr visualization and comparison, th xtractd channl is frquncy translatd to th sam cntr frquncy as shown in Fiur 3. Th channlizr dsin is tstd by varyin input channl bandwidth to validat th flxibility of channl bandwidth. Fiur 4 shows th channlizr output w.r.t. chanin input channl bandwidth to 2 MHz. sinal is also nratd from VSG as pr th spcifications mntiond in Tabl I and passd to th sam channlizr which xtracts th narrowband channl of 25 KHz bandwidth as shown in Fiur 5. f - 5 d B m t t 3 0 d B * B W 3 0 k H z * V B W 0 0 H z S W T 0 s M a r k r 2 [ T ] d B m M H z -0 M a r k r [ T ] d B m M H z P CLW Fiur 0: Functional Simulation sults for Channlizr and FH Th Multichannl modulatd sinal as pr frquncy plan in Fiur 2 nratd from Vctor Sinal Gnrator (VSG) is passd throuh DC of th FPG basd dvlopmnt board and th output is capturd in Loic nalyzr. This data is stord in OM of FPG which is usd as an input for simulation of th ntir dsin. sults from usta Sim ar prsntd in Fiur 9 and Fiur 0 which show output sinals from various stas of widband and narrowband C n t r 0 M H z. 5 M H z / S p a n 5 M H z IJITCC JN 203, D a t :. J N : 2 2 : 3 8 Fiur 2: Multichannl Sinal from VSG PN 5

6 Intrnational Journal on cnt and Innovation Trnds in Computin and Communication ISSN Volum: Issu: 6 * B W 3 0 k H z M a r k r [ T ] * V B W H z d B m hardwar fficint architctur of DDC basd f d B m t t 0 d B S W T. 5 s M H z channlizr with frquncy hoppin applicabl to advancd satllit communication systm is prsntd in this papr. P CLW Channlization hlps in xtractin narrowband sinal mbddd in widband sinal in prsnc of intrfrr whr Frquncy hoppin provids anti jammin marin for PN STCOM systms. Th sam flxibl channlizr architctur can also b applid to softwar dfind radio -00 platform. Proposd hardwar architctur occupis only 3% -0 ara of total slics on tart hardwar Xilinx Virtx-IV -20 FPG xc4vsx35-0ff668. Th dsin is mad platform -30 indpndnt and can b portd on any tart FPG. C n t r 5 M H z k H z / S p a n 5 M H z D a t :. J N : 4 8 : 5 6 P CLW f Fiur3: Extractd MHz Widband Channl d B m t t 0 d B C n t r 5 M H z k H z / S p a n 5 M H z D a t :. J N : 5 0 : 2 4 * * B W 3 0 k H z V B W H z S W T. 5 s M a r k r [ T ] d B m M H z Fiur4: Extractd 2 MHz Widband Channl f d B m t t 0 d B * B W 3 k H z * V B W 0 H z S W T 8. 4 s M a r k r [ T ] d B m k H z D l t a 2 [ T ] d B k H z PN CKNOWLEDGMENT Th author would lik to thank Sakt Buch, bhishk Kakkar, and Sumitsh Sarkar for thir invaluabl contribution for nration of spcifications of th proposd systm. EFEENCES [] L Puckr Channlization Tchniqus for Softwar Dfind adio, Spctrum Sinal Procssin Inc. [2] Xilinx, Inc., Diital Down convrtr V.0. [3] Xilinx, Inc. Cascadd Intrator Filtr V3.0. [4] rnaud Santrain, S. Lprinc, and Frd Taylor. Multiplir Fr Bandpass Channlizr for undrsampld pplications, IEEE Sinal Procssin Lttrs, Vol., No., Nov [5] E. B. Flstad, "Followr Jammr Considrations for Frquncy Hoppd Sprad Spctrum," Communication sarch Cntr, Canadian Crown Copyriht, 998. [6] J. Proakis and D. Manolakis, Diital Sinal Procssin Principls, lorithms, and pplications, Prntic Hall, 996. [7] B. SKL, Diital Communications, Fundamntals and pplications, Prntic Hall, Scond Edition. [8] P.P. Vaidyanathan, Multirat Systms and Filtr Banks, Prntic-Hall, 993. P CLW 2 PN C n t r k H z 2. 5 k H z / S p a n 2 5 k H z D a t :. J N : 2 : 2 5 Fiur5: Extractd 25 KHz Channl VI. CONCLUSION IJITCC JN 203, 6

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