Analysis and Simulation Modeling of Programmable Circuits Using Digital Potentiometers

Transcription

1 Aalysis ad Simulatio Modelig of Programmable Circuits Usig Digital Potetiometers Ivailo M Padiev Abstract I this aer a object of aalysis ad simulatio modelig are the basic rogrammable circuits usig CMOS digital otetiometers or esistive Digital-to-Aalog Coverters (DACs Based o the aalysis ad ricile of oeratio a imroved SPICE based behavioral model for DAC otetiometers is created The model accurately reflects resolutio (wier stes omial ed-to-ed resistace wier resistace liear ad oliear icremet/decremet of the wier commomode leakage curret oeratig badwidth aalog crosstalk temerature coefficiets ad oise effects Model arameters are extracted for the dual DAC otetiometer AD535 from Aalog Devices as a examle The workability of the roosed simulatio model is verified by simulatio modelig ad exerimetal testig of samle electroic circuits Idex Terms Mixed aalogue digital itegrated circuits digital otetiometers rogrammable circuits frequecy domai aalysis behavioral modelig circuit simulatio I ITODUCTIO HE CMOS digital otetiometers (digital ots digots or Tesistive Digital-to-Aalogue Coverters (DACs as mixed (aalogue ad digital itegrated circuits are imortat active buildig blocks for rogrammable aalog circuits ad devices Most commoly the digital ots are used i a rogrammable voltage divider which ca be used to the offset comesatio or the gai adjustmet The digital otetiometers are essetial elemets i the rogrammable amlifiers atteuators active filters oscillators circuits for offset comesatio of the oeratioal amlifiers (o ams etc Ulike the mechaical otetiometers i the CMOS digital ots the ositio of the middle oit (wier towards to the both termials A ad B is determied by usig a digital code D The mai advatages of the digital ots i comariso with the mechaical ots are sigificatly smaller hysical sie lack of mechaical wear or cotamiatio of the wier ad low sesitivity to vibratios [-4] Most commoly the relimiary testig of the workability of electroic circuits ad devices with digital ots are erformed o breadboards The software systems for automated aalysis ad desig such as Cadece OrCAD are rarely used because the majority of the mixed-sigal elemets do ot have simulatio models or macro-models I [5] for some of the I M Padiev is with the Deartmet of Electroics aculty of Electroic Egieerig ad Techologies Techical Uiversity of Sofia 8 Kl Ohridski Blvd Sofia Bulgaria ( iadiev@tu-sofiabg digital ots i its maufacturer s data a simlified simulatio macro-model is give Moreover these macro-models reflected the deedece of the resistace uder the digital code D (secified i decimal form ad the arasitic caacitaces at the both termials A ad B I the authors i [6] ad [7] rereset a imroved simulatio macro-model of a digital otetiometer This macro-model uses as a basis the simlified equivalet circuit as to it is added arallel resistor divider This allows imrovig of the modeled frequecy characteristic urthermore i [7] a rogram DIGPOT to cotrol digital otetiometers is reseted This aer itroduces ew SPICE based behavioral macro-model for the dual DAC otetiometer AD535 [8] as a examle The aalysis of the available ublicatios ad the review of various mixed-sigal ICs showed that this digital ot is a tyical reresetative of the base structures used for realiatio of DAC otetiometers The created macromodel for the digital ot AD535 is imlemeted as a hierarchical block ad the structure of its et-list cofirm to the stadard SPICE format The orgaiatio of the aer is as follows: the structures ad the riciles of oeratio of the DAC otetiometers are described i sectio II; for the digital ots i sectio II the trasfer fuctio of the basic electroic circuits takig ito accout the arasitic caacitaces of the termials are give; i sectio III are illustrated the structure ad the characteristic arameters of the roosed macro-model; i sectio IV examles of studyig the created macro-model are reseted ad fially i sectio V the cocludig remarks ad directios for future work are discussed II STUCTUE O THE DAC POTETIOMETES AD THEOETICA AAYSIS A Structure ad equivalet circuit of the DAC otetiometers Oe of the methods to obtai a digital otetiometer is like betwee the iformatio iuts (with umber of a aalogue multilexer a resistors with the same resistace is coected The first ad last data iut is idicated as termials A ad B of the otetiometer The outut of the aalogue multilexer is the wier of the otetiometer These tyes of digital otetiometers are also kow as DAC otetiometers where is the umber of bits ad determied the resolutio or ste sie of the digital

2 otetiometer with stes (ositios of the wier The simlified structure of -bits DAC otetiometer is give o ig Other method to obtai variable resistors is to use a DAC with a additioal curret to voltage coverter ad series resistor [] The mai differeces i comariso with the DAC otetiometers are that i the variable resistors with DACs the wier termial is ot defied ad both termials A ad B are ot electrically equivalet ig Simlified circuit of -bits DAC otetiometer At alyig a secific address ( A A A to the decoder of the multilexor oe of the oututs of the decoder switch to logical which causes the closig of oe of the electroic switches Thus the wier is ositioed at oe of the th oits betwee termials A ad B Deedig o the value of the biary code D alied to the address iuts the values of the resistaces of the wier to termial B ad to termial B is give by wier as their values ca vary from several to several teths of Moreover the arasitic large caacitace value limits the workig frequecy badwidth [7] I geeral the values of arasitic caacitaces are fuctio o the microelectroic IC techology the structure of the electrical circuit the omial resistace AB ad the umber of the stes of the wier I the datasheets for the majority of the digital otetiometers the values of the arasitic caacitaces are usually defied oly at the ceter ositio (ie code half-scale of the wier I some datasheets for digital otetiometers such as AD84 (from Aalog Devices are give formulas to calculate the cocrete values of the arasitic caacitaces at a give biary code: D C A 9 3 ad 56 D C B At low frequecies (kh for aalysis ad desig of electroic circuits the values of the caacitaces at the halfscale of the wier ca be used However i ractical oit of view it is better to use the largest values of the arasitic caacitaces which ca most accurately esure the secified badwidth for all values of the biary code The oise erformace of the digital ots ca be rereseted based of the defiitio of oise characteristics ad aalysis of IC data sheets The resistors AB ad i OrCAD PSice A/D geerates equivalet thermal oise currets i arallel with the resistors (which is the oiseless Alteratively the equivalet thermal oise currets could be rereseted by mea-square voltage sources i series with the resistors with the level e i AB 4kTABΔf (where k is Boltma s costat T is the absolute temerature i K ad Δ f f max f mi is oise badwidth i Hert B ( D ( D / ad ( AB A ( D [( D / ] ( AB where B ( D is the resistace betwee ad B termials A ( D is the resistace betwee ad A termials ad AB is the omial resistace betwee A ad B termials ormulas ( ad ( describe the behavior of a idealied model that is valid for dc ad low frequecies alicatios ogarithmic variatio of the resistaces A ad B ca be obtaied by relacig D with D Based o the structure of the DAC ots (ig a equivalet electrical circuit (ig is obtaied [ 6] It reflects the arasitic caacitaces modeled by C A C B ad C ad the o-resistace of the electroic switches by The arasitic caacitaces C A C B ad C of all digital otetiometers ca vary uder chage of the ositio of the ig Equivalet circuit of the digital ot model [ 6] The total rms oise sigal that results at ode A (or B is the square root of the sum of the average mea-square value of the idividual sources: e tot e AB e A sufficiet degree of accuracy for the urose of modelig the temerature deedece of the resistor AB has bee rovided by choosig AB (T as a liear temeraturedeedet resistor (TC havig the followig characteristic equatio [9] AB ( T [ TC( T T ] AB om (3

3 where AB is the value of the resistor at T om 7 C (SPICE-Otio TOM T is the temerature i C ad TC is the liear temerature coefficiet The value of the TC corresods to the temerature coefficiet of the resistace i IC data sheets AB B Programmable circuits emloyig DAC otetiometers ad theoretical aalysis The electroic circuits of a rogrammable voltage divider with a outut voltage follower (buffer usig o am ad a rogrammable o-ivertig amlifier are the most commoly used circuits ito which occurs the effect of all elemets of the equivalet circuit of the DAC otetiometer show o ig The basic circuit of rogrammable voltage divider with the outut buffer is reseted i ig 3 Icludig the equivalet circuit of the digital ot o ig ad liear model of the o am [] we get the ac equivalet circuit of the aalyed voltage divider The [ Y ]-matrix of the circuit was comosed usig the well-kow formulas [] ad after some trasformatios (usig the coditio << A ad r id where G is the iteral resistace of the iut voltage source u i A d is the oe-loo voltage gai ad r id is the differetial iut resistace of the o am we get the followig exressio for the trasfer fuctio / A AU ( s A B A B ( C CiA A B s A B A B H (4 s / where r ia ad C ia are the iut resistace ad iut caacitace of the outut buffer Comariso of the left ad right sides of equatio (3 results i the followig formulas H G B ad (5a A B AB ( C C ia r AB AB ia A d (5b where AB A B I ac mode of oeratio formula (5a defie a low frequecies (at << voltage gai of the voltage divider ad formula (5b defie the value of the workig badwidth 3dB at level 3dB The badwidth 3dB determies the workig frequecy rage ad the stability of the digital ots I some of the reviously roosed aalyses of the equivalet circuit for the digital otetiometers []-[4] [7] are obtaied formulas for the badwidth ad are discussed the effects of the various arasitic elemets However i []-[4] the formula for the badwidth ot reflected the effect of the wier resistace ad the ifluece of the load I [7] the variatio of the badwidth with regard to the arasitic caacitaces ad the ositio of the wier are studied but the formula i a aalytical form is ot give A AB B u i D DAC o am u o outut ig 3 Basic electroic circuit of rogrammable voltage divider usig DAC otetiometer ad outut buffer If r ia ad C ia (for ideal outut buffer formulas (5a ad (5b simlifies: H /( ad B A B /( C CiA( AB rom the aalysis of formulas (5a ad (5b for low frequecies ( f << f the voltage gai is equal to H ad the hase shift betwee the iut ad outut sigal is aroximately equal to ero or high frequecies ( f > f the gai is decreased to A U H f / f urthermore the hase shift is ϕ 9 That esures the stable oeratio of the circuit i a wide frequecy rage but i some alicatios for frequecies i which f > f the additioal hase shift betwee the outut ad the iut sigal ca be cause o a uwated effect or examle if the circuit o ig 3 is used for volume cotrol i multile-chael audio ower amlifiers [-] additioal hase shift ca affect o the stability of the outut ower stage or A d the workig frequecy badwidth of the o am eeds to be to 5 times larger tha the cutoff frequecy f If i the circuit o ig 3 to exted the badwidth the buffer is removed the resistace r ia ad the caacitace C ia will be the arameters of the load The well-kow rogrammable o-ivertig amlifier with digital ot i the egative feedback is show o ig 4 I dc mode of oeratio the accuracy cosideratios for rogrammable amlifiers are somewhat more comlicated tha the oes for the amlifier circuits with a fixed voltage gai This is because the trasfer fuctio is varyig i a wide dyamic rage accordig to the value of the biary code D The accuracy for ay combiatio of the biary code is determied from the total error This is the deviatio of the actual outut

4 voltage u out( actual from the ideal outut voltage u out( ideal Thus u out( actual uout( ideal ± uerror (6 where ± uerror reresets the sum of all the idividual comoets (outut offset voltage of error ormally associated with the amlifiers whe workig i dc mode of oeratio u i iut D o am DAC A AB B C u o outut ig 4 A o-ivertig amlifier circuit usig DAC otetiometer i egative feedback As with ay trasfer fuctio the error geerated by the fuctio itself may be referred to the outut or to the iut The idividual error comoets of rogrammable amlifiers are: iut offset voltage U io iut bias ad leakage currets as well as their temerature drifts or most of the rogrammable amlifiers emloyig digital ots the u out( actual as a fuctio of the major comoets of error ca be foud by ( ( ± uout actual uout ideal U io I B I KGA (7 where the resistace corresods to the resistace B IB IiB Iio / is the iut bias curret of the ivertig iut of the o am ad I KGA I KGB I KG / is the leakage curret at A ad B termials The leakage curret is defied as curret flowig from the ode o the coditio that to the ode a voltage V DD / at the alied ad the A ad B termials are o-coected he chagig the ambiet temerature the electrical arameters of the digital otetiometer ad the arameters of the o ams are chaged as a result of this the u error is icreased: ( δδt u err ΔUio ( δδt ΔI ( ± δδt ( δ ΔT I (8 KGA where δ is the liear temerature coefficiet of the resistors Δ Uio Uio / T is the temerature coefficiet of the iut offset voltage ΔI I / T is the temerature coefficiet of B B B the iut bias curret of the ivertig iut ad Δ T T T om I ac mode of oeratio the circuit the [ Y ]-matrix of the o-ivertig amlifier was comosed usig the formulas give i [] ad after the trasformatios (usig the coditio r for the trasfer fuctio ca be writte C U id A ( s s Ad ( C C C ( CP C ( CP C ( sc /( / s C ( C C Ad ( C C C H ( s / (9 s s( / Q where C C CB CM ( C M is the arasitic board caacity with values usually u to 3 [3] A id C C C C C M id id icm ( C C C ad C icm CiCM CiCM / ad C are the elemets determied the domiat ole frequecy ( f / π( C ad A d is the dc oe-loo voltage gai of the o am Comariso of the left ad right sides of equatio (9 gives the formulas Ad H ( ( C C C trasmissio coefficiet agular ero frequecy /[( C ] ( d A /[ ( C C C ] ( ole agular frequecy (comlex ole or self-oscillatig frequecy ad Q ( C C C A d ( C C C (3 ( C C C C ( C C quality factor

5 After substitutio of s j i formula (9 for the geeral comlex trasfer fuctio is foud H A U ( j j (4 ( / j Q The module ad the hase of the geeral comlex fuctio (4 for the o-ivertig amlifier are / H A U ( j AU ( ad (5a ( Q ϕ AU arcta arcta Q (5b ( The aalysis of formulas (9 (5a ad (5b shows that the trasfer fuctio is characteried by a double-ole with agular frequecy equal to ad oe real ero with agular frequecy However for the voltage gai has a value H A U while for much higher frequecies the gai decreases to ero Therefore the trasfer characteristic of the rogrammable o-ivertig amlifier circuit is a low-ass tye or Q 77 at a frequecy equal to the deomiator teds to ero ad the voltage gai theoretically icreases toward ifiity As a result occurs eakig the frequecy characteristic ad the hase shift betwee the iut ad outut sigal icreases raidly to 8 Moreover the circuit of the o-ivertig amlifier becomes ustable I the cases where Q < 77 ad < the frequecy resose mootoically decreasig ad the hase shift decreases to 9 At < occurs rigig i the outut sigal which ca cause ustable oeratio or chose o am ad resistors i the egative feedback the values of oles ad eros are obtaied Based o these values at A U ( j equal to / after some trasformatio of the comlex fuctio for the badwidth 3dB is obtaied 3dB Q 4 4 Q (6 At Q / formula (6 simlifies ad yields 3dB 4 4 (7 or >> ad Q / 3 db O the theory ad desig of the amlifier circuits usig o ams are dedicated relatively large umber of books ublicatios ad alicatio reorts I the available literature []-[] [4]-[8] the workig frequecy badwidth is determied basically by the deth of the egative feedback without takig ito accout the oles ad ero locatios determied maily by the equivalet iut caacitace C ad the load caacitace C The magitude ad hase Bode lots for the loo gai at < of a o-ivertig amlifier emloyig digot equivalet circuit (ig is show o ig 5 The Bode lots are costructed by summig the corresodig logarithmic characteristics of all their sectios realiig eros ad oles: ( lg A U ( i ( ad (8a ϕ A U i i ( ϕ ( (8b where i( are the idividual logarithmic magitude characteristics ( lg H lg( s / ad 3 lg[ s s( / Q ] ad ϕ i ( are the idividual hase characteristics ( ϕ arcta ad ϕ3 arcta Q ( ormulas ( ( ad ( ad Bode lots o ig 5 show the followig: a or AU B C there is always causes eakig i the magitude lot ad a raid hase shift ( 9 i the hase lot for the loo gai at a frequecy aroximately equal to By icreasig the dc voltage gai A U the ero frequecy icreases whereby the amout of eakig i the frequecy resose decreases; b The hase margi ( ϕ m 8 ϕ where ϕ is the absolute value of the hase shift of the outut sigal at A U of the o-ivertig amlifier is greater tha 45 However the stability of the circuit is worse or a give frequecy of the iut sigal at which the asymtotes ad 3 itersect the rate of the chage of the voltage gai is about 4 db / dec The sikes i the magitude lot leads to a icrease of the amlitude of the outut sigal which may adversely effect o the ext stages ad sectios of the electroic devices ad systems i

6 db A U db db/ dec f f db/ dec 3 A U ( f H values are obtaied The fuctioal block model of a digital ot is show o ig 6b ogarithmic variatio of the wier ca be obtaied by i the formulas for the resistaces A( ad B( with PS(@D (ad PS(@D (a ϕ f f ϕ 3 ϕ A U ( f H 8 ig 5 Magitude ad hase Bode lots for the loo gai of a o-ivertig amlifier emloyig digital ot equivalet circuit o ig ϕ (b III MACO-MODE DESCIPTIO Perfectio is achieved ot whe there is othig more to add but whe there is othig left to take away Atoie de Sait-Exuery The techical requiremet for effective models is geerally agreed whe the simlest ossible model is develoed Simle models have a umber of advatages They ca be develoed faster are more flexible require less data ru faster ad it is easier to iterret the results sice the structure of the model is better uderstood As the comlexity icreases these advatages are lost [9] Oe method to decrease simulatio time ad imrove the covergece without a sigificat loose of iformatio is by usig behavioral modelig techique Behavioral modelig is a way of rovidig macroscoic models of the corresodig microscoic (microelectroic circuits The use of behavioral modelig for aalogue ad mixed-sigal devices has bee well kow for a few years Behavioral models are realied by usig structural macro-modelig the C code modelig VHD-AMS ad fially the aalogue behavioral modelig (ABM available i OrCAD PSice A/D The roosed simle macro-model of DAC ots basically use elemets ad rimitives from the stadard ABM library The mai advatages of the ABM techique are the ortability to all SPICE simulators ad also the user s access to the macro-model s iteral equatios ad variables The of DAC ot macromodel is develoed followig the desig methodology reseted i [] ad alyig simlificatio ad build-u techique kow from modelig commo oeratioal amlifiers [] The circuit diagram of the roosed model is show o ig 6a of dual DAC otetiometer is reseted as a hierarchical block (HB_DAC There are two sectios The model arameters of the blocks are give without cocrete umerical values Durig the modelig of a articular IC the umerical ig 6 The roosed behavioral macro-model of a dual DAC otetiometer (a Circuit diagram (b uctioal block I comariso with the equivalet circuit o ig i the fuctioal block o ig 6b to reflect the aalog switches oise effects is added oise stages icludes curret-cotrolled voltage sources ad arallel resistaces with value 4 k 98 K /( V V The rms voltage e V is the white oise ad ca be foud by e o o DS e e s e where the rms voltage e DS is the datasheet value of the white oise ad the rms voltage e e s is the white oise geerated by large-value resistors commoly used i the macro-models Also to A ad B termials are added ideal curret sources ( I A( ad I B( modelig the leakage curret at absece of iut sigal The termial arasitic caacitaces are modeled with C A ad C B ad the caacitors C TA ad C TB roduces the frequecy deedece of the aalog crosstalk ratio The aalog crosstalk is defied as a ratio betwee ad A if to the ode A a ac voltage V A is alied termial B is coected to groud ad termials A ad B are o-coected I this mode of oeratio there is some eetratio of the iut ac sigal through the caacitor C T The aalog crosstalk ratio (AC of the macro-model ca be calculated with ( CT CA AC lg / (

7 The model arameters for DAC otetiometer AD535 from Aalog Devices used as a examle i this aer are: 5 kω ad 5 kω ; 5Ω ; Stes 4 ; AB( ( CA ( CB( (at half-scale; C ( 8 (at half-scale; C T 98 f ; TC 5m / C ad I I KGB A The biary codes D ad D are set as a global arameter for simulatio testig ad ca take values from to 3 KGA 5 IV MACO-MODE PEOMACE AD DISCUSSIO The workability of the roosed macro-model o ig 6 is reseted through simulatio results usig the OrCAD PSice simulator built i Cadece OrCAD ad also through exerimetal results from the electroic circuits cofigured o rototye boards The ower suly voltages are chose to be ± 5V The verificatio check of the roosed macro-model show ig 6 is erformed by comarig the simulatio results with the datasheet arameters of digital ot AD535 The test circuits for simulatio modelig are created followig the test coditios give i the semicoductor data books of the corresodig IC I Table the simulatio results ad the data sheet arameters for IC AD535 are reseted otice that the average error betwee the roosed macro-model ad datasheet arameters is ot higher tha 5% which guaratee the correct degree of accuracy To validate the roosed model simulatio ad exerimetal test of rogrammable voltage divider (ig ad a rogrammable o-ivertig amlifier (ig 3 was erformed I articular the exerimets are erformed o the EVA- AD535EBZ Develomet board [] which is built aroud the CMOS AD535 device with 5 kω ad 5 kω omial resistace or the o-ivertig amlifier the values of the calculated assive comoets are: kω ±% (with 5m/ºC B 6 5kΩ at D 56 ( A U 7 5 ; B 5 kω at D 5 ( A U 3 5 ; ad B 87 5kΩ at D 768 ( A U 9 7 TABE I COMPAISO BETEE SIMUATIO ESUTS AD DATA SHEET PAAMETES Parameter AD535 data sheet [8] The roosed digital ot macro-model esolutio ier resistace 5 5 Commo-mode leakage curret A A Caacitace at A ad B Caacitace at 8 8 Badwidth at 3dB 3kH at 5kΩ 3kH at 5kΩ 3kH at 5kΩ 36kH at 5kΩ Aalog crosstalk 8dB at 5kΩ 8dB at 5kΩ Temerature coefficiet 5 m/ C 5 m/ C esistor oise desity V/H at 5kΩ 3 V/H at 5kΩ 64V/H at 5kΩ 643V/H at 5kΩ or the ivestigated circuits as a active elemet AD8A (from Aalog Dev is used The simulatio modelig of the circuits usig AD8/AD SPICE macro-model versio A (8/99 was erformed The basic modeled arameters of the AD8 SPICE macro-model at V S ± 5V ad kω 3 are: 6 μv I io A I ib 6 A r Ω U io 3 C id 5 r icm Ω C icm 8 A d db f 8H B 6MH ϕ m 63 Uom U om 48V S U V / H at f kh S 3 V / μs t s 8μs (at % eakig of the iut sigal ad r o 4Ω (the outut imedace Z o 44 kω withi the rage from dc to H The AD8 SPICE macro-model is ot caable of simulatig the oise the temerature effects ad some of the other secod-order effects To obtai the ac trasfer characteristics through simulatio a AC swee aalysis is erformed withi OrCAD PSice The AC swee aalysis causes a AC swee to be erformed o the circuits AC swee is a frequecy resose aalysis PSice calculates the small-sigal resose of the circuit to a combiatio of iuts by trasformig it aroud the bias oit ad treatig it as a liear circuit or the AC swee aalysis secified i ig 3 ad ig 4 the frequecy is swet from H to MH by decades with oits er decade The iut voltage source is with amlitude mv ad iitial hase shift equal to ero The ac trasfer characteristics of the circuits are obtaied exerimetally by usig of fuctio geerator SG- digital storage oscilloscoe TDSB ad Istek GC-8H frequecy couter or the rogrammable voltage divider at D 5 the trasfer characteristics are lotted o ig 7 The comarative aalysis of the obtaied frequecy resoses ad trasfer fuctio give (4 results i the followig coclusios or f the voltage gais A U are with costat value ad corresods to formula (5a This remais alies to frequecies f << f which meas that the logarithmic characteristic is a straight lie almost arallel to the x-axis At a frequecy f the accordig to formula (5b is A U 3dB ie it f decreased by 3dB comared to its value at f The simulated values of the ole frequecies are f 36kH at AB 5 kω ad f 3kH at AB 5 kω At frequecies f >> f the trasmissio coefficiet decreased aroximately db / dec Therefore i a logarithmic scale at f >> f the frequecy characteristic is aroximated by a straight lie that has a sloe 6dB / dec (or db / dec The differece betwee simulatio results ad exerimetal studies i the frequecy rage from H to MH is less tha 5% which cofirms the correctess of the theoretical aalysis ad the accuracy of the roosed behavioral model id

8 ig 7 Comariso of the simulatio ad exerimetal results for the rogrammable voltage divider I dc mode of oeratio of the o-ivertig amlifier the outut offset was checked for the values of digital code D chaced to 56 5 ad 768 the corresodig values of u error accordig to (7 were foud to be 46mV 76mV ad 4 mv resectively The simulated values of the outut offset are close to the calculated values ad the error is ot greater tha % The cocrete values of the offsets obtaied from the exerimetal study are: 5mV mv ad 3 85mV Moreover a error of 5% betwee exerimetal ad simulatio results is quite accetable cosiderig the toleraces of the techological arameters of the chose o am By icreasig the temerature from 5 C to 55 C for a exerimetal circuit imlemeted o a searate 4 PCB lamiate with SMD assive comoets the outut offset decreases from mv to 85mV The corresodig calculated values of this arameter from (8 are chaged from 76mV to 8mV The simulatio ad exerimetal results for the ac trasfer characteristics at three values of the dc voltage gai of the o-ivertig amlifier are lotted o ig 8 As ca be see for low frequecies aroximately u to kh the gais are with costat value ad is frequecy ideedet At voltage gais equal to 75 (D 56 ad 35 (D 5 i the form of the frequecy resose causes eakig ( Q > 77 Moreover at gais 75 ad 35 the hase shift is 9 or the voltage gai equal to the 97 (at D 768 the calculated values by ( ( ad (3 are f 4 3kH f 6 3kH ad Q 739 The frequecy resose has a small eak due to the additioal arasitic oles of the o am The calculated badwidth by (6 is 57 kh the simulated value is 68 kh ad the exerimetal result is 65 kh resectively The hase margi for the three gais is greater tha 45 which meas that the amlifiers are stable accordig to the Bode criterio [] The differece betwee the simulatio ad exerimetal results is due to the ifluece of the additioal arasitic oles determied by the iertial roerties of the o am ig 8 Comariso of the simulatio ad exerimetal results for the rogrammable o-ivertig amlifier circuit

9 V COCUSIO Theoretical aalyses of the structure ad the ricial of oeratio of the basic rogrammable electroic circuits emloyig CMOS DAC otetiometers have bee reseted Based o the aalysis are obtaied equatios for the trasfer fuctios ad formulas for the most imortat dyamic arameters Moreover usig the obtaied formulas is develoed a imroved macro-model of DAC otetiometers based o the elemets ad rimitives from the stadard ABM library build i PSice A/D simulators The roosed model is defied as a hierarchical block i OrCAD Cature ad accurately describes the behavior of most commo digital ots icludig the basic electrical arameters ad some of the secod-order effects such as oliear icremet/decremet of the wier commo-mode leakage curret oise desity ad temerature coefficiet Oe of aims of the further work is focused o creatig a VHD-AMS based model of digital ots i which by the cotrol data-word are reflected the various modes of oeratio of the real devices ACKOEDGMET The AD535 digital otetiometers ad EVA- AD535EBZ develomet board used i this work were rovided by Aalog Devices EEECES [] Kester Data coverter alicatios i Aalog-Digital Coversio orwood MA: Aalog Devices 4 Chater [] B Baker ( Aug Comarig digital otetiometers to mechaical otetiometers Microchi Alicatio ote: A 9 [Olie] DS9A Available: htt://wwmicrochicom/dowloads/e/ Aotes/9df [3] A i (ev A Dec esolutio ehacemets of digital otetiometers with multile devices Aalog Devices MA A-58 [Olie] Available: htt://wwwaalogcom/static/imorted-files/ alicatio_otes/a-58df [4] A i (3 Aug Versatile rogrammable amlifiers usig digital otetiometers with ovolatile memory Aalog Devices MA Alicatio ote A-579 [Olie] Available: htt://wwwaalogcom/ static/imorted-files/alicatio_otes/a-579df [5] Aalog Devices orwood MA 6-96 USA Digital otetiometers [Olie] Available: htt://wwwaalogcom/ e/digitalto-aalog-coverters/digital-otetiometers/roducts/ idexhtml [6] B Ševcík ad Bracík Alicatio of digital otetiometers i multifuctioal active filters at frequecies above MH Iteratioal Joural of Microelectroics ad Comuter Sciece vol o [7] B Ševcik Modelig ad sigal itegrity testig of digital otetiometers i The 7th Iteratioal Coferece Mixed Desig of Itegrated Circuits ad Systems MIXDES 4-6 Jue arsaw Polad 4-45 [8] AD535: ovolatile memory dual 4-ositio digital otetiometer datasheet Aalog Devices [Olie] Available: htt://wwwaalogcom/e/digital-to-aalog-coverters/digitalotetiometers/ ad535/roducts/roducthtml [9] Aalog arts i MicroSim PSice A/D eferece maual Irvie Califoria USA: MicroSim [] V Tiete ad Ch Schek Oeratioal amlifiers i Electroic circuits d Editio Berli Heidelberg ew York: Sriger-Verlag [] J Boyaov ad E Shoikova Trasfer fuctios of aalog electroic circuits i Theory of electroic circuits Sofia: Tehika (i Bulgaria [] M Seifart Dyamische Stabilität gegegekolter Verstärker i Aaloge Schaltuge 6 Auflage Berli: Verlag Techik (i Germa [3] High seed aalog desig ad alicatio semiar Texas Istrumets Ic [Olie] Available: htt://wwwticom/lit/ml/sly69/sly69df [4] B Erik Badwidth limitatios i curret mode ad voltage mode itegrated feedback amlifiers IEEE Iteratioal Symosium o Circuits ad Systems ISCAS 95 3 Ar-3 May 995 Seattle A vol [5] Macii ( March eedback Amlifier Aalysis Tools Texas Istrumets Alicatio reot SOA7A [Olie] Available: wwwticom/lit/a/sloa7a/sloa7adf [6] M Samadi A Karsilaya ad J Silva-Martie Badwidth ehacemet of multi-stage amlifiers usig active feedback IEEE Iteratioal Symosium o Circuits ad Systems ISCAS May 4 Vacouver Caada vol 69-6 [7] S Mahaligam Md Mamu ahma ad a Mimi Diyaa a Zaki Desig ad Aalysis of a Two Stage Oeratioal Amlifier for High Gai ad High Badwidth Australia Joural of Basic ad Alied Scieces vol 6 o [8] Y Amaa A eview Paer o Desig ad Sythesis of Two-Stage CMOS O-Am Iteratioal Joural of Advaces i Egieerig ad Techology vol o [9] S obiso Cocetual Modelig for Simulatio: Issues ad esearch equiremets i iter Simulatio Coferece 6 SC Dec 6 Moterey CA [] S obiso Model buildig ad testig i Successful Simulatio A Practical aroach to Simulatio Projects odo: McGraw-Hill [] G Boyle B Co D Pederso ad J Solomo Macromodellig of itegrated circuit oeratioal amlifiers IEEE Joural of Solid-State Circuits vol 9 o [] AD535 o-volatile memory digital otetiometers evaluatio board user maual Aalog Devices P O Box 96 orwood MA 6-96 USA 3 Ivailo M Padiev was bor i Sofia Bulgaria i 97 He received the BS ad MS degrees i electroic ad automatio egieerig from the Techical Uiversity of Sofia Bulgaria i 996 ad the PhD degree i electroic egieerig from the same uiversity i Sice to 4 he was a assistat rofessor with the Aalog electroic laboratory Sice 5 is a associate rofessor with the Electroic egieerig deartmet Techical Uiversity of Sofia Bulgaria Mai fields of educatioal ad scietific activities: aalog electroics mixed-sigal systems emloyig rogrammable ICs (PGA ad PAA ad behavioral modelig of electroics comoets ad devices usig VHD ad VHD-AMS Books: Moograhy PSice macro-models of oeratioal amlifiers (; Aalog electroics (3 8; Electroics devices (4; Electroics ad micro-rocessig systems (6; Aalog ad digital electroics (9 ad Mixed-sigal circuits ad systems lecture otes ( At his moograhy etitled Electroic circuits with oeratioal amlifiers aalysis ad desig has bee ublished