Electronic-Photonic Integration

Transcription

1 1 Electronic-Photonic Integration Grand Challenges and Key Needs for 2019 Datacom RF Sensing Cost Energy Density - Bandwidth Density Lionel C. Kimerling MIT AIM Photonics Institute

2 2 Challenges and Needs for 2019 Critical Themes (2019) r ASIC co-packaging Optical Connectors High Density Technology r TxRx (DC) - RF Signal Processing (5G) Sensing (chem) Economics r Time-to-$ - Supply Chain Coordination Success in 2019 r Continuity: electronic-photonic integration Outline: Economics, Technology, Manufacturing

3 3 Define the Scaling Vector More Moore scaling clock frequency, transistor count and dimensions scaling chips/package or packages/board count? More-than-Moore everything is an option for continued scaling new technology (nano, quantum, photons?) Integrated Photonics communication-centric architectures system level design

4 4 Integrated Photonic Manufacturing Ramp Commercial ramp is strong, as expected. r Luxtera and Kotura first to market r Intel Silicon Photonics 100G PSM4 QSFP28 Optical Transceiver hyperscale data centers: Amazon, Google, Microsoft, Baidu, Tencent, LinkedIn, Alibaba, and Facebook r System vendors: Juniper, Dell, NTT, HPE, CISCO, CIENA, IBM, HUAWEI, TE r Chip manufacturers and supply chain: Broadcom, STMicro, Seagate, MACOM r Global Foundries, ST Micro, TSMC, TowerJazz run product. r AIM, CEA-LETI, imec, VTT, IHP, TUE, NRC, IME, run R&D with PDKs. Design infrastructure has been truly disruptive to chip fab Cpk and Test are the critical path to on-time product IPSR-I 2018

5 5 Grand Challenge: Electronic-Photonic Interconnection 2035 Charter: Determine the evolution of the chip-package-system level interconnection hierarchy for electronic-photonic systems. The introduction of distance independent photonic interconnection will likely be disruptive to the standard 7-level interconnection hierarchy. Specification and scaling paths for the following metrics will be delivered. cost, density, bandwidth, latency, power dissipation, materials integration system requirements for data centers mesh architectures, global network reconfiguration optical and electrical power delivery, I/O ports supply chain nodes interfaces, connectors, circuit stacking, form factors at all levels test, yield and reliability MIT Microphotonics Center

6 6 Miniaturization Disaggregation System-in-Package System-on-Chip Conventional Server Motherboard Facebook-Designed Motherboards Disaggregation On-Board Optics Pluggable Si Photonic SiP Si Photonic SoC Optics-on-Board (2016) DC switch: 51.2 Tbps (2023) Optics-in-Package (2020) TxRx Chiplet Optics-on-Chip (2025) Optical Signal Processor (5G) Where is the laser during these transitions? Embedded Chiplet-in-Package Monolithic

7 7 from TxRx to Package Integration compliments of Robert Blum, Intel

8 8 E-P Interconnection 2018 Cu Technologies: Well Advanced with no Supply or Technical Issues r Cu on chip R&D vs. Al incumbent solutions: CMP, low k dielectric, diffusion barriers Optics on Board Needs Solutions r Planar SM waveguide technology; TxRx surface mount technology (board,package) Conventional motherboard packaging reduced as Modules increase Business Trends: value point migration is changing business models r end users (e.g., data center) designing their own chips Silicon Photonics is critically dependent on the evolving supply chain r Materials, processes, architectures and designs r Chip functionality developments and a Roadmap to E-P circuitry John MacWilliams, E-P 2035 study

9 9 Moving Photonics from the I/O ports into the System

10 10 Photonic Interconnection: Board Board Package - Chip

11 11 On-Board Optical Interconnection Before the benefits of silicon photonics can be realized, new high performance and cost effective solutions to optical packaging and connectorization must be developed. Optimum performance and functionality from silicon photonic devices and circuits require single mode (SM). SM requires precision alignment inside the package and in optical connectors. r expanded-beam (10um expanded to 80um) optical connectors relieve alignment and dust limitations r early entry for MM at short reach? Technology: TxRx Optical interfaces degrade performance and increase cost. OBOI AIG: Terry Smith, 3M; Tom Marrapode, Molex

12 12 AIG for On-Board Optical Interconnection Module-Mounted Receptacle Body Chip-to-Fiber Attachment Element Laser SiPh Substrate Line Card Expanded-Beam Ferrules 1 Module Connector Body SM Fiber Cables Backplane Connector Body Expanded-Beam Ferrules Backplane Adaptor Body inemi-ipsr-aim-mit Microphotonics Center Consortium Connector Technology Working Group Backplane Charter: assess technology benefits and issues SM expanded-beam connector interfaces in board-level optical interconnection by building and testing systems. Phase 1 Surface mount > pluggable SM e-b connector loss r r 0.3dB best channel 0.6dB average all channels Phase 2 Package-level connector

13 1 3 Expanded-Beam Connector Implementation Advantages Relaxed alignment precision Beam size ~ 80µ instead of 9µ Greater tolerance to debris Lower mating force No need for physical contact of optical cores. Potential for lower-cost systems Lower precision in manufacturing Lower maintenance Concerns Typically higher loss. Anti-reflection coatings may be required. Tighter angular alignment Typically easier to obtain than lateral alignment. Tight tolerances for fiber-connector Molded optics and fiber holder

14 14 AIGs: Application Interest Groups Phase 1: define system requirements Phase 2: define technology gaps and options Phase 3: prototype and test solutions r Datacom: A Scalable Transceiver for On-Board Datacom r LIDAR: A Higher Definition AR Camera System r Analog RF: A Compact Base Station for 5Gbit/s Wireless r Sensing: An Integrated Photonic CH 4 Sensor for Pipelines currently active: INEMI administrative support for On-Board Marrapode, Smith, Agarwal, Glick, Saini, Wada

15 15 Photonic Interconnection: Package Board Package - Chip

16 16 Laser Integration IPSR Spring 2016, Ishii IPSR Fall 2018 Distance from Chip Intel NTT Ghent AIM AIO Core MACOM Luxtera AIST Package Architecture chip interposer board rack

17 17 IPSR International: Evaluation of Laser Integration Options Techniquesà Hybrid (flip-chip) Integration Heterogeneous integration by adhesive/direct bonding Direct Growth of InP on Silicon un-patterned III-V epitaxy (semi-)processed lasers by (die-to-wafer bonding transfer printing /transfer printing) Specification Integration process complexity Heat Sinking Integration density III-V material usage efficiency Wafer scale integration Laser integration process throughput Laser test before integration Option Maturity (TRL) Abdul Rahim, U Ghent 17

18 18 Electronic-Photonic Integration Hybrid always precedes monolithic r E and P technology nodes advancing at different rates r Chip-package co-design necessary for performance scaling r Assembly yield penalty limits cost scaling Monolithic is the ultimate solution r Benefits: cost, design, performance r Challenges: density, interconnection, packaging Near term compromise proposal: integrate node-insensitive e-p functions e.g., stability control circuitry for a universal WDM interface

19 19 Photonic Interconnection: Chip Board Package - Chip

20 20 Monolithic Integrated Isolator: 40dB isolation, 3dB loss Resonant isolator Small footprint Resonant λ depends on propagation direction TE and TM mode optical isolators Demonstrated ring resonator and Mach-Zehnder interferometer devices TM Ring resonator: 40 db isolation, 3 db loss TE Ring resonator: 20 db isolation, 11.5 db loss TM MZI: 30 db isolation, 20 db over 2 nm bandwidth, 6 db loss. TE MZI: 30 db isolation, 10 db over 2 nm bandwidth, 9 db loss. C A Ross and J J Hu, MIT

21 21 World best performance integrated isolator: A monolithic magneto-optical isolator with 3 db insertion loss and 40 db isolation ratio CeYIG is under the waveguide Grey scale lithography ACS Photonics (21 Nov 2018)

22 22 Integrated Photonics Applications Sensing RF/5G/Lidar Video production transport process display

23 23 Telepresence Simulation and 3D visualization wil transmit nuance of presence. Benefit metrics for telepresence: FoM = function/joule r decreased carbon footprint of optional transportation r lesser exposure to global pathogens r Efficiency and security of temporal presence r savings in space, weight and energy What is a reasonable telepresence scaling target? r 7680 x 4320 pixels, RGB, 12bit, 240 fps, 2 views = 600 Gbps r scale to 600 fps x 256 views = 180 Tbps per participant video: production transport process display 2

24 24 NHK s Super High Vision: Video 2020 Olympics: Consider a stadium being covered by eight 8K UHD cameras. How would these be sighted around the action? Uncompressed data from cameras would be 7680 x 4320 pixels, 3 x 12bit per pixel at 120 fps = Gb/s multiplied by the number of cameras in this example = 1147Gb/s. (higher frame rates are likely in future) To extract live multi-platform scene streams from this pool of data r cameras must be synchronized and their positions closely referenced r optical connections would be required between cameras and scene processing How much processing power will reside in the Data Center? How much reality will survive live VR compression by simulation. Chris Chambers, BBC, retired

25 25 NHK s Super High Vision: Audio The cost of the audio bandwidth is small compared to the cost of the codex, latency and potential quality issues r linear stereo stream at 48Khz 24 bits will fit within 3Mhz Super High Vision's 22.2 sound format: 24 channels in layers r a large set of microphones to produce audio perspective r 22.2 format in linear format stream is 55 Mbits which extremely small compared to the 8k video r the challenge is how an end consumer gets a sensible balance in 7.1, 5.1, stereo or even mono if the source is Telepresence is much more than high data rate hardware. Capturing, transmitting and reproducing audio perception is an unsolved problem. Chris Chambers, BBC, retired

26 26 Integrated Photonics Applications Sensing RF/5G/Lidar - Video

27 27 5G Service Provider Goals Conventional Free Space Communication RF-Photonic Communication reduced interference by "imaging" RF signals on to a detector plane passive optical processing of "upconverted RF signals from multiple sources reduced SWaP-C by integration of the major components of the system Dennis Prather, U Delaware

28 28 5G is more than BW: Beam-Space Processing Beam-Space Processing Optical phased arrays Electrical phased arrays Optical matrix address Efficient point-to-point Spatially resolved sources Dennis Prather, U Delaware

29 29 Integrated Photonics Applications Sensing RF/5G/Lidar - Video

30 30 30 IoT and Sensor Networks Basic sensor component: photon source, filter, detector, ASIC Free space apps should not be neglected. Generic IoT: 3D-SiP package architecture heterogeneous integration of sensors, RF, memory, photonics general purpose SiP-IoT hub environments (uncontrolled) both tethered and energy scavenged power redundancy to ensure long term, service free reliability

31 31 Dual-mode Detection refractometry and absorption spectroscopy Quantitative analysis of multi-component mixtures Chen et al., ACS Nano 8, 6955 (2014).

32 32 Photonic Microfluidic Integration PDMS: POLY-DI-METHYL-SILOXANE Optofluidic integration Minimal sample amount requirement: < 0.1 µl Multiple functionalities on a single chip analyte sampling, separation, purification

33 33 Digital Fourier Transform (dft) Spectrometer dl 2 2 dl 2 4 dl DOWN UP DOWN DOWN N = 2 j input UP DOWN UP UP detection 2 1 l D l = 2 j ngdl -2 dl -2 3 dl -2 5 dl Device fabricated using R&D silicon photonics foundry service J J Hu, MIT

34 34 Economically-Aware Photonics Understanding Cost Barriers to Widescale Adoption Randy Kirchain, MIT

35 35 Disaggregation is Modular Design The traditional data center design has been hitting several challenges: The various server elements follow different trends of cost and performance. Upgrading of the CPU or memory in the traditional design requires an entirely new server with new motherboard design at considerable expense and economic waste.

36 36 Cost of lead time and uncertainty for datacenters Interconnects represent a significant cost for datacenters For all hardware, data centers incur an inventory holding cost Because bandwidth demand is growing and capital comes in chunks, a data center is often capacitized to meet the demands at the end of the hardware life cycle This extra capacity costs to purchase and maintain, but sits as idle inventory Datacenter inventory cost

37 37 The Data Center Upgrade Decision Total cost = + (Purchase + Operating) cost + Inventory cost + Shortage cost (Revenue loss from not having enough capacity) Longer or uncertain lead time can lead to equal total cost even when (Purchase + Operating) cost is 25% lower. Creates a strong incentive to stick with an existing technology r has lower conventional life-cycle cost (i.e., lower purchase+ operating cost) Lead time (months) Iso-Total-Cost Curve (Purchase + Operating) Cost ($/unit) W. Yu and R. Kirchain, MIT

38 38 Supply Chain Coordination Extend this table to 3D waveguide (industry expects this to happen by 2020) Extend this table to independently routable optical layers (vertically integrated WG) Integration level complexity to be added Study cost scaling at system level Outline: Economics, Technology, Manufacturing Ajey Jacob, Global Foundries co-chair, Monolithic Integration TWG

39 39 Fabless Business Model Design into Foundry PDK (Process Design Kit) r Design manual r Process flow (layer thickness, doping levels) r Device library with compact models Design for Manufacturing r Optimization of nominal design is rarely successful r Source and statistics of variation are critical design inputs r Design centering compensates for process deficiencies

40 40 The AIM Virtual Design Lab: Overview Instruction AIM Academy Virtual Lab Phase 1 Simulation Library ( ) EPDA Software Phase 2 Blended Learning ( ) Workforce Training interactive modules for the manufacturing workforce PIC engineers Fab and Test technician certification Dr. Erik Verlage everlage@mit.edu Dr. Sajan Saini sajan@mit.edu

41 41 Demo Directional Coupler 41

42 42 Fall 2018 Technical Meeting: Technology Data Center global footprint: 20M sqft and increasing 2x/2yrs (new Moore s Law?) Intra Data Center short reach tradeoff: MM bandwidth limits vs. connector loss Fiber Connect: surface mount TxRx with pluggable fiber connector Chip-Package co-design: TxRx-ASIC integration System-in-Package: edge fiber connect with 128 fibers/chip edge Interposers: active/passive; digital/rf; PIC/laser/fiber connect; PIC evaluation Lasers: etched facet, wafer-level passivation and packaging, reliability 95C/1000hr DfM: statistical compact models; nominal design optimization vs. design centering AIM PDK 2.5: process flow, compact models; device library (high performance) Quantum Entanglement Repeaters: for long distance connection Roadmap Scaling Metric: Density; Tbps/cm 3 ; Joules/function

43 43 Fall 2018 Technical Meeting: Applications Markets: increasing world age and education is creating a technology pull r r DC and Sensors lead; mobile, automotive, wearables, security penetration rate into $350B semiconductor market critical with good enough performance DataCom: board - surface mount and connector; package TxRx chiplets r Expanded beam connector: WDM for BW density; low mating force; low cost RF for 5G: wireless to PIC TxRx r r low index interposer; multiple beams-frequencies-targets 100G modulation; SFDR amps; efficient power amps Sensor Systems: r If you build it they will come : ADI Sensors (the next MEMS?): LED/PD/filter/ASIC 3D ToF: facial recognition; sensors; roughness measurement

44 44 Thank You and Happy Holidays Acknowledgements AIM Photonics Institute members IPSR International TWG contributors MIT Microphotonics Center members inemi members OSA/OIDA members IEEE Photonics Society members SPIE Photonics West participants Photon Delta and the World Technology Mapping Forum TWGs