Chip-Scale Package Fiber Optic Transceiver Integration for Harsh Environments. Chuck Tabbert

Transcription

1 Chip-Scale Package Fiber Optic Transceiver Integration for Harsh Environments Chuck Tabbert (505)

2 Agenda Corporate Overview Motivation Background Technology Wide Temperature Experiments VCSEL Reliability Data Radiation Results Chip Scale Packaging Approach Summary 2

3 Ultra Communications Overview Ultra Communications (UltraComm) Founded 2006 (spin-out of Peregrine Semiconductor) Annual Revenue: >$3M (restricted by R&D projects) Gov t/commercial Ratio: 78 % (Government) / 22% (Commercial) 16 employees Fiber optic communications for harsh environments Fiber optic component packaging, optical modeling and circuit design Moved from Development into Production - Low rate production (50 units / month with planned capacity expansion) 12 active research contracts Business Sectors Military: Avionics, Missiles, Ship platforms & Unmanned systems Space Embedded computing Data Center & Automotive Presently shipping evaluation boards and engineering units to customers worldwide (adjudicated non-itar by US Dept of State)

4 Motivation

5 Commercial Trend in Embedded Photonic Modules IBM/Avago 1 x 12 Tx / Rx MicroPODs 120 Gbps Gbps/channel Parallel Optic VCSEL based 28 Tx and 28 RX units mounted onto server ASIC package 6.72 Tbps I/O 420,000 units per computer shipping 10 s of thousands per month IBM Bluewaters PERCS P7-IH 5

6 Addressing High Temperature & High Reliability Markets Military Aerospace Adapted embedded optical modules in 1999 In flight today Attractive features Compact Light weight EMI free Wide temperature environment: -55 to 100 C High performance computing Increased activity over past 5 years High temperatures near ASIC 100 W+ components Desire to raise the room temperature 2-5% energy savings per degree Celsius Desire low cost / low power $/GBps & pj/gbps aerospace network card fiber optic transceiver 6

7 Background Technology

8 X80- QFN 12.5 Gbps/channel Fury Class (50GBPS) 4 Transmit + 4 receive parallel optic 10 Mbps to 12.5 Gbps per channel (850 mw) with most advanced Built-In-Test diagnostics in the world with embedded Fiber Fault Detection utilizing OTDR to 1cm Standard ASIC Package (quad flat-pack no-leads (QFN)) Lead-less offers reduce parasitics for high speed Reflow Solderable Sealed Optical Path -40C to 100C guaranteed operation Qualified as hybrid at cable interface Configurations actively designed into space & avionic applications Transceiver (ucontroller implemented within CORE) Transceiver with non-volatile memory (space version) Transceiver with OTDR (ucontroller on customer board) RVCON splitting optics transceiver ASIC VCSEL PIN CORE (7 mm x 7 mm) OTDR ASIC CORE (with OTDR option)

9 CORE Construction CORE is the optical engine inside the transceiver Sealed component Stack of flip-chip bonded waferprocessed materials Advanced submicron flip-chip bonder 10 flip-chip bonding steps RVCON Lens guide Rugged Vertical Connector (RVCON ) Ribbon fiber connector (12 fibers) Presently 4 Tx & 4 Rx with middle 4 cables unused <0.5dB loss from laser to end of pigtail over temp -120C to 180C Allows for lower currents on lasers which significantly improves lifetime Collimating optics Transceiver ASIC 1 x 4 VCSEL array Transparent carrier 1 x 4 PIN array ASIC Options: ucontroller OTDR ASIC Memory ASIC CORE Wafer Scale Stack Ceramic Interposer

10 Ultra Comm Product Roadmap Low Rate Production 10 Gbps / channel Harsh environment Qualification completes Q CORE (optical engine) Prototype Development 2 On-going SBIR programs Status: Prototypes complete Q under SBIR Phase II program SFP+ with integrated OTDR X80 QFN Transceiver CSP Single 10Gbps CSP 25Gbps/ch RVCON Fiber Termini 4 mm Status: Prototypes complete Q under SBIR Phase II program 8 mm Status: Prototypes complete Q under SBIR Phase II program

11 Summary of Module BIT Functions OTDR Measurements Single point measurement at specified delay Full map with specified range and sample spacing Average back-reflected optical power in situ health monitor with data running Sweep frequency for fiber bandwidth measurements Transceiver Status VCSEL bias/mod/pre-emphasis settings DC Measurements RSSI: receiver average optical power RMSI: receiver optical modulation amplitude TSSI: transmitter optical power TMSI: transmitter input amplitude VCSEL operating voltage VCSEL temperature Die temperature Case (MCU) temperature Supply voltages Register tests DAC tests

12 OTDR Example: Long Fiber Corse sweep 5.25 seconds Fine sweep 7.35 seconds Biggest impediment to implementation is platform CONOPS

13 Wide Temperature Experiments

14 NASA Wide Temperature Experiments Status Tasks Completed Transceiver Design (Phase I) and Fabrication (Ph II) 3 batches were assembled Fiber Cable Assembly - 1,000 Thermal Cycles -55 C to 125 C Completed performance measurements -120 to +180 C (see figure ->) 10 Gbps TX -120 C -100 C -60 C 0 C Completing pre Qual testing by Feb 2015 Qual complete by Q C 100 C 140 C 180 C 10/14/2014

15 VCSEL Reliability at Elevated Temperature VCSEL Acceleration Factor: Case study: Want : 20 year life, T CASE =105 C -> T SUBST =110 C 5 Gb/s Required 10 Gb/s Desired VCSEL manufacturer life testing results: 14 Gb/s 50 year life, 6 70 C C, projected lifetime < 6 years NOT ACCEPTABLE De-rate operating current C, projected lifetime > 20 years MEETS REQUIREMENT But lower operating current means lower bandwidth and output power Does it function?... 15

16 VCSEL Performance at Elevated Temperature Measurement results T CASE =105 C (T SUBST =110 C ) 4 ma average current 5 Gb/s & 10 Gb/s Output power: -1.5 dbm coupled into fiber via RVCON TM 5 Gb/s 10 Gb/s (No filter) 16

17 Radiation Testing 12.5G Transceiver & NVM/DAC ASICs Prime Contractors have performed SEU/SEFI testing 12.5 G Tx and Rx ASICs No register upsets observed No latch-up observed Isolated errors in bit-stream Prime Contractor estimate - ASICs account for 1 bit error every 5 years Particles hitting photo detector (solar min cosmic rays) ~ 1 error/day * Prime Contractor plans to use for longterm LEO-GEO applications TID to 1 Mrad showed no effect on test chips OPAMP DAC/ADC TID on 12.5G Tx and Rx to 119 Krad No change observed TID on NVM to 300 Krad with no effect SEU/SEFI 12.5 Gbps Tx and Rx * Paul W. Marshall, et. al., Particle-Induced Bit Errors in High Performance Fiber Optic Data Links for Satellite Data Management, IEEE Trans. on

18 Chip Scale Packaging Approach

19 10Gpbs Chip Scale Packaged (CSP) Fiber Optic Transmitter / Receiver Creates a new class of fiber optic transceiver components that includes: Standard Pick & Place tolerances Solder reflow board assembly Cost parity with electrical connector 12.5 Gbps data rate, with non-volatile memory (self contained cal data) Advanced ASIC Functionality Autonomous Built-In-Diagnostics Fiber Connector for CSP Key technology development - wafer scale integration Lens on top-side Copper-post solder and flip-chip footprints aligned on bottom side Low-cost Optical Chip Scale Package Status: Prototypes complete Q under SBIR Phase II program 10/14/

20 Technology Transitions to 25Gbps CSP platform being used for Dept Of Energy (DOE) demo for Exascale Program Link testing at 10GBPS Ultra Communications Proprietary and Confidential 10/14/

21 CSP Connector September 28, 2014 Ultra Communications Proprietary and Confidential

22 Summary Ultra Comm is demonstrating a new packaging concept for high speed fiber optic connectivity Presently 10MBS 12.5GBPS devices operational from -40 to 100C with development of 25Gbps/Channel Demonstrated in high shock environment in free space optics board to board application Leverages developed high-precision flip chip capability and ruggedized connector technology Key to this technology Matching CTE materials Expanded Beam Optical Interface Efficient coupling for reduced laser drive currents Consistent coupling over temperature Low delta-t between laser and heatsink