Negative Bias Temperature Instability Caused by Plasma Induced Damage in 65 nm Bulk and Silicon On Thin BOX (SOTB) Processes
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1 Negative ias Temperature Instability Caused by Plasma Induced amage in nm ulk and ilicon On Thin OX (OT) Processes Ryo Kishida, zusa Oshima and Kazutoshi Kobayashi epartment of Electronics, raduate chool of cience and Technology, Kyoto Institute of Technology bstract Reliability degradation caused by plasma induced damage (PI) has become a significant concern with the miniaturization of electronic devices. In this paper, we investigate negative bias temperature instability (NTI) caused by PI measuring frequencies of ring oscillators with an antenna on a single stage. We fabricated a chip in nm bulk and ilicon On Thin OX (OT) processes. egradation rates of NTI are equivalent among antenna structures in the antenna ratio (R) of k and. NTI is accelerated by PI in R of k. NTI degradation caused by PI is equivalent in the bulk and OT. OT also prevents PI by connecting an antenna to a drain as same as the bulk. Charge Plasma Interlayer dielectric amage (PI) I. INTROUCTION In recent years, device size of semiconductor chip is becoming smaller. It has brought a lot of advantages, for example, a semiconductor device can be made highly integrated, improved operating frequency, reduced power consumption and so on. However, reliability problems have appeared in nanometer scales. Particularly, the degradation of reliability caused by Plasma Induced amage (PI) has become a significant concern with the miniaturization of the device size []. Threshold voltage (V th ) increases due to PI, which results in decreased frequency on operation. There is also negative bias temperature instability (NTI) in the reliability problems. NTI also impacts the V th by raising it overtime. The impact of NTI has been studied by many researches [], []. The temporal shift in V th of the transistor due to NTI is accelerated by PI [], []. Evaluating and preventing PI has become important. There is a method to prevent PI by connecting an antenna to a drain, but silicon-on-insulator (OI) may not prevent PI by this method because buried oxide (OX) layer disturbs the preventing. We fabricated a chip to evaluate PI in both bulk and ilicon On Thin OX (OT), which is a type of OI, processes. We measured frequencies of ring oscillators with an antenna structure on a single stage. II. ERTION CUE Y PLM INUCE ME (PI) n antenna is a metal wire that collects charge at the plasma etching process. uring the production of MOFETs, an aluminum wire collects charge because it is processed by plasma etching directly. copper wire is being used instead of the aluminum wire in less than 8 nm process because the resistance of the aluminum wire is relatively larger. lthough a copper wire is not processed by plasma etching, it collects static charge as shown in Fig.. Charge is induced in a Fig.. efects ate oxide Fig.. PI by interlayer dielectric processes. Vg τ τ τ efects egrade Carriers Vd tomistic trap-based TI model. metal wire when an interlayer dielectric around metal wires is processed. Plasma induced damage (PI) appears when the antenna is connected to a gate of MOFETs. PI generates defects into a gate oxide. V th increases when these defects trap carriers. It is explained by the atomistic trap-based TI model [] as shown in Fig.. Each defect has a time constant (τ) by trapping carriers. These defects induce TI which is one of the aging degradations. V th increases as voltage and temperature increase with time. TI degradation is in proportion to a logarithm according to the atomistic trap-based TI model because time constants are uniformly distributed on the log scale between 9 and 9 s[7] //$. IEEE C..
2 Charge Prevent PI Flow to the substrate iode Flow to the substrate Fig.. Preventing PI by the diode. Upper level wire than antenna Remain amage? Prevent PI Tunneling OX < nm Fig.. Charge remaining or tunneling in OT. Fig.. Preventing PI by connecting the antenna to the drain before connecting to the gate. There are NTI (Negative TI) and PTI (Positive TI). NTI occurs in PMO when V gs is negative. Likewise, PTI is observed in NMO especially in technologies less than nm with high-k gate dielectrics [8]. We consider only NTI because our chip is fabricated in nm. There are several methods to prevent PI. Fig. shows one of those methods using a PN junction formed with drain and substrate regions as a discharge path. Charge flows to the substrate through the drain by connecting the antenna to the drain before connecting the antenna to a gate. The other method is using an isolated PN junction as a diode as shown in Fig.. The diode is inserted near a MOFET which has the gate connected the antenna. Charge flows to the substrate through the diode. ut silicon-on-insulator (OI) does not prevent PI in the drain because it has buried oxide (OX) layers embedded on a wafer between a body and a substrate. Charge remains in the drain and flows to another gate of MOFETs. ilicon on thin OX (OT) is a type of fully depleted silicon-on-insulator (F-OI) processes [9]. It reduces variations due to impurities because it does not add any dopant to a channel of MOFETs. special feature of OT is that the OX layer is less than nm. OT can control a back bias because of the thin OX layer. It may prevent PI because charge flows to the substrate by quantum tunneling as shown in Fig. in a similar manner as flash memories []. We measured substrate leakage in a single transistor if charge flows to the substrate. Fig. shows circuits for measurement of substrate leakage. The voltage of the substrate is V. We measure currents between the drain (N+ region) and the substrate by changing the drain voltage. Fig. 7 shows the results of the measurement of substrate leakage. These results are the averages of five transistors. The substrate leakage of the OT starts to increase from more than V. lthough the leakage current is too low to cause any problem in nominal operations, charge can pass through the thin OX layer by quantum tunneling. We assume that the OT can prevent PI by connecting the antenna to the drain. III. MEUREMENT CIRCUIT We fabricated -stage ring oscillators (ROs) which have different antenna structures in a nm bulk and OT processes. Note that the layout patterns are exactly the same in both processes except for the OX layer. The -stage RO is composed of NOR gates [] as shown in Fig. 8. We prepare an antenna which has large area. The antenna is connected to the NOR gate on the last stage. The NOR gate with the antenna at the input suffers from PI. The NOR gate at the first stage may get larger PI because a feed back wire is relatively long. diode is inserted at the NOR gate at the first stage in order to prevent PI on it. The RO composes NORs without NTI as shown in Fig. 9. The NOR with NTI next to the antenna is placed as shown in Fig. in order to induce NTI only in the NOR connected to the antenna. We call the PMOFET in the NOR gate near V PMO and the opposite one PMO.TheRO stops when controlling oscillation is. The output of the NOR is. There is no NTI in PMO since is connected to as shown in Fig. 9. The reason is that V gs of the PMO is V. Conversely, PMO gets NTI if is connected to because V gs of PMO is less than V as shown in Fig.. Fig. shows connection structures of antennas. M, and M are the first-, second- and third-level metal wires, respectively. M is processed earliest in the metal wires. We C..
3 N+ PW Voltage N+ OX PW Voltage M M M (a). PI is caused because all charge flows to the gate. V V (a)ulk. (b)ot. Fig.. Circuits for measurement of substrate leakage. M M Current [arb. unit] ulk OT 8 Voltage [V] (b). PI is prevented by some amount because charge flows to the gate and drain. M M M (c). PI is prevented at most because charge flows to the drain and does not flow to the gate. Fig. 8. Fig. 7. Results of substrate leakage measurement. PI OUT NTI -stage ring oscillator for measuring frequencies of PI. iode M (d) iode. PI is prevented even if the antenna is connected to the gate because charge flows to the substrate through the diode. Fig.. Connection structures of the antenna. Fig. 9. Vgs= V V PMO PMO N NOR without NTI. V Vgs < V PMO Fig.. PMO N NOR with NTI. use as the antenna. (a) ( is connected to the ate) induces PI most because all charge in the antenna flows to the gate first. (b) (antenna is connected to the rain and ate) prevents PI to some extent because the metal wire is connected with a gate and a drain simultaneously. lthough charge flow to the gate, some charge flow to the substrate through the drain. (c) ( is connected to the rain) prevents PI most because charge flows to the substrate through the drain. (d) iode also prevents PI even if the connection is as same as because the charge flows to the substrate through the diode. However, the, and iode in OT may induce PI as same as the because the OX layer disturbs charge flow. The antenna ratio (R), which is the area of an antenna divided by the area of a gate, indicates the strength of PI. The damage due to PI is more when the R is more. The upper limit of R is in the antenna rule. We prepared ROs with three Rs that are, k (,), and k (,). R, k and k have 9, 98 and 7 ROs on a chip, respectively. IV. REULT N ICUION We measure average oscillation frequencies and NTI degradation of ROs. The measurement condition is at. V and 8 C to accelerate NTI degradation. The inverter connected to an antenna is stressed when is. We C..
4 keep at except when we measure its oscillation frequencies. We set at only for μs during measurement phase. The degradation rate is based on the initial average frequency of each structure by calculating the following equation. egradation Rate = F F (t) () F F is the initial frequency at t =s and F (t) is the frequency at time t. Fig. shows results of NTI degradations in the bulk. ots are average of degradation rate in measurements and solid lines are fitting functions of Eq. (). This equation is followed by the atomistic trap-based TI model. f(t) =a log(t)+b () If the fitting parameter a is larger, NTI degradation is larger. Table I shows the fitting parameter a of all structures. ll of the dots and lines overlap among antenna structures in the R of as shown in Fig. (a). Fitting parameter a of and are. and.7, respectively. The NTI degradation is almost equivalent in R of. Fig. (b) shows the NTI degradation in the R of k. This result is also equivalent to the result in the R of. There is no effect of NTI caused by PI in those small R. Fig. (c) shows the NTI degradation in the R of k. The relatively increases with time. The degradation rate is over. times larger than the others. Fitting parameter a of and are.7 and., respectively. NTI degradation increases if PI is larger. PI generates defects and NTI increases because the defects trap carriers. The, and iode structures are almost same degradation rate. PI is prevented by connecting an antenna to a drain even if the antenna is connected to a gate such as. The diode also prevents PI because charge flows to a substrate through the diode. If a designer of a chip obey the antenna rule, there is no effect of PI to NTI. However, NTI degradation is accelerated in the chip that of R is times larger than the upper limit of the antenna rule. Fig. shows the NTI degradation in the OT. The NTI degradation is almost equivalent in bulk and OT. OT can prevent PI by connecting an antenna to a drain as same as the bulk. We assume that charge passes through the OX layer less than nm by quantum tunneling because there is no other route of charge flow. We have shown the substrate leakage of OT by the quantum tunneling in section. Charge of the antenna can flow to the substrate even if there is the thin OX layer. OT can prevent PI by connecting the antenna to the drain. V. CONCLUION We fabricated ring oscillators with antenna structures to verify PI in nm bulk and OT processes and measured their frequencies. NTI degradation is equivalent among antenna structures in less than the R of k. In the R of k, NTI increases in the structure caused by PI most. NTI has some correlation with PI because it generates defects into TLE I FITTIN PRMETER a OF ECH TRUCTURE difference R:ulk..7. R:OT... Rk:ulk.7.. Rk:OT.7.. gate oxide and defects trap carriers. The NTI degradations are equivalent in, and iode structures. Connecting the antenna to the drain or the diode can prevent PI. oth bulk and OT prevent PI by connecting an antenna to a drain. Charge can pass through thin OX layers of less than nm by quantum tunneling. The thin OX layers of nm in OT are effective in relieving reliability issues besides the back bias controllability. CKNOWLEMENT This work was done in Ultra-Low Voltage evice Project of LEP funded and supported by METI and NEO. The TE for this work was designed by utilizing the E system supported by the VLI esign and Education Center (VEC), the University of Tokyo in collaboration with ynopsys Inc., Cadence esign ystem and Mentor raphics Inc. REFERENCE [] R. Kishida,. Oshima, M. Yabuuchi, and K. Kobayashi, Initial and long-term frequency degradation on ring oscillators from plasma induced damage in nm bulk and silicon on thin OX processes, in M,, pp.. []. rasu, M. Nourani, F. Cano, J. Carulli, and V. Reddy, symmetric aging of clock networks in power efficient designs, in IQE,, pp [] V. Huard, C. Parthasarathy, C. uerin, T. Valentin, E. Pion, M. Mammasse, N. Planes, and L. Camus, NTI degradation: From transistor to RM arrays, in IRP, 8, pp. 89. [] W. H. Choi,. atapathy, J. Keane, and C. H. Kim, test circuit based on a ring oscillator array for statistical characterization of plasmainduced damage, in CICC,, p.-. [] K.. Min, C. Y. Kang, O.. Yoo,. J. Park,. W. Kim, C. Young,. Heh,. ersuker,. H. Lee, and. Y. Yeom, Plasma induced damage of aggressively scaled gate dielectric (EOT <.nm) in metal gate/high-k dielectric CMOFETs, in IRP, 8, pp [] H. Kukner,. Khan, P. Weckx, P. Raghavan,. Hamdioui,. Kaczer, F. Catthoor, L. Van der Perre, R. Lauwereins, and. roeseneken, Comparison of reaction-diffusion and atomistic trap-based TI models for logic gates, IEEE Trans. on ev. & Mat. Rel., vol., pp. 8 9,. [7]. Kaczer,. Mahato, V. de lmeida Camargo, M. Toledano-Luque, P. Roussel, T. rasser, F. Catthoor, P. obrovolny, P. Zuber,. Wirth, and. roeseneken, tomistic approach to variability of biastemperature instability in circuit simulations, in IRP,, pp. XT.. XT... [8]. Zafar, Y. Kim, V. Narayanan, C. Cabral, V. Paruchuri,. oris, J. tathis,. Callegari, and M. Chudzik, comparative study of NTI and PTI (charge trapping) in io/hfo stacks with FUI, TiN, re gates, in VLI Tech. ymp.,, pp.. [9] R. Tsuchiya, M. Horiuchi,. Kimura, M. Yamaoka, T. Kawahara,. Maegawa, T. Ipposhi, Y. Ohji, and H. Matsuoka, ilicon on thin OX: new paradigm of the CMOFET for low-power highperformance application featuring wide-range back-bias control, in IEM,, pp.. [] T. Hori, ate dielectrics and MO ULIs: Principles, technologies, and applications, pringer series in electronics and photonics, 997. []. P. Linder, J.-J. Kim, R. Rao, K. Jenkins, and. ansal, eparating NTI and PTI effects on the degradation of ring oscillator frequency, in IIRW,, pp.. C..
5 egradation Rate [%] f (t) f (t) iode (a) R:bulk. egradation Rate [%] f (t) f (t) iode (a) R:OT. egradation Rate [%] f (t) f (t) iode egradation Rate [%] f (t) f (t) iode (b) Rk:bulk. (b) Rk:OT. egradation Rate [%] f (t) f (t) iode egradation Rate [%] f (t) f (t) iode (c) Rk:bulk. (c) Rk:OT. Fig.. Measurement results of NTI degradation in bulk. Fig.. Measurement results of NTI degradation in OT. C..
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