LECTURE 14. (Guest Lecturer: Prof. Tsu-Jae King) Last Lecture: Today:

Transcription

1 LECTURE 14 (uest Lecturer: Prof. Tsu-Jae King) Last Lecture: emiconductors, oping PN Junction iodes iode tructure and I vs. V characteristics iode Circuits Today: N-Channel MOFET tructure The MOFET as a Controlled Resistor Current aturation in a MOFET hort-channel NMOFET NMOFET Circuit Model 1

2 WHY PN IOE ARE IMPORTANT IN INTERATE CIRCUIT -- IOLATION regions of n-type ilicon n n n n n p-type ilicon No current flows if voltages are applied between n-type regions because two p-n junctions are back to back n-region n-region p-region Thus, diodes isolate n-regions in p-type substrate and vice versa. 2

3 BACK TO THE MAIN POINT We began this section with the goal of coming up with the smart switch a device we can control with a voltage that operates like a switch open circuit or short circuit. The smart switch is realized in MO transistors they control the current flow between their source and drain according to the voltage we apply to their gate. The basis for this is the field effect. MART WITCH (MO transistor inside) magnet coil iron actuator voltage applied to gate (V ) controls current between drain and source like a relay (but better) 3

4 A MART WITCH: The NMO TRANITOR NMO = N-channel Metal Oxide emiconductor W L = channel length W = channel width Metal gate (heavily doped polycrystalline i, or poly-i ) n L gate oxide insulator P-type ilicon n An insulated gate electrode is placed above the silicon Its purpose is to control the resistance between the n-type regions: Apply positive voltage to gate induce +Q on gate, Q on surface of semiconductor for sufficiently high gate voltage, surface becomes n-type 4

5 MO TRANITOR TRUCTURE CRO-ECTIONAL VIEW n gate oxide insulator Metal gate (poly-i) n inversion layer of electrons P In the absence of gate voltage, no current can flow between and. Above a certain gate-to-source voltage V T (the threshold ), electrons are induced at the surface beneath the oxide. (Think of it as a capacitor.) These can carry current between and. Thus, we can control current between and. 5

6 V + oxide i THE FIEL EFFECT V T Above some threshold voltage V T, the number of electrons per cm 2 under the gate is proportional to V V T. i.e. the charge Q inv is proportional to V V T : Q inv = Mobile charge per unit area C ox ( V VT capacitance per unit area t ox ) I + V onset of mobile charge formation by field effect C ox = ε t Q N ox ox V These charge carriers can carry current between and, so we can achieve low resistance between and by making V V T very large. 6

7 NMOFET I -V CHARACTERITIC First consider I (the current flowing into the gate) versus V V + I oxide semiconductor + I V I always zero! The gate is insulated from the semiconductor, so there is no significant gate current. V 7

8 NMOFET I -V CHARACTERITIC, FOR LOW V Next consider I (the current flowing into ) versus V, as V is varied V oxide + semiconductor + I V I Below threshold (V < V T ): no charge no conduction. V > V T Above threshold (V > V T ): Zero if V < V T V Q inv appears, so conduction between and is possible We have a smart switch! 8

9 MOFET Terminology Label the three electrical terminals on the top surface: ate: controls whether the switch is conducting or not ource: For NMO, the n region biased at the lower potential (often N) of the two n regions rain: For NMO, the n region biased at the higher potential of the two n regions The Body is often connected to source. We will assume this in EEC 40, and ignore the body connection (except to include the contacts in layouts). V V gate V NMOFET source (n-type) i body (p-type) drain (n-type) 9

10 The MOFET as a Controlled Resistor The drain current is a linear function of drain voltage, for low V The MOFET is just a (linear) controlled resistor in the low V regime with the drain-to-source resistance depending on how much voltage is applied to the gate (V -V T ). Example of I-V characteristics for low V I (ma) V VT = 2V V VT = 1V V VT = 0.5V V VT = 0 V oxide + semiconductor + Resistance is lowered as gate voltage increases (V >> V T ) I V V 10

11 The MOFET as a MART WITCH (reprise) MO transistor in box Think of to as a WITCH. The voltage between and controls the state of the switch I (ma) V VT = V V VT = V 0 A large V draws no current, but results in a very low resistance between and. (Closed switch) A small V ( < V T ) results in an open circuit between and. (Open switch) 11

12 MOFET Charge-Control Model V < V T : depletion layer (no inversion layer at surface) V > V T : V 0 V > 0 I = WQinvv = WQinvµ ne V = WQinvµ n L Average electron velocity v is proportional to lateral electric field E 12

13 What Happens at Larger rain-ource Voltages? V > V T : V = V -V T Inversion-layer is pinched-off at drain end V > V -V T As V is increased above V -V T = V sat, L increases: I V If L is small, effect of L to reduce resistor length is significant I increases noticeably with L (i.e. with V ) channel length modulation extra voltage is dropped across L Voltage applied across resistor remains V sat Current saturates! Note: Electrons are swept into the drain by the E-field when they enter the pinch-off region 13

14 Current aturation in Modern (hort-channel) MOFETs In digital circuits we typically use the shortest gate length devices for high-speed operation. In short-channel devices, the drain current saturates because the carriers can only move at a limited speed, close to 10 7 cm/sec ( velocity saturation ) Note: v is no longer proportional to E in this case! We can approximate the I-V characteristics as two straight lines: a) the linear resistance region at low V and b) the saturation region (almost horizontal) at larger V I (ma) V sat < V -V T V 14

15 hort-channel MOFET I-V We have two regions: the resistive region at smaller V and the saturation region at higher V. In the resistive region we start out like a simple resistor between source and drain (whose value depends on gate voltage) and gradually the curve bends over as we approach saturation In the saturation we have a small gradual increase of I with V I V V sat V 15

16 hort-channel MOFET I-V (cont.) For simple digital circuit calculations the MO transistor will be essentially off (V < V T ) or fully turned on (V = V, the power supply voltage). In other words, we need a single I vs V curve, the one for V = V. We need to describe the variation of I with V in the saturation region. For V > V sat we will use an essentially empirical equation for I of the form: I = I X (1+ λ V ) I V = V I λ is slope I is the intercept V V sat 16

17 UMMARY: hort-channel MOFET I-V For our digital circuit calculations we will only need to describe the variation of I with V in the saturation region, and only for the single gate voltage, V = V. We use: I = I X (1+ λ V ) width W. in which I is proportional to the channel I I V = V λ is the normalized slope I is the intercept Thus it will turn out that for our hand calculations we need only to have the following MO properties specified: 1) aturation Current I 2) The slope λ. This is the fractional increase of current for one volt increase in V. V AT V o, given a measured I vs V (at V = V ) we can extract the needed parameters very easily. 17

18 NMO Transistor Circuit ymbol Because we can control the drain-to-source conduction with the gate, the MO transistor is essentially a controlled switch. n gate oxide insulator P Circuit ymbol for the NMO evice n Physical NMO evice No current flows through the gate terminal of a MO evice But the ate voltage controls conduction between drain & source 18

19 NMO Transistor witch Model N-CH Circuit ymbol for the NMO evice THE THREHOL CONCEPT: If V < V T, switch is open (OFF state) If V = V (>> V T ), switch is closed (ON state) I (ma) imple Electrical Model V >> V T V < V T V But I vs V is too complex to be simply represented by open/short 19

20 Model Refinement: Accounting for Channel Resistance NMO transistor in ON state has limited current capability add an equivalent resistor R N that reflects this phenomenon I (ma) Closed witch Open witch V R N Improved Electrical Model The value of R N is defined by the charging delay it causes (ee Problem et 8). In other words, R N should be set to the value which gives the correct time delay when the transistor is used to charge/discharge capacitors. 20

21 NMO Transistor Model R N Note: R N is NOT the simple (low V ) source drain resistance If V = 0 we have open switch (or R N = ). If V = V we have closed switch. R N is only an effective resistor value. We need to choose the value of R N that gives the correct answer for timing calculations. R N depends on 1) ate voltage and 2) evice geometry Why? R N will be inversely proportional to the gate width W. 21

22 NMOFET ummary I I N Ch I I = I X (1+ λ V ) Circuit ymbol Typically, all parameter values are positive, e.g.: V t = 0.5 V λ = 0.05 V = 2.5 V V AT = 1 V I = 1mA/µm V =V =V If V < V T, then I = 0. V V sat V R N Circuit Model 22