Mass transfer with elastomer stamps for microled displays.

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Jocelin Williams
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1 Frontiers in Assembly Mass transfer with elastomer stamps for microled displays. Matt Meitl X-Celeprint, Inc. 1

2 The best materials for the best displays The materials identify the display. The best displays will use the best materials. Brightest, fastest, most efficient, extra-functional, multi-sensory, computational systems on a panel. Bridging the gap between wafer and panel is the way to get the best displays. Wafer Fabricated Devices Single-crystal Fine lithography (ICs, LEDs, Lasers, etc ) Advanced displays of all sizes: 2

The stamp is i. compliant in z ii. transparent iii.

3 The Elastomer Stamp Low-pressure injection molded silicone rubber on glass backing, with lithographically-defined posts for selective transfer. The stamp is i. compliant in z ii. transparent iii. simple, inexpensive, high-fidelity construction. high transfer yield. high-accuracy placement. scalable, high-throughput 3

4 Elastomer stamp capability demonstrations i. compliant (forgiving) in z ii. transparent iii. simple, inexpensive, high-fidelity construction. high transfer yield. high-accuracy placement. scalable, high-throughput Yield map, 150 mm wafer array transfer: displacement at 3σ: +/- 1.5 µm 4

5 Transferring micron-scale objects with stamp 3 µm and 5 µm GaN transferred with stamp: microleds suitable for micro assembly with elastomer stamp: 3 x 10 µm 2 8 x 15 µm 2 5

6 Passive matrix microled by printing Stamp: Transfer to display substrate with pre-patterned column metal: on glass & plastic: 1 cm PMiLED array interconnection: LED source wafer Different source for each color LED sites on target panel Au Cu microled 6

7 Active matrix microled Au Cu traces + insulator on panel substrate print ileds print µ-ics interconnect, operate microic 1 cm 7

8 Viewing angle and color Relative Luminance Radiant Flux (W/nm) Radiant Flux (W/nm) Relative to Rec. 2020: u v x y 2.0E-6 1.5E-6 1.0E-6 Spectral Radiant Flux 8.0E-6 6.0E-6 4.0E-6 Area 107.1% 90.6% Overlap 93.3% 84.1% 5.0E-7 2.0E-6 0.0E+0 0.0E Wavelength (nm) 100% 90% 80% 70% 60% 50% 0 degrees 40% 45 degrees 30% 20% 90 degrees 10% 135 degrees 0% Polar Angle (degrees) 1 cm 8

drivers demultiplex data Row drivers run progressive scan

9 Larger active matrix displays: Print row drivers and column drivers to reduce external I/O count: Column drivers demultiplex data Row drivers run progressive scan of data load and PWM 5.1 Diagonal AMILED display 320 x 160, 70 ppi: 9

10 320 x 160 AMILED, 70 ppi Row Row, column, power, and ground into each pixel: Cu redistribution layer interconnects microleds, ICs, and row/col drivers (not shown). Gnd R G B Gnd Row Col Vdd Col Vdd 10

Remaining yield impactors: Forward voltage of LEDs

11 Functional Yield of Sub-Pixels in 5.1 display Red: 99.98% (9 dark) Green: 99.95% (28 dark) Implementation of redundancy in microics, microleds, row & column lines. Remaining yield impactors: Forward voltage of LEDs Metallization defects (laser cut) Transfer (typ. < 3 sub-pixels) Blue: 99.95% (24 dark) 11

12 Display test and additive repair printable components with interconnection structures target substrate populate target + Simple passive matrix display prototype: Operate display; identify defects repair by print repaired system 12

Display prototypes by interconnect-at-print with

by spikes contacting metal at four corners of

Note repaired pixel on 2 nd row from bottom, 3 rd

13 Display prototypes by interconnect-at-print with spikes Looking through substrate, see divots produced by spikes contacting metal at four corners of interposer. Note repaired pixel on 2 nd row from bottom, 3 rd column from left: engine printed in redundant site by single-post stamp. Simple passive matrix display prototype. 13

Interconnect-at-print pixel engine The SEM

pixel engine that uses thin film metal to

14 Active matrix pixel engines with interconnection structures Interconnect-at-print pixel engine The SEM images of this slide show a fully formed pixel engine that uses thin film metal to interconnect micro LEDs, a micro IC, and conductive spikes at the bottom of the device. The images below show the devices interconnected in arrays on a display substrate. 14

An assembly-centric display fab Additive

Pixel engines (supplied on wafer) Advanced flat

15 An assembly-centric display fab Additive assembly with electrical interconnection can finish displays at the print, test & repair process modules. Pixel engines (supplied on wafer) Advanced flat panel displays Mass-transfer Micro-assembly, Test & repair. Metallized panels of all sizes. 15

16 Thanks from the X-Celeprint team 16

Intel's 65 nm Logic Technology Demonstrated on 0.57 µm 2 SRAM Cells

Intel's 65 nm Logic Technology Demonstrated on 0.57 µm 2 SRAM Cells Mark Bohr Intel Senior Fellow Director of Process Architecture & Integration Intel 1 What are We Announcing? Intel has fabricated fully-functional