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1 IIR FILTER IN ALL DIGITAL PHASE LOCKED LOOP Anupama.Patil 1, P.H Tandel 2 Pacific Academy of Higher Education and Research Udaipur,Rajasthan anubanad@gmail.com 1,phtandel@yahoo.com 2 Abstract An All Digital Phase locked loop (ADPLL) nowadays is gaining importance in communication systems.it is one of the key building blocks of modern electronic designs. This paper presentsa an ADPLL structure that utilizes a hilbert transformer as phase detector an IIR filter as its loop filter, and a NCO as DCO. The advantage of IIR filter has been highlighted in this paper as concerned to Phase Locked Loop otherwise FIR is normally chosen. This All-digital PLL (ADPLL) is found to achieve the desired performance and functionality with advantages that it does not include R and C components.it has been designed to meet the needs of Indian Navy applications of tracking the moving target. Its ease of implementation with required stability using digital CMOS process. This paper presents detailed descriptions of each block of this ADPLL. Index Terms: IIR filter Hilbert PD, Navy, ADPLL I. INTRODUCTION Order to have increased performance, speed, reliability, and and also reduction in size and cost of integrated circuits has resulted in research of the implementation of control and communication systems in the digital domain.a digital version of the phase-locked loop solves the problems associated with its analogue counterpart like sensitivity to DC drifts and component saturations, difficulties that one faces in building higher order loops.no necessity occurs for initial calibration and periodic adjustments. In real time processing on the signal samples, the DPLLs are more flexible and versatile. The earliest efforts on DPLLs concentrated on partially replacing the analogue PLL (APLL) components with digital ones. The first all DPLL was reported by Drogin [1] in Some other authors [2 4] have suggested many kinds of all digital phase-locked loops and have discussed various aspects of implementing them The first ADPLL consisting of digital components was reported in 1980 [8]. control and communication systems. However, due to the advances in integrated circuit (IC) fabrication and the growth in improving the overall system Digital PLL The important drawbacks of analog PLL are low operating speed, larger chip area, worse jitter performance and high power consumption [9][11]. These are overcome by Digital PLL where the analog phase detector is replaced by its digital counterpart. Digital PLL allows faster lock time to be achieved and generates a clock signal for high performance microprocessor [10]. All Digital PLL is a modified form of Digital PLL. It consists of only Digital blocks. All Digital PLL provides high performance, better Noise immunity and flexibility of operation, A Basic Architecture of an All-Digital PLL The architecture of an ADPLL is same as an analog PLL. The purpose of a PLL is same whether its digital or analog. A time to digital converter is introduced in place of the phase frequency detector and charge pump. The ADPLL is shown in Figure

2 The block diagram of Hilbert Phase detector used in this research paper is shown in figure 2.1. Figure 1.1 Basic architecture of ADPLL B Components of All Digital Phase Locked Loop ALL digital Phase detectors can be of the following type i. EXOR gate phase detector ii. JK Flip-flop phase detector iii. 3Digital phase frequency detector iv. NRPD Nyquist rate phase detector v. Hilbert transform phase detector Mostly used Loop Filters are of i. UP/Down counter loop filter ii. K counter loop filter iii. Digital Filters can be derived from transfer functions The following are types of digitally controlled oscillators i. Divide by N counters ii. Increment decrement type iii. Accumulator type dco The PD was the only component that was digitized long back. It s used in the Digital PLL. Similar idea can be extended to the ADPLL. The three common implementations of the digital PD are: 1. Exclusive-or (EXOR) Gate 2. Edge triggered JK Flip-Flop 3. Digital Phase-Frequency Detector FFigure 2.1 Block diagram of Hilbert transformer phase detector[12] 2.2 Digital Loop filter A digital filter is a basic building block in any digital system and also All Digital Phase Locked Loop. Benefit of replacing the bulky passive loop filter by a digital filter is its cost effectiveness and flexibility. The frequency response of the digital filter depends on the value of its coefficients [ 12]. The values of the coefficients are computed based on the desired frequency response. These values are typically floating point numbers and they are represented with a fairly high degree of precision[11]. While implementing a digital filter, the coefficients need to be represented with the smallest number of bits retaining an acceptable resolution for the numbers. The reason behind this is, representing a number with excess bits increases the size of the registers, buses, adders and multipliers. The bigger sizes of implemented circuits result into a chip with a larger size, which results in increased power consumption. Therefore, the bit precisions are important in the performance of desired digital filter. II Designed ADPLL for Navy application In our design we have utilized Hilbert transform phase detector,iir low pass filte rof second order and Numerically controlled oscillator(nco) 2.1 Hilbert Transform Phase detector: The Hilbert Transform based Phase Detector (HTPD).It uses quadrature signal processing method, estimates phase difference between input and output signals without using LP filter. A digital filter is categorized into two classes known as 1. A finite impulse response (FIR) filter An infinite impulse response (IIR) filter As the terminology suggests, these classifications refer to the filter s impulse response. By varying the weight of the coefficients and the number of filter taps. Virtually any frequency response characteristic can be realized with an FIR filter. It is seen that 24

3 FIR filters can achieve performance levels which are not possible with analog filter techniques (e.g, perfect linear phase response). Disadvantage is that high performance FIR filters require a large number of multiply-accumulates. IIR filters go on the lines of traditional analog filters and make use of feedback. The digital loop filter (LF) required as a block of Digital Phase Locked Loop is nothing but a PI- controller that operates in discrete time. The LF controls the Normalized Tuning Word (NTW) depending on the phase error ( Ф) is the phase difference between the reference phase and the output phase. A Properties of Infinite Impulse Response Filters Infinite Impulse Response Filters Uses Feedback (Recursion) Impulse Response has an Infinite Duration Potentially Unstable Non-Linear Phase More Efficient than FIR Filters No Computational Advantage when Decimating Output Usually Designed to Duplicate Analog Filter Response Usually Implemented as Cascaded Second-Order Sections (Biquads) These digital filters closely resemble the analog filters in characteristics and properties. IIR filters have a feedback and a feed forward path. Both the feedback and the feed forward path contribute to the output sample calculation. The feed forward part of the IIR's is like simple FIR filter. The feedback and feed forward paths should counterpoise each other. To generate an output sample the previous input is added to the new input. The previous output is then subtracted from this sum of inputs. Then this whole calculated sum is multiplied by the coefficients. An IIR filter of order N requires 2N+1 coefficients for its transfer function. From hardware perspective it requires 2N+1 multipliers and 2N adders. The coefficients are chosen based on the frequency specifications of the required filter. Some of the basic structures/realizations of the digital IIR filters are as discussed below: A Direct Form IIR Digital Filter In direct form IIR filters the transfer function of the filter has the same coefficients as the multipliers. The general form of the transfer function of a nth-order recursive filter (1) Example of the transfer function for the third order IIR filter is given as: H(z )= B(z) / A( z) =b 0+b 1.z 1 +b 2.z 2 +b 3.z 3 /(1+a 1 z 1 +a 2 z 2 +a 3 z 3 ) (2) Transfer function given in equation (1) can be implemented as in figure 2.2. Figure 2.2 IIR filter direct realisation B Transpose Form IIR Digital Filter Figure 2.3 IIR filter transpose realization In transpose realization delay elements are clubbed together to reduce the number of computations and hence increase the speed of operation. In the ADPLL we have designed in order to design third order ADPLL we make use of 25

4 second order IIR filter whose characteristics are shown in figure.the filter and other blocks are implemented in matlab and simulations are also presented. C Advantages of IIR filter 1. IIR is infinite and used for applications where linear characteristics are not of concern. 2. IIR is better for lower-order tapping, whereas the FIR filter is used for higher-order tapping. 3. IIR filters are recursive and used as an alternate, whereas FIR filters have become too long and cause problems in various applications. 2.3 Digitally controlled Oscillator The DCO is the heart of the ADPLL, as it converts the tuning word into the output frequency.it is also known as numerically controlled oscillator(nco). NCOs can be used to generate a wide variety of periodic output waveforms, but for the purposes of this paper a cosine output function is assumed. y(n)=cos(ϕ(n)) (3) For a fixed output frequency of f0 cycles per sample, and a fixed output phase of θ0 radian, ϕ (n) = 2πf0(n) + θ0 giving y(n)=cos(2πf0(n)+θ0) (4) If the frequency and phase are changing with n, the instantaneous frequency fi(n) provides the increment for ϕ (n) which must be accumulated over time, while the instantaneous phase offset ϕ i(n) provides an offset value to be applied only to the nth sample. ϕ i(n) = ϕ i(n-1) + 2πfi(n) ϕ (n) = ϕ 1(n) + θi (n) (5) An NCO consists of two fundamental blocks: a digital phase accumulator to perform the calculation of (5), and a phase-to-amplitude converter which converts the values of ϕ (n) to create the output sample values given by (1). The NCO structure is illustrated in Figure 2.4 Figure 2.4 Structure of Numerically controlled oscillator 3.Implementation of ADPLL using IIR Filter in Matlab IIR Filter is designed with cutoff of around 1.1 Mhz.Centre frequency of ADPLL is 250 Mhz.The matlab simulink model of filter and complete ADPLL realization figures are as shown in figures below. Figure 3.1 ADPLL realization using matlab simulink The Low pass filter used has the transfer function z (6) z z The bode plot is as in f igure 3.2 Figure 3.2 Frequency response of IIR filter utilized in the ADPLL. It has been found to track the signal after connecting with Hilbert transform Phase detector and the NCO as shown in the matlab simulink model perfectly. The phase locking response as found by the designed ADPLL is as given in figure

5 commanders battle space awareness. Modern battle has transformed into network centric with unified battlefields spread across multi theatres of operation. With the advent of microelectronics, radio frequency (RF) management and unprecedented growth in processing power and computation, radar has transformed into a complex, advanced and intelligent sensor. Indian military, aspiring to be a global player, has been integrating emerging technologies to fine tune its strategies and tactics to integrate with global Armed Forces[.3] Figure 3.4 ADPLL response phase has been locked with very long locking range. So we have achieved the locking successfully with practically infinite locking range using the seconder order IIR filter and thus realized the third order ADPLL 4. Application of the designed ADPLL. I propose to used the ADPLL with centr frequency of 250 Mhz and Low pass filter cut off of approximately Mhz for the movin target tracking in Indian navy where UHF range is usually used for the tracking. Naval communication systems vary in complexity depending upon their role, compatibility, and flexibility. Due to scarcity of space on board a ship, the communication equipment is spread across the ship s compartments; however, it is ensured that the sets are capable of operating separately as well as concurrently. Complex interconnections provide the ability of selectively switching different configurations. Radiofrequency bands commonly used for naval communication include, very high frequency and above, high frequencies, medium frequency, low frequency, very low frequency, and extremely low frequency. Very High Frequency and above (30 MHZ 300 MHZ) are only used for line of sight communication as ground range is very less. Radar is an electromagnetic (EM) sensor system used for detection,location tracking, imaging and classification of targets such as man-made objects like aircraft, ships, ground moving vehicles and natural environment including ground features and moving men. It is an important sensor for the 4. Conclusion It has been found that inspite of feed back paths IIR filters still have advantage which has been verified uding the ADPLL design for 250 Mhz.It has been seen to track faster than its counterparts with EXOR or JK flip,flop Phase detectors.also further attempts and sincere efforts are being made to employ this in Indian Navy for tracking the accelerating moving targets.the main purpose of using the third order PLL is to track both horizontally and vertically the accelerating target which is quite a normal occurrence and difficult practically in Navy. 5.References [I] DROGININ, F.M.: Steering on course to safer air travel. Electronics.November pp [2] LINDSEY. W.C., and CHIE. CM.. A survey of digitalphase-locked Ioops.Proc.IEEE, I98I,69,(41.pp.4l043I [3] ISSN Bulletin of Defense Research and Development Organisation vol 21 No 2 April 2013 [4] GARODNICK. i. GRECO. 3.. and SCHILLING. DL.: Response of an all digital phase locked loop, IEEETrans , COM-Z2,pp [5] GARDNER, F.M. Phase lock techniques (John Wiley & Sons, NewYork, 1966) [6] RABINER. LR., and GOLD. B :Theory and application of digital signal processing (Bell Telephone Labs., New York. 1975). Chap. 5 [7] C. C. Chung and C. Y. Lee, An all-digital phase locked loop for high-speed clock generation, IEEE Journal of Solid-State Circuits, vol. 38, no. 2, pp ,

6 [8] D. Jovcic, Phase locked loop system for FACTS, IEEE Trans. Power Syst., vol. 18, no. 3, pp , Aug [9] Guan-chyunHsieh, Senior member IEEE and James C. Hungellow IEEE Phase Locked Loop techniques a survey. [10] Anitha Babu, BhavyaDaya, Banu Nagasundaram, Niveditha Veluchamy University of Florida, Gainesville, FL, 32608, US All digital phase locked loop design and implementation. [11] Varsha prasad, Dr. chirag sharma, Department of E&CE, Nitte Meenakshi Institute of Technology, Yelahanka, A Review of phase locked Loop International Journal of Emerging Technology and Advanced Engineering, Volume 2, Issue 6, 2012 [12] Dr Roland E Best 'Phase-Locked Loops Design, Simulation nd Applications' Sixth Edition Mc Graw Hill Publication. 28