PHASELOCK TECHNIQUES INTERSCIENCE. Third Edition. FLOYD M. GARDNER Consulting Engineer Palo Alto, California A JOHN WILEY & SONS, INC.

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1 PHASELOCK TECHNIQUES Third Edition FLOYD M. GARDNER Consulting Engineer Palo Alto, California INTERSCIENCE A JOHN WILEY & SONS, INC., PUBLICATION

2 CONTENTS PREFACE NOTATION xvii xix 1 INTRODUCTION Salient Properties of PLLs / Bandwidth / Linearity / Organization of the Book / Annotated Bibliography / Books / Reprint Volumes / Journal Special Issues / 5 2 TRANSFER FUNCTIONS OF ANALOG PLLs Basic Transfer Functions / Transfer Functions of Individual Elements / Combined Transfer Functions / Characteristic Equation / Nomenclature, Coefficients, and Units / Second-Order PLLs / Loop Filters / Order and Type / 12 vii

3 2.2.3 Loop Parameters / Frequency Response / Other Loop Types and Orders / General Definition of Loop Gain K I Examples of Type 1 PLLs / Examples of Type 2 PLLs / Higher-Type PLLs / 28 Reference / 28 GRAPHICAL AIDS 3.1 Root-Locus Plots / Description of Root-Locus Plots / Stability Criterion / Root Loci of Type 1 PLLs / Root Loci of Type 2 PLLs / Root Loci of Type 3 PLLs / Root Loci of Higher-Order PLLs / Effect of Loop Delay on Root Locus / Bode Plots / Presentation Options / Stability / Bode Plots of Type 1 PLLs / Bode Plots of Type 2 PLLs / Bode Plots of Type 3 PLLs / Nyquist Diagrams / Nichols Charts / Stability Criterion / M-Contours / Examples of Nichols Charts / Closed-Loop Frequency-Response Curves / 52 Appendix 3A: Salient Features of Root Loci / 52 3A. 1 Branches of Root Loci / 53 3A.2 Locus on the Real Axis / 53 3A.3 Locus Intersections with Axes / 54 Appendix 3B: Formats of the Open-Loop Transfer Function G(s) I 56 3B.1 Proportional-Plus-Integral Section / 56 3B.2 High-Frequency Section / 60 3B.3 Calculations / 60

4 Appendix 3C: Closed-Loop Frequency Responses / 61 3C.1 Frequency-Response Formulas / 61 3C.2 Example Frequency-Response Graphs / 61 References / 64 DIGITAL PLLs: TRANSFER FUNCTIONS AND RELATED TOOLS 4.1 Distinctive Properties of Digital PLLs / Digital Transfer Function / Configuration of a Digital PLL / Difference Equations / z-transforms of the Loop Elements / Loop Filter / Loop Transfer Functions / Poles and Zeros / Loop Stability / Type 1 DPLLs / Type 2 DPLLs / Type 3 DPLLs / Root-Locus Plots / Root Loci of Type 1 DPLLs / Root Loci of Type 2 DPLLs / Root Loci of Type 3 DPLLs / DPLL Frequency Responses: Formulation / Bode Plots and Nichols Charts / Basis of Bode Plots / Bode Stability Criteria / Bode Plots of Example DPLLs / Nichols Chart Example / Time-Continuous Approximation for a DPLL / Frequency-Response Examples / Effect of Delay / Effect of Bandwidth / Lowpass Filters in the Loop / Infinite Impulse Response Lowpass Filter / Finite Impulse Response Lowpass Filter / 90 Appendix 4A: Stability of Digital Phaselock Loops / 91 4A.1 Type 1 DPLL / 92 4A.2 Type 2 DPLL / 93 Reference / 96

5 5 TRACKING Linear Tracking / Steady-State Phase Errors / Transient Response / Response to Sinusoidal Angle Modulation / Nonlinear Tracking: Lock Limits / Phase-Detector Nonlinearity / Steady-State Limits / Transient Limits / Modulation Limits / 118 References / EFFECTS OF ADDITIVE NOISE Linear Operation / Noise Model of a Phase Detector / Noise Transfer Function / Noise Bandwidth / Signal-to-Noise Ratio in a PLL / Optimality / Nonlinear Operation / Observed Behavior / Nonlinear Analysis of Phase Error / Probability Density and Variance / Cycle Slips / Experimental and Simulation Results / Approximate Analyses / Miscellaneous Features / 139 References / EFFECTS OF PHASE NOISE Properties of Phase Noise / Oscillator Model / Neglect of Amplitude Noise / Variance / Nonstationarity / Spectra of Phase Noise / Theoretical Spectrum W vo {f) I Normalized Spectrum (Af) I RF Spectra W w (f) and P R (f) / Phase-Noise Spectrum WAf) I 149

6 7.2.5 Frequency-Noise Spectrum W w (f) I Example Phase-Noise Spectrum / Properties of Phase-Noise Spectra / Typical Continuous Spectra / Meaning of W+(f) I Interpretation of Spectral Displays / Relationship Between W^f) and (A/) / Propagation of Phase Noise / Phase-Noise Propagation in Auxiliary Devices / Phase-Noise Propagation in PLLs / Integrated Phase Noise in PLLs / Basic Formulas / Excessive Phase Noise / Effect on Coherent Demodulation / Bandwidth Trade-off / Integration / A Paradox / Integration of Spectral Lines / Phase-Noise Specifications / Timing Jitter / 167 Appendix 7A: Analysis of Interference in a Hard Limiter / 168 Appendix 7B: Integrals of Untracked Phase Noise / 169 7B.1 Integration Procedures / 169 7B.2 Results of Integrations / 169 7B.3 Discussion / 171 Appendix 7C: Numerical Integration of PLL Phase Noise / 171 7C.1 Definition and Application of Integrated Phase Noise / 172 7C.2 Data Formats / 172 7C.3 Data Adjustments / 173 7C.4 Data Filtering / 174 7C.5 Numerical Integration / 174 Appendix 7D: Integration of Discrete Lines in the Phase-Noise Spectrum / 175 Appendix 7E: Timing Jitter / 177 7E.1 Jitter Definitions / 177 7E.2 Jitter in PLLs / 179 References / 180

7 xii CONTENTS 8 ACQUISITION OF PHASELOCK Characterization / Phase Acquisition / First-Order Loop / Hang-up / Lock-in / Aided Phase Acquisition / Frequency Acquisition / Frequency Pull-in / Frequency Sweeping / Discriminator-Aided Frequency Acquisition / Implementation of Frequency Discriminators / Diverse Matters / Lock Indicators / Wide-Bandwidth Methods / Memory / 206 References / OSCILLATORS Desired Properties / Classes of Oscillators / Phase Noise in Oscillators: Simplified Approach / Leeson's Model / Guides for Oscillator Design / Example Phase-Noise Spectra / Shortcomings of Leeson's Model / Classifications of Oscillators / Phase Noise in Oscillators: Advanced Analysis / Impulse Sensitivity Function / Nonlinear Analyses for Phase Noise / Other Disturbances / Types of Oscillator Tuning / Continuous-Tuning Oscillators / Discrete-Tuning Oscillators / Tuning of Analog VCOs / Tuning Curve / Tuning Methods / Speed of Tuning / 231 References / 232

8 CONTENTS XIII 10 PHASE DETECTORS Multiplier Phase Detectors / Switching Phase Detectors: Principles / Switching Phase Detectors: Examples / Hybrid-Transformer PD / Nonsinusoidal s-curves / Sequential Phase Detectors / Phase/Frequency Detector / PFD Configuration / Delay in PFD / PFD State Diagram / PFD s-curve / Frequency Detection in a PFD / Effects of Delay in a PFD / Extra or Missed Transitions / Lock Indicator for a PFD / Behavior of Phase Detectors in Noise / Bandpass Limiters / Phase-Detector Noise Threshold / s-curve Shape in Noise / Jitter Dependence on s-curve Shape / Two-Phase (Complex) Phase Detectors / 260 Appendix 10A: Phase Modulation Due to Phase-Detector Ripple / A.1 Ripple Model / A.2 Basis of Analysis / A.3 Ripple Examples / A.4 Ripple Filters / 264 References / LOOP FILTERS Active vs. Passive Loop Filters / DC Offset / Transient Overload / Overload from PD Ripple / Overload During Acquisition / CHARGE-PUMP PHASELOCK LOOPS Model of a Charge Pump / Loop Filter / 273

9 xiv CONTENTS 12.3 Static Phase Error / Stability Issues / Nonlinearities / Ripple Suppression / Late Developments / 280 References / DIGITAL (SAMPLED) PHASELOCK LOOPS QuasiLinear Sampled PLLs / Digital-Controlled Oscillators / Hybrid Phase Detectors / Complex-Signal Digital Phase Detector / DPLLs in Digital Data Receivers / Loop Stability / Quantization / Lessons from Related Studies / Quantization Considerations in Hybrid PLLs / Effects of Frequency (NCO) Quantization / Quantization in a Phase Detector and an Integrator / Irremediably Nonlinear PLLs / Configuration of a Nonlinear PLL / Operation of the PLL Elements / PLL State Diagrams / Operation of the Nonlinear PLL / Type 2 Nonlinear PLL / Effects of Additive Noise / Application to Bit Synchronizers / 326 Appendix 13A: Transfer Function of a Multirate DPLL / A.1 Nomenclature / A.2 Phase-Detector Operation / A.3 Accumulate & Dump and the Loop Filter / A.4 Hold Process / A.5 NCO, Phase Rotator, and M : 1 Down-Sampling / A.6 Transfer Functions / A.7 Transfer Function of a Hold Filter / 332 References / 333

10 CONTENTS XV 14 ANOMALOUS LOCKING Sidelocks / Periodic Modulations / Cyclostationary Modulations / Alias Locks / Harmonie Locks / Spurious Locks / False Locks / IF Filter Analysis / Origin of False Locks / False-Lock Properties / Remedies for False Lock / Lock Failures in Chains of PLLs / 353 References / PLL FREQUENCY SYNTHESIZERS Synthesizer Configurations / Basic Configuration / Alternative Configurations / Frequency Dividers / Analog Frequency Dividers / Digital Counters as Frequency Dividers / Fractional-Af Counters / Dual-Modulus Counters / Fractional-A^ PLLs with Analog Compensation / Fractional-N PLLs with Delta-Sigma Modulators / Noise Propagation in a PLL / Transfer Functions for Oscillator Noise / Bandwidth Trade-off / Other Noise Sources / 373 References / PHASELOCK MODULATORS AND DEMODULATORS Phaselock Modulators / Modulator Fundamentals / PLL Measurements via Modulations / Delta-Sigma PLL Modulators / 382

11 xvi CONTENTS 16.2 Phaselock Demodulators / PLLs for AM Demodulation / Phase Demodulation / Frequency Demodulation / FM Noise / FM Threshold / Threshold Characterization / FM Clicks / Clicks in PLD / Formal Optimization / Modified PLD / FM PLD Threshold: Summary / 405 References / MISCELLANEOUS APPLICATIONS OF PHASELOCK LOOPS Synchronization of Data Signals / Network Clocks / Various Locked Oscillators / Oscillator Stabilization / Frequency-Multiplier PLLs / Frequency-Translation PLLs / PLLs in Television Receivers / PLLs in Digital Systems / Compensation of Timing Skew / Jitter Attenuators / PLLs for Motor Speed Control / Basic Operation / Electromechanical Considerations / Alternative Configurations / 417 References / 418 INDEX 421

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