EVALUATION KIT AVAILABLE CDMA + GPS LNA/Mixers MAX2386. Maxim Integrated Products 1
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1 ; Rev 0; 10/01 EVALUATION KIT AVAILABLE CDMA + LNA/Mixers General Description The LNA/mixer ICs are designed for CDMA/cdma2000 1x and applications. The are optimized for the Japanese 832MHz to 870MHz band, and can also be configured for the Korean/Chinese/U.S. 869MHz to 894MHz band. To optimize linearity and current consumption, the CDMA LNA comprises four gain states. The high-gain LNA has a reduced supply-current mode for use when no transmit (Tx) signal is present, and a high linearity mode, which minimizes Tx cross-modulation in the presence of a large interfering signal during talk mode. Two low-gain modes, provide higher cascade IIP3 at lower current. The lowest gain setting provides an LNA bypass and an ultra-low chip current of 4mA. This significantly extends the phone s standby time and lowers the overall current consumption of the phone. Gain-switching hysteresis can be adjusted by selection of an off-chip resistor, which sets the current and linearity in each mode to customize switchover points. In mode, the MAX2386 LNA offers high gain and the MAX2385 features lower current consumption with lower gain. The CDMA paths of the are identical. The include an on-chip LO divider, which enables the use of one VCO module for both cellular and modes. An on-chip LO buffer to drive the Tx upconverter further reduces system complexity. Features Low Average Current Consumption: 4.5mA (CDMA) +2.7V to +3.6V Operation 2.0dB Cascade Noise Figure 2.5 db Cascade CDMA Noise Figure Adjustable IIP3 LO Output Buffer to Drive Tx Upconverter 1µA Shutdown Current Tiny 2.1mm 2.7mm Chip-Scale Package (UCSP ) Single VCO for and CDMA Operation LO Divider Improves Phase Noise/Desensitization Ordering Information PART TEMP. RANGE BUMP-PACKAGE MAX2385EBP-T -40 C to +85 C 5 4 UCSP* MAX2386EBP-T -40 C to +85 C 5 4 UCSP* *Requires a special solder temperature profile described in the Absolute Maximum Ratings section. Applications CDMA/cdma2000 1x Cellular Phones with Block Diagram PATH MAX2385 MAX2386 Pin Configuration/Functional Diagram/Typical Operating Circuit appears at end of data sheet. CDMA PATH 2 LO BUFFER OUTPUT UCSP is a trademark of Maxim Products, Inc. VCO LO BUFFER ENABLE Maxim Integrated Products 1 For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at , or visit Maxim s website at
2 ABSOLUTE MAXIMUM RATINGS V CC to GND V to +4.3V Digital Input Voltage to GND V to V CC + 0.3V RF Input Power...+12dBm Digital Input Current...±10mA Continuous Power Dissipation 5 4 UCSP (T A = +70 C, derate 1.2mW/ C above T A = +70 C)...995mW Thermal Resistance from Junction to Ambient C/W Operating Temperature Range C to +85 C Junction Temperature C Storage Temperature Range C to +150 C Bump Temperature (Soldering) (Note 1) Infrared (15s) C Vapor Phase (60s) C Note 1: This device is constructed using a unique set of packaging techniques that impose a limit on the thermal profile the device can be exposed to during board level solder attach and rework. This limit permits only the use of the solder profiles recommended in the industry standard specification, JEDEC 020A, paragraph 7.6, Table 3 for IR/VPR and convection reflow. Preheating is required. Hand or wave soldering is not recommended. Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. DC ELECTRICAL CHARACTERISTICS (V CC = +2.7 to +3.6V, R BIAS = 47kΩ, V IH = +2.0V, V IL = +0.6V, T A = -40 C to +85 C. Typical values are at +2.75V and T A = +25 C, unless otherwise noted.) (Note 2) (Table 1) PARAMETER SYMBOL CONDITIONS MIN TYP MAX U N I T S CDMA Active Supply Current I CC ULG mode LG mode R BIAS = 47kΩ R BIAS = 36kΩ (Note 3) MG mode HGLL HGHL MAX Active Supply Current I CC MAX Shutdown Supply Current I CC SHDN mode µa Digital Input Logic High V IH 2.0 V Digital Input Logic Low V IL 0.6 V Digital Input Current µa Additional Current for LO Buffer BUFFEN = high ma ma ma 2
3 AC ELECTRICAL CHARACTERISTICS ( EV kit, V CC = +2.75V, T A = -40 C to +85 C, f RF = 832MHz to 870MHz (CDMA), f RF = MHz (), f IF = 110MHz, f LO = (f RF - f IF ) 2 (CDMA), f LO = MHz (), LO input power = -12dBm, 50Ω RF system impedance, IF matched to 50Ω load, R BIAS = 47kΩ, V IH = +2.0V, V IL = +0.6V. Typical values are at f RF = 851MHz, T A = +25 C (CDMA). (Note 3) (Table 1) PARAMETER CONDITIONS MIN TYP MAX UNITS FREQUENCY RANGE IF Frequency Range (Note 4) MHz RF Frequency Range LO Frequency Range LNA PERFORMANCE Gain Noise Figure Noise Figure Change Over Temperature (T A = +25 C to +85 C) CDMA mode (Note 5) mode CDMA mode mode HGHL mode T A = +25 C, f RF = 851MHz (Note 6) 13.1 HGLL mode T A = +25 C, f RF = 851MHz MG mode T A = +25 C, f RF = 851MHz (Note 6) -1.4 LG/ULG T A = +25 C, f RF = 851MHz mode (Note 6) -7.1 mode T A = +25 C, f RF = 1575MHz (MAX2385) (Note 6) 14.5 mode T A = +25 C, f RF = 1575MHz (MAX2386) (Note 6) 16.8 T A = +25 C HGHL mode HGLL mode MG mode LG/ULG mode mode HGHL mode 0.5 HGLL mode 0.5 MG mode 0.9 LG/ULG mode 1.0 mode 0.5 MHz MHz db db db 3
4 AC ELECTRICAL CHARACTERISTICS (continued) ( EV kit, V CC = +2.75V, T A = -40 C to +85 C, f RF = 832MHz to 870MHz (CDMA), f RF = MHz (), f IF = 110MHz, f LO = (f RF - f IF ) 2 (CDMA), f LO = MHz (), LO input power = -12dBm, 50Ω RF system impedance, IF matched to 50Ω load, R BIAS = 47kΩ, V IH = +2.0V, V IL = +0.6V. Typical values are at f RF = 851MHz, T A = +25 C (CDMA). (Note 3) (Table 1) IIP3 (Note 7) PARAMETER CONDITIONS MIN TYP MAX UNITS HGHL mode, P IN = -25dBm/tone HGLL mode, P IN = -30dBm/tone MG mode, P IN = -20dBm/tone LG/ULG mode, P IN = -20dBm/tone, R BIAS = 47kΩ LG/ULG mode, P IN = -20dBm/tone, R BIAS = 36kΩ mode, MAX P IN = -35dBm/tone MAX Reverse Isolation (S12) HGHL mode 20 db MIXER PERFORMANCE Gain Noise Figure IIP3 (Note 7) HGHL/HGLL mode T A = +25 C, f RF = 851MHz (Note 6) 8.0 MG mode T A = +25 C, f RF = 851MHz (Note 6) 7.2 LG mode T A = +25 C, f RF = 851MHz (Note 6) 7.0 ULG mode T A = +25 C, f RF = 851MHz (Note 6) -1.4 mode T A = +25 C, f RF = 1575MHz (MAX2385) (Note 6) 9.9 mode T A = +25 C, f RF = 1575MHz (MAX2386) (Note 6) 11.6 HGHL mode HGLL mode T A = +25 C MG mode LG/ULG mode mode HGHL/HGLL mode CDMA MG mode P IN = -25dBm/tone LG mode ULG mode MAX P IN = -35dBm/tone MAX dbm db db dbm 4
5 AC ELECTRICAL CHARACTERISTICS (continued) ( EV kit, V CC = +2.75V, T A = -40 C to +85 C, f RF = 832MHz to 870MHz (CDMA), f RF = MHz (), f IF = 110MHz, f LO = (f RF - f IF ) 2 (CDMA), f LO = MHz (), LO input power = -12dBm, 50Ω RF system impedance, IF matched to 50Ω load, R BIAS = 47kΩ, V IH = +2.0V, V IL = +0.6V. Typical values are at f RF = 851MHz, T A = +25 C (CDMA). (Note 3) (Table 1) LO SECTION PARAMETER CONDITIONS MIN TYP MAX UNITS LO Input Power dbm LO Leakage at LNA Input -40 dbm LO Output Power BUFFEN = high, 100Ω load dbm LO Output Noise Power 45MHz to 55MHz offset dbc/hz LO Buffer Reverse Isolation 35 db Note 2: DC characteristics are production tested at T A = +85 C. DC specifications over temperature are guaranteed by design and characterization. Note 3: Specifications are guaranteed by design and characterization. Note 4: Operation over this frequency range requires each port to be rematched for the desired operating range. Performance at various frequencies is indicated by the S-parameter data in the Typical Operating Characteristics. Note 5: Operation outside this range is possible, although not guaranteed by design and characterization. Note 6: Guaranteed by production test at f MAX (870MHz) and T MAX (+85 C). For mode, f MAX = MHz. Note 7: Specifications are based on R BIAS = 47kΩ. I CC for all LNAs and mixers is inversely proportional to R BIAS. IIP3 can be traded for I CC by selecting other values of R BIAS. Two-tone IIP3 is measured with each tone input at the specified level separated by 900kHz. 5
6 Typical Operating Characteristics ( EV kit, V CC = +2.75V, f RF = 851MHz (CDMA), f RF = 1575MHz (), f LO = 1482MHz (CDMA), f LO = 1465MHz (), P LO = -10dBm, P MIXER = -25dBm (CDMA), P MIXER = -35dBm (), P LNA(HGHL) = -25dBm, P LNA(HGLL) = -30dBm, P LNA(MG) = P LNA(LG) = -20dBm, P LNA() = -35dBm, R BIAS = 47kΩ, and T A = +25 C, unless otherwise noted.) NOISE FIGURE (db) LNA NOISE FIGURE (HGHL) vs. FREQUENCY T A = +85 C T A = +25 C T A = -40 C FREQUENCY (MHz) MAX2385/6 toc01 NOISE FIGURE (db) LNA NOISE FIGURE (HGLL) vs. FREQUENCY T A = +85 C T A = +25 C T A = -40 C FREQUENCY (MHz) MAX2385/6 toc02 NOISE FIGURE (db) LNA NOISE FIGURE (MG) vs. FREQUENCY T A = +85 C T A = +25 C T A = -40 C FREQUENCY (MHz) MAX2385/6 toc03 NOISE FIGURE (db) LNA NOISE FIGURE (LG/ULG) vs. FREQUENCY T A = +85 C T A = +25 C T A = -40 C MAX2385/6 toc04 NOISE FIGURE (db) LNA NOISE FIGURE () vs. TEMPERATURE MAX2385 MAX2386 MAX2385/6 toc05 GAIN (db) LNA GAIN vs. R BIAS HGHL HGLL MG LG/ULG MAX2385/6 toc FREQUENCY (MHz) TEMPERATURE ( C) R BIAS (kω) IIP3 (dbm) MG LG/ULG HGHL HGLL LNA IIP3 vs. R BIAS MAX2385/6 toc07 GAIN (db) MIXER GAIN vs. R BIAS HGHL/HGLL LG ULG MG MAX2385/6 toc08 IIP3 (dbm) MIXER IIP3 vs. R BIAS HGHL/HGLL MG ULG LG MAX2385/6 toc R BIAS (kω) R BIAS (kω) R BIAS (kω) 6
7 Typical Operating Characteristics (continued) ( EV kit, V CC = +2.75V, f RF = 851MHz (CDMA), f RF = 1575MHz (), f LO = 1482MHz (CDMA), f LO = 1465MHz (), P LO = -10dBm, P MIXER = -25dBm (CDMA), P MIXER = -35dBm (), P LNA(HGHL) = -25dBm, P LNA(HGLL) = -30dBm, P LNA(MG) = P LNA(LG) = -20dBm, P LNA() = -35dBm, R BIAS = 47kΩ, and T A = +25 C, unless otherwise noted.) GAIN (db) MIXER GAIN vs. LO POWER HGHL/HGLL LG MAX2386 MG P LO (dbm) MAX2385 ULG MAX2385/6 toc10 IIP3 (dbm) HGHL/HGLL ULG MIXER IIP3 vs. LO POWER LG MG MAX P LO (dbm) MAX2386 MAX2385/6 toc11 NOISE FIGURE (db) HGHL/HGLL/MG MIXER NOISE FIGURE vs. LO POWER MAX2386 MAX P LO (dbm) LG ULG MAX2385/6 toc12 GAIN (db) MAX2385 LNA GAIN vs. P IN LG/ULG HGLL P IN (dbm) MAX2386 HGHL MG MAX2385/6 toc13 GAIN (db) MIXER GAIN vs. P IN MAX2386 MAX2385 ULG LG MG P IN (dbm) HGHL/HGLL MAX2385/6 toc14 7
8 Pin Configuration/Functional Diagram/Typical Operating Circuit A2, A4 GIF+, GIF- CDMA IF V CC A1 GIF+ A2 GMXIN A3 A4 GIF- A5 GLNAOUT CMXIN V CC CLNAOUT G1 MODE CIF- GND B1 B2 B3 B4 B5 CDMA IF GLNAIN MAX2385 RBIAS MAX2386 LO_OUT C1 C2 C3 C4 C5 G2 CIF+ /2 GND CLNAIN V CC LO OUTPUT LO_IN GND D1 D2 D3 D4 D5 CDMA V CC BUFFEN R BIAS VCO Pin Description PIN NAME FUNCTION A1 B1 GLNAOUT CLNAOUT LNA Output Port. This port requires an external pullup inductor and series blocking capacitor, which are part of the matching network. CDMA LNA Output Port. This port requires an external pullup inductor and series blocking capacitor, which are part of the matching network. C1 GLNAIN RF Input Port. Requires a blocking capacitor. D1 GND Ground Differential Output Port. Requires pullup inductors and blocking capacitors, which are used as part of the matching network. B2 G1 Logic Input (Table 1) C2 RBIAS Bias Setting Pin. The DC voltage at this pin is a bandgap voltage (+1.2V). For nominal bias, connect 47kΩ resistor to ground. The value of this resistor can be adjusted to alter the linearity of the LNAs and mixers in all modes. See Figures 2 and 3 for resistor switching application circuits. D2 CLNAIN Cellular RF Input Port. Requires a blocking capacitor. A3 GMIXIN Mixer Input Port. Requires a series blocking capacitor. B3 MODE Logic Input (Table 1) 8
9 PIN NAME FUNCTION C3 G2 Logic Input (Table 1) D3 V CC +2.7 to +3.6V Supply Pin. Bypass with 100pF capacitor as close to the pin as possible. B4, C4 CIF-, CIF+ D4 GND Ground CDMA Differential Output Port. Requires pullup inductors and blocking capacitors, which are used as part of the matching network. A5 CMIXIN CDMA Mixer Input Port. Requires a series blocking capacitor. B5 GND Ground C5 LO_OUT LO Buffer Output Port. Internally matched to 100Ω. Requires a series blocking capacitor. D5 LO_IN Pin Description (continued) LO Input Port. Also LO buffer enable (BUFFEN). Apply logic signal through 10kΩ resistor. Set LO_IN high to enable the LO_OUT port. Set low to disable the LO_OUT port. AC-couple the LO input and DCcouple the buffer enable signal (see Typical Operating Circuit). Detailed Description The are ideal for CDMA + applications. These devices contain two LNA/mixer pairs: one pair for CDMA operation and one pair for operation. The feature seven modes of operation, including shutdown. Table 1 depicts each mode along with the corresponding LNA and mixer configuration. These devices are ideal for Japanese cdma2000 1x applications. The RF frequency range is from 832MHz to 870MHz, and the IF frequency range is from 70MHz to 200MHz. In mode, the RF frequency is Table 1. Mode Selection Truth Table MHz. These devices can also be used for the Korean/Chinese/U.S. 869MHz to 894MHz band. CDMA LNA The have four modes of CDMA LNA operation: high gain, high linearity (HGHL); high gain, low linearity (HGLL); midgain (MG); and low gain (LG). The logic inputs MODE, G1, and G2 allow selection between these modes (Table 1). Use HGHL mode when extra-high linearity is required for cross-modulation suppression. When cross-modulation is not a concern or the transmitter is off, use HGLL mode. In MG mode, the device is designed to meet CDMA linearity with interferers at -32dBm/tone. When MODES High Gain, High Linearity (HGHL) High Gain, Low Linearity (HGLL) CONTROL PINS FUNCTION LNA MIXER G1 G2 MODE HGHL HGLL MG LGHL HG MG LG UL Midgain (MG) Low Gain (LG) Ultra-Low Gain (ULG) Shutdown (SHDN) 0 X 0 9
10 receiving large signals, use LG mode to significantly reduce current consumption (see the R BIAS Switching section). CDMA Downconverter The CDMA mixer has four modes of operation for optimal performance and current conservation. The logic inputs MODE, G1, and G2 allow selection between the different modes (Table 1). The mixer output appears at the differential CIF+ and CIF- pins. Each of these open-collector outputs requires an external pullup inductor to V CC for DC biasing. This port requires a matching network for coupling to an external IF filter. To further reduce board complexity, the CDMA and mixer outputs can be combined, eliminating one of the IF filters (Figure 1). LO Output Buffer The LO_IN pin controls the LO output buffer. This pin turns the open-collector LO output buffer on and off to conserve current consumption as needed (see Pin Description and Typical Operating Circuits). RF Inputs The mixer inputs CMIX_IN and GMIX_IN are typically connected to the LNA output through an off-chip image-reject bandpass filter. The LNA inputs and outputs require external matching networks to 50Ω. Applications Information R BIAS Switching Figures 2 and 3 show more sophisticated methods of varying the bias currents in different modes of operation. By adding a shunt resistor to R BIAS, the user can increase or decrease the total bias resistance (and therefore the bias current) in different modes, keeping in mind that the voltage at the R BIAS pin is +1.2V. Figure 2 uses a shunt resistor to decrease the total bias resistance (when R SHUNT is tied low). This method uses an additional DSP I/O control line. To avoid adding an extra I/O line to the system, the user can use the existing logic lines (MODE, G1, and G2). Figure 3 utilizes the G1 control pin, a transistor, and an additional resistor to change the bias current in certain modes. Both figures are simple ways to accommodate a wide range of power schemes. CDMA V CC GLNAOUT GIF+ GMXIN GIF- CMXIN A1 A2 A3 A4 A5 CDMA IF CLNAOUT B1 G1 B2 MODE B3 CIF- B4 GND B5 V CC CDMA MAX2385 GLNAIN RBIAS MAX2386 LO_OUT C1 C2 C3 C4 C5 GND CLNAIN V CC LO_IN GND D1 D2 D3 D4 D5 V CC R BIAS G2 CIF+ /2 LO OUTPUT BUFFEN VCO Figure 1. Typical Operating Circuit with CDMA and Mixers Combined 10
11 MAX2385 MAX2386 MODE G2 G1 RBIAS R SHUNT R BIAS DSP Figure 2. Variable Bias Current Application Circuit with Shunt Resistor (Using 4 DSP I/O Ports) Layout For the, keep RF signal lines as short as possible to minimize losses and radiation. Always use controlled-impedance lines on all high-frequency inputs and outputs and use low-inductance connections to ground on all GND pins. At the mixer outputs, keep the differential lines together and of the same length to ensure signal balance. For the best gain and noise performance, use high-q (greater than 40) components for the LNA input matching circuit. For the power supplies, a star topology works well to isolate different sections of the device. Each V CC node has its own path to a central V CC ; place decoupling capacitors that provide low impedance at the RF frequency of interest close to all V CC connections. The central V CC should have a large decoupling capacitor as well. (Use the EV kit as an example.) MAX2385 MAX2386 MODE G2 G1 RBIAS R BIAS R SHUNT Figure 3. Variable Bias Current Application Circuit with Shunt Resistor and Transistor (Using 3 DSP I/O Ports) UCSP Reliability The UCSP represents a unique package that greatly reduces board space compared to other packages. UCSP reliability is integrally linked to the user s assembly methods, circuit board material, and usage environment. Operating Life and Moisture Resistance remain uncompromised as they are primarily determined by the wafer-fabrication process. Mechanical stress performance is a greater consideration for a UCSP. UCSP solder joint contact integrity must be considered since the package is attached through direct solder contact to the user s PC board. Testing done to characterize the UCSP reliability performance shows that it is capable of performing reliably through environmental stresses. Results of environmental stress tests and additional usage data and recommendations are detailed in the UCSP application note, which can be found on Maxim s website, Chip Information TRANSISTOR COUNT: 882 DSP 11
12 Table 2. CDMA LNA Input/Output S-Parameters (V CC = +2.75V, HGHL mode, P IN = -25dBm, T A = +25 C.) FREQUENCY LNA (S11) LNA (S21) LNA (S12) LNA (S22) (MHz) MAGNITUDE PHASE MAGNITUDE PHASE MAGNITUDE PHASE MAGNITUDE PHASE
13 Table 3. MAX2385 LNA Input/Output S-Parameters (V CC = +2.75V, P IN = -35dBm, T A = +25 C.) FREQUENCY LNA (S11) LNA (S21) LNA (S12) LNA (S22) (MHz) MAGNITUDE PHASE MAGNITUDE PHASE MAGNITUDE PHASE MAGNITUDE PHASE
14 Table 4. MAX2386 LNA Input/Output S-Parameters (V CC = +2.75V, P IN = -35dBm, T A = +25 C.) FREQUENCY LNA (S11) LNA (S21) LNA (S12) LNA (S22) (MHz) MAGNITUDE PHASE MAGNITUDE PHASE MAGNITUDE PHASE MAGNITUDE PHASE
15 Table 5. CDMA Mixer Input S11 (V CC = +2.75V, HGHL mode, P IN = -25dBm, T A = +25 C.) FREQUENCY MIXER (S11) (MHz) MAGNITUDE PHASE Table 6. CDMA Mixer Output Differential S11 (V CC = +2.75V, HGHL mode, P IN = -15dBm, T A = +25 C.) FREQUENCY MIXER (S11) (MHz) MAGNITUDE PHASE
16 Table 7. Mixer Input S11 (V CC = +2.75V, P IN = -35dBm, T A = +25 C.) FREQUENCY MIXER (S11) (MHz) MAGNITUDE PHASE Table 8. Mixer Output Differential S11 (V CC = +2.75V, HGHL mode, P IN = -25dBm, T A = +25 C.) FREQUENCY MIXER (S11) (MHz) MAGNITUDE PHASE
17 Table 9. CDMA LNA Typical Noise Parameters (V CC = +2.75V, HGHL mode, T A = +25 C, data from design simulation.) FREQUENCY (MHz) NF MIN (db) Γ OPT Γ OPT R N (Ω) Table 10. LNA Typical Noise Parameters (V CC = +2.75V, f RF = MHz, HGHL mode, T A = +25 C, data from design simulation.) PART NF MIN (db) Γ OPT Γ OPT R N (Ω) MAX MAX
18 Package Information 20L UCSP.EPS Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. 18 Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.
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1; Rev 0; 12/0 EVALUATION KIT AVAILABLE 100MHz to 00MHz High-Linearity, General Description The high-linearity passive upconverter or downconverter mixer is designed to provide approximately +31dBm of
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19-1422; Rev 2; 1/1 Low-Dropout, 3mA General Description The MAX886 low-noise, low-dropout linear regulator operates from a 2.5 to 6.5 input and is guaranteed to deliver 3mA. Typical output noise for this
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9-84; Rev ; 4/7 EVALUATION KIT AVAILABLE MHz to 5MHz SiGe General Description The are low-cost, ultra-low-noise amplifiers designed for applications in the cellular, PCS, GPS, and.4ghz ISM frequency bands.
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19-295; Rev ; 8/1 High-Current VCOM Drive Buffer General Description The is a high-current operational transconductance amplifier. The is ideal for driving the backplane of an active matrix, dot inversion
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9-24; Rev 2; 2/02 EVALUATION KIT AVAILABLE 0MHz to 050MHz Integrated General Description The combines a low-noise oscillator with two output buffers in a low-cost, plastic surface-mount, ultra-small µmax
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19-2425; Rev 0; 4/02 General Description The interfaces between the control area network (CAN) protocol controller and the physical wires of the bus lines in a CAN. It is primarily intended for industrial
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19-3530; Rev 0; 1/05 Low-Jitter, 8kHz Reference General Description The low-cost, high-performance clock synthesizer with an 8kHz input reference clock provides six buffered LVTTL clock outputs at 35.328MHz.
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EVALUATION KIT AVAILABLE General Description The low-cost, high third-order intercept point (IP3) low-noise amplifier (LNA) is designed for applications in 2.4GHz WLAN, ISM, and Bluetooth radio systems.
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9-234; Rev ; 2/7 Four-Channel Thermistor Temperature-to-Pulse- General Description The four-channel thermistor temperature-topulse-width converter measures the temperatures of up to four thermistors and
More informationVI1 VI2 VQ1 VQ2 II1 II2 IQ1 IQ2. Maxim Integrated Products 1
1-22; Rev ; 1/3 High-Gain Vector Multipliers General Description The MAX4/MAX4/MAX4 low-cost, fully integrated vector multipliers alter the magnitude and phase of an RF signal. Each device is optimized
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19-2575; Rev 0; 10/02 One-to-Four LVCMOS-to-LVPECL General Description The low-skew, low-jitter, clock and data driver distributes one of two single-ended LVCMOS inputs to four differential LVPECL outputs.
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99 Rev ; /99 EVALUATION KIT AVAILABLE 65V/µs, Wideband, High-Output-Current, Single- General Description The // single-ended-todifferential line drivers are designed for high-speed communications. Using
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19-272; Rev ; 1/2 5mA Low-Dropout Linear Regulator in UCSP General Description The low-dropout linear regulator operates from a 2.5V to 5.5V supply and delivers a guaranteed 5mA load current with low 12mV
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9-2626; Rev ; /2 2, 3MHz Bandwidth, Dual SPDT Analog General Description The low-voltage, low on-resistance (R ON ), dual single-pole/double throw (SPDT) analog switch operates from a single +.8V to +5.5V
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19-579; Rev ; 12/1 EVALUATION KIT AVAILABLE Rail-to-Rail, 2kHz Op Amp General Description The op amp features a maximized ratio of gain bandwidth (GBW) to supply current and is ideal for battery-powered
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9-2632; Rev ; /2 4.5Ω Dual SPST Analog Switches in UCSP General Description The MAX472/MAX4722/ low-voltage, low onresistance (R ON ), dual single-pole/single throw (SPST) analog switches operate from
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19-3495; Rev ; 11/4 High-oltage, Low-Power Linear Regulators for General Description The are micropower, 8-pin TDFN linear regulators that supply always-on, keep-alive power to CMOS RAM, real-time clocks
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19-2141; Rev ; 8/1 75Ω/Ω/Ω Switchable Termination General Description The MAX346/MAX347/MAX348 are general-purpose line-terminating networks designed to change the termination value of a line, depending
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19-2457; Rev 2; 11/03 Precision, Low-Power, 6-Pin SOT23 General Description The are precise, low-power analog temperature sensors combined with a precision voltage reference. They are ideal for applications
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19-266; Rev 1; 1/3 Low-Voltage, 1.8kHz PWM Output Temperature General Description The are high-accuracy, low-power temperature sensors with a single-wire output. The convert the ambient temperature into
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19-2804; Rev 2; 12/05 5-Pin Watchdog Timer Circuit General Description The is a low-power watchdog circuit in a tiny 5- pin SC70 package. This device improves system reliability by monitoring the system
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19-3745; Rev 0; 7/05 47MHz to 870MHz Analog CATV General Description The analog transimpedance amplifier (TIA) is designed for CATV applications in fiber-to-the-home (FTTH) networks. This high-linearity
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19-3474; Rev 2; 8/07 Silicon Oscillator with Low-Power General Description The dual-speed silicon oscillator with reset is a replacement for ceramic resonators, crystals, crystal oscillator modules, and
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19-1248; Rev 1; 5/98 EVALUATION KIT AVAILABLE 10MHz to 1050MHz Integrated General Description The combines a low-noise oscillator with two output buffers in a low-cost, plastic surface-mount, ultra-small
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19-1991; Rev ; 4/1 EVALUATION KIT AVAILABLE General Description The quad low-voltage differential signaling (LVDS) line driver is ideal for applications requiring high data rates, low power, and low noise.
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19-3472; Rev ; 1/4 Quad SPST Switches General Description The quad single-pole/single-throw (SPST) switch operates from a single +2V to +5.5V supply and can handle signals greater than the supply rail.
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19-267; Rev ; 7/1 Low-Dropout, Constant-Current General Description The low-dropout bias supply for white LEDs is a high-performance alternative to the simple ballast resistors used in conventional white
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19-113; Rev 1; 8/3 EVLUTION KIT VILBLE DC-to-Microwave, +V Low-Noise mplifier General Description The is a low-noise amplifier for use from DC to microwave frequencies. Operating from a single +V supply,
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19-1431; Rev 4; 6/05 Direct-Conversion Tuner IC for General Description The low-cost direct-conversion tuner IC is designed for use in digital direct-broadcast satellite (DBS) television set-top box units.
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19-2574; Rev 0; 9/02 MAX4001 Evaluation Kit General Description The MAX4001 evaluation kit (EV kit) is a fully assembled and tested surface-mount circuit board that evaluates the MAX4001 RF-detecting controller
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9-998; Rev ; /7 EVALUATION KIT AVAILABLE.GHz to GHz, 75dB Logarithmic General Description The MAX5 complete multistage logarithmic amplifier is designed to accurately convert radio-frequency (RF) signal
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19-1331; Rev 1; 6/98 EVALUATION KIT AVAILABLE Upstream CATV Driver Amplifier General Description The MAX3532 is a programmable power amplifier for use in upstream cable applications. The device outputs
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19-1977; Rev 4; 1/9.5Ω/.8Ω Low-Voltage, Dual SPDT General Description The low on-resistance (R ON ), lowvoltage, dual single-pole/double-throw (SPDT) analog switches operate from a single +1.8V to +5.5V
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19-2213; Rev 0; 10/01 Low-Jitter, Low-Noise LVDS General Description The is a low-voltage differential signaling (LVDS) repeater, which accepts a single LVDS input and duplicates the signal at a single
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9-2939; Rev ; 9/3 5V, Mbps, Low Supply Current General Description The interface between the controller area network (CAN) protocol controller and the physical wires of the bus lines in a CAN. They are
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19-0455; Rev 1; 9/98 EALUATION KIT AAILABLE 3, Ultra-Low-Power Quadrature General Description The combines a quadrature modulator and quadrature demodulator with a supporting oscillator and divide-by-8
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9-3697; Rev 0; 4/05 3-Pin Silicon Oscillator General Description The is a silicon oscillator intended as a low-cost improvement to ceramic resonators, crystals, and crystal oscillator modules as the clock
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19-77; Rev ; 7/4.75Ω, Dual SPDT Audio Switch with General Description The dual, single-pole/double-throw (SPDT) switch operates from a single +2V to +5.5V supply and features rail-to-rail signal handling.
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19-1263; Rev 0; 7/97 350mA, 16.5V Input, General Description The linear regulators maximize battery life by combining ultra-low supply currents and low dropout voltages. They feature Dual Mode operation,
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19-2584; Rev ; 1/2 Low-Noise, Low-Dropout, 2mA General Description The low-noise, low-dropout linear regulator operates from a 2.5V to 6.5V input and delivers up to 2mA. Typical output noise is 3µV RMS,
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