ELECTRICAL CIRCUITS 4. OPERATIONAL AMPLIFIERS INPUT/OUTPUT CHARACTERISTICS

Transcription

1 43 ELECTICAL CICUITS 4. OPEATIONAL AMPLIIES PUT/OUTPUT CHAACTEISTICS Introduction The purpose of this development is not to examine the detailed design of the internals of the chip for the operational amplifier but rather to present various refinements of electrical equivalent circuits that will mimic the behavior of the device as seen at its inputs and outputs. The Ideal Operational Amplifier The symbol for the opamp is shown in igure 1. igure 1 Operational Amplifier symbol The inputs are at invert and non-invert and the output is at out. Looking into the inputs, electrically, it looks like an open circuit that is source-less and looking into the output, electrically, it looks like a perfect controlled voltage source with zero source impedance and voltage given by Equation 1. OUT A noninvert invert (1) Where: The Gain A, from DC to light frequencies Essentially, the perfect opamp is an ideal voltage controlled voltage source referenced to ground with infinite input impedance, zero output impedance and infinite gain. igure 2 illustrates this. igure 2 perfect opamp voltage controlled voltage source Analysis of Circuits with Perfect Opamps

2 44 The perfect opamp characteristics lead to very powerful simplifications for analysis of circuits containing opamps. 1. No current flows into the inputs 2. If the output voltage is finite then the differential voltage across the inputs must be zero. Consider the circuit of igure 3, the inverting opamp. igure 3 Opamp as inverting gain Using Simplification 2, if OUT is finite, then the potential at the inverting input must be the same as the non-inverting input, ground. Using Simplification 1, all the current through resistor into the inverting node must equal the current through resistor and go out of that node. Equation 2 implements these constraints: 0 0 OUT (2) Solving for OUT : OUT (3) Equation 3 gives the gain expression for the inverting opamp. Observe from Equation 2, the impedance seen by the input source is. This means that if has thevinen source impedance, the gain relationship of Equation 3 becomes that of Equation 4: S OUT S (4) Now, consider the circuit of igure 4, the non-inverting opamp:

3 45 igure 4 Opamp as non-inverting gain Again we assume that the output is finite. This means that the differential voltage between the inverting and non-inverting inputs must be zero. Additionally, the input terminals draw no current. Thus the voltage at the inverting input is. We can now write a voltage divider relationship from the output OUT, to the inverting input as given in Equation 5. OUT (5) Solving for OUT : OUT 1 (6) Equation 6 gives the gain for the non-inverting opamp. Observe that the impedance seen by the input signal source looking directly into the non-inverting input of the opamp amp is an open circuit (this is in contrast to the inverting gain opamp). Now consider the circuit of igure 5, the differential amplifier. To analyze this circuit we will use superposition, the results of the inverting gain Equation 3 and the results of the non-inverting gain Equation 6.

4 46 igure 5 the differential amplifier In applying the concept of superposition, we first set 2 to zero and then obtain an expression for the output due to 1. Then we set 1 to zero and then obtain the response to 2. We add both answers together to get the total result. Examining the circuit with 2 set to zero, we have resistor in parallel with tying the noninverting input to ground with a finite resistor. Since the non-inverting input impedance is an open circuit, the circuit is the same as igure 3 an inverting amplifier and the output using Equation 3 is: OUT1 1 (7) Now observe that at the non-inverting input resistors and form a voltage divider. * Thus we can write an expression for the voltage at the non-inverting input as: 2 * 2 2 (8) If we set source 1 to zero we can using Equation 6 write an expression for the noninverting gain for * as: 2 * OUT (9)

5 47 Plug Equation 8 into Equation 9 and simplify: OUT 2 2 (10) Now for the total output sum Equations 7 and 10: OUT 1 2 (11) It is obvious from Equation 11 why this circuit is called differential amplifier. Also observe that source impedance in 1 or 2 invalidates the expected results of Equation 11. Now consider the circuit of igure 6, the voltage follower: igure 6 the voltage follower We analyze this circuit by inspection. If the output is finite then by the infinite gain assumption there can be no difference between the inverting and non-inverting inputs. Thus the output must equal the input. Also observe that if had a source impedance the op-amp would ignore it as it has infinite input impedance. Additionally, observe that the signal at the output has zero source impedance. These 2 characteristics of this circuit are the reason it is used in design. The voltage follower neutralizes source impedance a very useful characteristic. Now consider the circuit of igure 7, the transimpedance amplifier:

6 48 igure 7 Transimpedance amplifier Again we use the infinite gain assumption to argue that the potential at the inverting input is the same as the non-inverting input, zero. We use the infinite input impedance assumption to argue that all the current from the signal input I must flow through. Thus we can obtain the following: I 0 I OUT OUT (12) In Equation 12 we observe that the signal, a current source, has been converted to a voltage source. This is a useful characteristic as, for example, many kinds of sensors look like a current source and during the conditioning process whereby signals must be converted to voltages with a range compatible with a computer data acquisition system. The first step for such an application is to convert from a current to a voltage source. Also observe that if the signal current has a source impedance, the amplifier circuit will completely ignore it as the input impedance to this circuit is a perfect short circuit. Now consider the circuit of igure 8 the summer:

7 49 igure 8 the summing amplifier Observe that this circuit is like the inverting amplifier of igure 3 except that there are multiple inputs tied into the inverting input. We apply the principle of superposition and set all the inputs except ith one to zero. Now each input simply becomes an input resistor to ground and they are all in parallel. Now applying the perfect op-amp assumptions, the voltage at the inverting input is the same as the non-inverting input, ground. Thus all these parallel resistors draw no current and the one source only sees an inverting amplifier with output given by: out i ini ini (13) Adding up the responses from all the inputs it becomes the summing amplifier: out TOTAL n i1 ini ini (14) Non-Ideal Op-Amps from a Qualitative Perspective or many many applications the ideal op-amp assumptions serve well and designs that are realized using them are quite adequate. However, the design engineer must completely understand the limitations of these assumptions to know when they are valid and not valid. The typical garden variety IC op-amp has the following limitations 1. Output voltage swing limited by the power supplies usually +/ Output current swing limited by short circuit protection usually 10ma 3. Input impedance while large ~1meg, is not infinite

8 50 4. Gain also large but not infinite ~50K to 100K 5. Bandwidth is nowhere close to DC to light. It s ~DC to 100KHz igure 9 illustrates the output voltage swing limitation as imposed on a voltage follower. igure 9 Op-amp power supply voltage swing limitation The limitation of current limit is constraining relative to the load resistance seen by the op-amp output. igure 10 illustrates how the output voltage swing will be reduced by short circuit protection reacting to a smaller and smaller load resistance. igure 10 Op-amp output limiting from short circuit current protection The relationship that is described in igure 10 is given by Equation 15. MAX I SC Where: MAX SC I Load is the output voltage limit of the +/- voltage swing is the +/- short circuit current limit (15)

9 51 Load PS is the total resistance at the op-amp output is power supply voltage (in igure 10) igure 11 illustrates a typical response of gain with frequency. igure 11 Op-amp typical gain vs frequency All of these limitations will be evaluated quantitatively along with other limitations in depth later in this hand-out. We are now ready to do some simple designs of op-amp circuits using the ideal op-amp assumptions. Gain Offset Amplifier Designs A very important application for the operational amplifier is interfacing a sensor for a physical measurement with a data acquisition system. Modern industrial processes involve sensing the progress of an operation by measured observations, digesting those measured observations and generating control signals that are input into the operation to keep it within desired bounds. Today the heart of this modern controller is a computer and the observations must be translated to be input into the computer. The system that performs this translation is a data acquisition system. To get an accurate translation, the measured observations must range between very specific voltage limits. The device that monitors the physical process is a transducer and the output of most transducers is very rarely compatible with the data acquisition systems input voltage range. igure 12 illustrates a block diagram of this concept. The transducer senses the status of the process. The op-amp circuit conditions the electrical response of the transducer into a range of voltage compatible to the data acquisition system. The data acquisition system translates the voltage signal so the computer can read it. The computer generates a control command that is translated by the computer interface into a signal that can drive the valve and thus control the process. Observe that the computer is also receiving other input signals and issuing other outputs. Our focus in this section is the design of the opamp circuit that interfaces the transducer to the data acquisition system.

10 52 igure 12 Block diagram typical process control The transducer is a device that changes some electrically discernable parameter that is a function of the desired process variable. In this section we will limit electrically discernable process parameters to voltage, current and resistance. Additionally, we will consider only cases where the process and the electrical parameter are related as the equation of a straight line. igure 13 illustrates that typical relationship, where x is the transducer electrical parameter and p is the process parameter. Additionally, calibration data for that transducer might be given by x, p 1 1 and x, p 2 2. The straight line equation for this data is given by: x mp x os The slope m and the Y intercept xos are given by: (16) x2 x1 x2 x1 m, x os x1 p1 p2 p1 p2 p (17) 1

11 53 igure 13 typical transducer electrical process parameter relationship A typical design problem for a gain offset application might be that you are given the transducer to be used and calibration data. You are also given the output voltage swing for the process parameter swing: out, out, to LOW p a The first step is to plug pa and p b into Equation 16 to get voltage swing is in terms of all electrical parameters: We consider 3 cases for xa and Case 1 x is a resistance, : x x b by examples High p b xa and x b. Now the output out, out, to LOW x a High x b The resistance swing of x, must be converted into a voltage swing:x. Additionally, that voltage swing inx is typically made deliberately less than the voltage swing of out. The output voltage swing constraint now becomes: outlow, xa to out High, x b. This final output voltage constraint is also a straight line equation given by: out Gx os (18) out G x High b out x a Low, os outhigh Gxb (19) Equations 18 and 19 are used to design the final op-amp stages. Lets do an example: Example 1 Given a transducer in which a resistance X changes in a straight line relationship with a process parameter. The electrical constraint between the resistance swing and the voltage swing to the data system is given by:

12 54 (0, 1.1Kohm) to (10, 1Kohm) (20) We need an op-amp circuit that converts that resistance swing into a proportional voltage swing. Additionally, we choose that voltage swing to be less than the specified output voltage swing. The inverting op-amp circuit of igure 3 will do this. If we let be X and let be a precision reference voltage E then the transducer resistance X has been converted into a voltage X. igure 14 illustrates the circuit and Equation 20 gives the relationship. igure 14 Transducer resistance to voltage converter X We pick: E X E E K (21) Thus the design requirement of Equation 20 translates to: (0, -1.1) to (10, -1) (22) These values are plugged into Equation 19 to obtain the gain offset relation for this design: 10 0 G 100, OS ( 1) 110 (23) 11.1 Thus we need an op-amp circuit that generates a gain of G 100 with an offset voltage of OS 110. The fact that the gain is positive says that the op-amp must be of the noninverting type. This circuit is given by igure 4 with gain described by Equation 6. We

13 55 design the circuit for the gain then we will modify it to incorporate the required offset. If we pick f 99K and 1K, Equation 6 becomes: 99K OUT 1 X 100 1K X (24) Now we use the concept of superposition and modify the circuit of igure 4 to become igure 15. igure 15 non-inverting op-amp as a gain offset for Example 1 If by superposition we set X 0 the output from E is given by Equation 3 and becomes: OUT 99 E (25) But Equation 23 requires that the output must be: OUT 110 when X 0. Thus 110 Equation 25 yields: E The complete design schematic is given by igure 16:

14 56 igure 16 Example 1 complete signal conditioner schematic One should always check the design to insure it performs as specified. If we set X 1. 1K, the output becomes OUT and if X 1K, the output is OUT Case 2 The transducer is a current source Ix : The current swing of Ix, must be converted into a voltage swing: x. As with the previous example, that voltage swing is made deliberately less than the voltage swing of the output, out. or the current to voltage conversion we use the op-amp circuit of igure 7, the transimpedance amplifier. At this point the problem is exactly like Case 1 as the output voltage constraint has become: out x LOW, a to out High, x b. Consider a design example: Example 2 Given a transducer in which a current Ix changes in a straight line relationship with a process parameter. The electrical constraint between the current swing and the voltage swing to the data system is given by: (0, 0.1ma) to (10, 0.5ma) (26) We need an op-amp circuit that converts that current swing into a proportional voltage swing. Additionally, we choose that voltage swing to be less than the specified output voltage swing. The transimpedance op-amp circuit of igure 7 will do this. If we let be 1k and plug the swing of the current Ix into Equation 12, then the design constraint of Equation 24 becomes: (0, -.1) to (10, -0.5) (27)

15 57 igure 17 illustrates the schematic of this trans-impedance amplifier: igure 17 trans-impedance amplifier for Example 2 The values of Equation 27 are plugged into Equation 19 to obtain the gain offset relation for this design: 10 0 G 25, OS 10 25( 0.5) 2. 5 (28) Thus we need an op-amp circuit that generates a gain of G 25 with an offset voltage of OS The fact that the gain is negative says that the op-amp must be of the inverting type. This circuit is given by igure 3 with gain described by Equation 3. We design the circuit for the gain then we will modify it to incorporate the required offset. If we pick f 25K and 1K, Equation 3 becomes: 25K OUT X 25 1K X (29) Now we use the concept of superposition and modify the circuit of igure 4 to become igure 18. Using the principle of superposition, when the signal input is zero the output must be the offset This is expressed in Equation 30 where we have picked E 10K. 25K OUT 2.5 E, E 1 x0 10K (30) The complete schematic is given by igure 19.

16 58 igure 18 summing amplifier as gain offset for Example 2 igure 19 complete signal conditioner amplifier for Example 2 Case 3 The transducer is a voltage source x with an imprecise source impedance x : Other than negating any effect of x, this case was covered as part of the first 2 cases. Consider the following example. Example 3 Given a transducer where a voltage x (that has an imprecise source impedance) changes in a straight line relationship with a process parameter. The electrical constraint between the transducer voltage swing and the voltage swing to the data system is given by:

17 59 (-5, 0.01) to (+5, 0.15) (31) Because of the imprecise source impedance the signal source can t be input directly into an inverting amplifier as it is not possible to realize the desired gain. The data from Equation 31 can be directly plugged into Equation G , OS (0.15) (32) The amplifier that implements positive gain is the non-inverting of igure 4. This circuit will reject any effect of imprecise source impedance seen at the non-inverting input. The circuit with offset will be exactly like that of igure 15, but with different resisters. To realize the gain of G , pick K and 1K. To obtain the required : OS E, E (33) The complete circuit is shown in igure 20: igure 20 signal conditioner circuit for Example 3 As a check, set X 0. 15and the output is: and set X and the output is: Op-Amp as a Current Source Discussion Examples of voltage sources are very common: 12 car battery, AA batteries, a 120 AC outlet, the power AC adapter for PC laptop or a video game. Examples of current sources are far less common: specialized transducers such as a radiation detector look

18 60 like current sources and are signal conditioned with a Trans-impedance amplifier, igure 19. Never the less in some instrumentation applications may require an electronic circuit that over the voltage range of power supply for the electronics is very nearly a true current source. igure 21 illustrates an ideal current source relative to analog ground. igure 21a pushes current into a load relative to analog ground and igure 21b pulls current from a load also relative to analog ground. igure 21a Push current igure 21b Pull current The load can be anything as long as the frequency range, load voltage and power do not exceed the voltage supplies, frequency range and power limitations of the op-amps for the electronic circuit of the current source. Within these limits the op-amps can be considered ideal (see op-amp chapters 5 & 6). igure 22a gives the op-amp circuit that is the push current source and 22b is the circuit for the pull current source. In both of these circuits the input signal is voltage and the output is current thus the gain has units of conductance, S. igure 22a Push circuit igure 22b Pull circuit Each circuit of igure 22 is a current source per igure 21 as long as long as the op-amps can be considered ideal, in1, 2 are equal, f1, 2 are equal and s and ZL are << than

19 I push S Z L 61 in & f [1]. Given the sign convention that Ipull is positive the transfer function of in to Iout for igure 22a is per Equation 34 and for igure 22b is per Equation 35. I out f in s (34) I out f in s (35) It is left as an exercise for the reader to derive these expressions using the stated assumptions. Isolated Current Source The circuits of igures 22a, b will work well if applied such that the constraining assumptions are always met. However, a significant drawback is that the system analog ground must be located at the load that the current source is driving and this can compromise noise immunity. It may be possible to float the load with ground isolation with the push-pull configuration of igure 23. I push Z load I pull igure 23 Push-Pull ground isolation igure 23 is ideal and anybody who has taken a basic circuits course knows that unless the current sources are perfectly matched that the voltage across each source will attempt to go to infinity, saturate at the power supply limitation and thus never work. igure 24 illustrates a circuit that accommodates current source miss-match. I pull S igure 24 Non-ideal push-pull current source

20 62 Any push-pull current source circuit must be of the form of igure 24. However, if an implementation is such that S can be >>Z L, the actual circuit may approach igure 23 and a practical implementation can be realized. In implementing a current source circuit of igure 22a, b Egloff [2] has shown that if the load that the current source is driving has a significant bias voltage even though it is less than the current source compliance voltage, miss-match between pairs f and in causes a DC offset in the current source even though in may be zero. Thus Z L any bias voltage will increase the required precision of the match between pairs f and in. The application Egloff was addressing was able match pairs f and in adequately to constrain the offset current to an acceptable level even with Z L bias voltage at up to 50 DC. Thus, if igure 22a, b were arranged in series as a push-pull the required precision matching of quads in and f to allow the necessary source impedance S to greatly exceed Z L may be impractical. A possible solution for some applications could be do only pair matching in the push and the pull then trim S in either push or pull to match the current sources and enable S to greatly exceed Z L. igure 25 Push-pull with op-amps If the precision and stability of the S trim are not adequate for the application then a different approach must be taken. Consider, feed-back control match in the following example. igure 26 illustrates the basic schematic.

21 63 igure 26 Push-pull feed-back match control Consider a specific design example where resistors were chosen as: in = 150k ohm, f = 15k ohm, s = 0.5 ohm. sa, b, c = 500k ohm and Z L is given as mohms with a 50 DC bias. All the resistors were given a tolerance of +/-0.1% and no matching. The system was modeled with the Spice simulator Multisim. In the application, the frequency content of in (< 2kHz) is well within the bandwidth of the op-amps and thus they were assumed perfect. esistor miss-match was picked at worst case. in was set at 100 Hz, 5 peak and modeled as separate sources with the in for the push given a DC option to simulate DC bias current (5.0m was the setting). The feed-back should force a match with both any DC bias as well as the 100Hz signal. If the system worked the 50 load bias voltage should split evenly between the current sources, the AC load current should be about 707.0mA MS and there will be DC current due to source bias and resistor miss-match. igure 27 shows the results with the 50 DC voltage split and the AC current. igure 28 shows the AC voltage split and the DC current. The gain of the error amplifier (6) was doubled and simulation repeated. The same is given in igures 29 & 30.

22 64 igure 27 Multisim push-pull feed-back results igure 28 Multisim push-pull feed-back results

23 65 igure 29 Multisim results gain doubled igure 30 Multisim results gain doubled

24 66 Evaluation of the results in the simulations illustrated in igures 27, 28, 29 & 30 indicate that for this application the voltage feed-back technique appears feasible as the DC bias voltage split evenly, the AC voltage split was acceptable, the DC bias current was acceptable and the AC current was as expected. Thus it is concluded that, between the match resistors approach and voltage feed-back that isolated current sources can be realized for many instrumentation applications. eferences [1] Tobey, Graeme, Huelsman Operational Amplifiers Design and Applications Chap 6 McGraw-Hill, 1971 [2] Matt Egloff, et al., A Critical Analysis of an Instrumentation Current Source, ISA 59 th IIS Conference, Cleveland, OH. May 2013