FIR4N60FG. Features 4A,600V,R DS(on) GS =10V Low gate charge Low Crss Fast switching Improved dv/dt capability

Transcription

1 Advanced N-Ch Power MOSFET FIR4N60FG General Description FIR4N60FG is an N-channel enhancement mode power MOS field effect transistor which is produced using Silan proprietary F-Cell TM structure VDMOS technology. The improved planar stripe cell and the improved guard ring terminal have been especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulse in the avalanche and commutation mode. These devices are widely used in AC-DC power suppliers, DC DC converters and H-bridge PWM motor drivers. PIN Connection G D S 2 TO-220F Features 4A,600V,R DS(on) (typ)=2.0ω@v GS =0V Low gate charge Low Crss Fast switching Improved dv/dt capability YAWW FIR4N60F 3 Marking Diagram Y = Year A = Assembly Location WW = Work Week FIR4N60F = Specific Device Code Absolute Maximum Ratings (Ta = 25 o C unless otherwise noted; reference only ) Characteristics Symbol Ratings Unit Drain-Source Voltage V DS 600 V Gate-Source Voltage V GS ±30 V Drain Current T C =25 C I D 4.0 T C =00 C 2.5 Drain Current Pulsed I DM 6 A Power Dissipation(T C =25 C) -Derate above 25 C Single Pulsed Avalanche Energy(Note ) P D 33 W 0.26 W/ C E AS 27 mj Operation Junction Temperature Range T J -55~+50 C Storage Temperature Range T stg -55~+50 C 204 Copyright By American First Semiconductor Page /6

2 Thermal Characteristics Characteristics Symbol Ratings Unit Thermal Resistance, Junction-to-Case R θjc.6 C/W Thermal Resistance, Junction-to-Ambient R θja 0 C/W Electrical Characteristics (Ta = 25 o C unless otherwise noted; reference only ) Characteristics Symbol Test conditions Min. Typ. Max. Unit 25 C, V GS =0V, I D =250µA V Drain -Source Breakdown Voltage B S 25 C, V GS =0V, I D =250µA V Drain-Source Leakage Current I DSS 25 C, V DS =800V, V GS =0V ua 25 C, V DS =800V, V GS =0V ua 50 C, V DS =800V, V GS =0V ua Gate-Source Leakage Current I GSS V GS =±30V, V DS =0V ±00 na Gate Threshold Voltage V GS(th) V GS = V DS, I D =250µA V Static Drain- Source On State Resistance R DS(on) V GS =0V, I D =2A Ω Input Capacitance C iss V DS =25V,V GS =0V, Output Capacitance C oss f=.0mhz Reverse Transfer Capacitance C rss pf Turn-on Delay Time t d(on) V DD =300V,I D =4A, Turn-on Rise Time t r R G =25Ω Turn-off Delay Time t d(off) ns Turn-off Fall Time t f (Note2,3) Total Gate Charge Q g V DS =480V,I D =4A, Gate-Source Charge Q gs V GS =0V nc Gate-Drain Charge Q gd (Note 2,3) Source-Drain Diode Ratings And Characteristics Characteristics Symbol Test conditions Min. Typ. Max. Unit Continuous Source Current I S Integral Reverse P-N Pulsed Source Current I SM Junction Diode in the A MOSFET Diode Forward Voltage V SD I S =4.0A,V GS =0V V Reverse Recovery Time T rr I S =4.0A,V GS =0V, ns Reverse Recovery Charge Q rr di F /dt=00a/µs (Note 2) µc. L=30mH, I AS =3.45A, V DD =00V, R G =25Ω, starting T J =25 C; 2. Pulse Test: Pulse width 300μs,Duty cycle 2%; 3. Essentially independent of operating temperature. Page 2/6

3 Typical Characteristics Drain Current ID(A) 0 Figure. On-Region Characteristics Figure 2. Transfer Characteristics 00 Variable V GS=4.5V -55 C V GS=5V 25 C V GS=5.5V 50 C V GS=6V 0 V GS=7V V GS=8V V GS=0V V GS=5V.250µS pulse test 2.T C=25 C Drain Current ID(A) µS pulse test 2.V DS=50V Drain-Source On-Resistance RDSON)(Ω) Drain-Source Voltage V DS (V) Figure 3. On-Resitance Variation vs. Drain Current and Gate Voltage V GS=0V V GS=20V Note: T J=25 C Drain Current I D (A) Reverse Drain Current IDR(A) Gate-Source Voltage V GS (V) Figure 4. Body Diode Forward Voltage Variation vs. Source Current and Temperature C 25 C 50 C.250µS pulse test 2.V GS=0V Source-Drain Voltage V SD (V) Capasistance(pF) Figure 5. Capacitance Characteristics C iss C oss C rss C iss=c gs+c gd(c ds=shorted) C oss=c ds+c gd C rss=c gd. V GS=0V 2. f=mhz Gate-Source Voltage (V) Figure 6. Gate Charge Characteristics V DS=480V V DS=300V V DS=20V Note: I D=4.0A Drain-Source Voltage V DS (V) Total Gate Charge Qg(nC) Page 3/6

4 Typical Characteristics(Continued).2 Figure 7. Breakdown Voltage Variation vs. Temperature 3.0 Figure 8. On-resistance Variation vs. Temperature Drain-Source Breakdown Voltage(Normalized) BS V GS=0V 2. I D=250µA Drain-Source On-Resistance (Normalized) RDS(ON) V GS=0V 2. I D=2.0A Junction Temperature T J ( C) Junction Temperature T J ( C) 0 2 Figure 9. Max. Safe Operating Area(FIR4N60FG) Operation in This Area is Limited by RDS(ON) 4 Figure 0. Maximum Drain Current vs. Case Temperature Drain Current - ID(A) DC.TC=25 C 2.Tj=50 C 3.Single Pulse 0ms ms 00µs Drain Current - ID(A) Drain Source Voltage - V DS (V) Case Temperature T C ( C) Page 4/6

5 Typical Test Circuit Gate Charge Test Circuit & Waveform 2V 200nF 50KΩ 300nF Same Type as DUT 0V Qg Qgs Qgd DUT 3mA Charge Resistive Switching Test Circuit & Waveform RL VDD 90% 0V RG DUT 0% td(on) tr ton td(off) tf toff Unclamped Inductive Switching Test Circuit & Waveform L BS EAS = 2 LI AS 2 BS BS - VDD ID IAS 0V tp RG DUT VDD VDD ID(t) (t) tp Time Page 5/6

6 Package Dimensions TO-220F A K F Q H B 2 3 D G N L 3 PL Y U 0.25 (0.00) M B M Y C T J S R SEATING PLANE NOTES:. DIMENSIONING AND TOLERANCING PER ANSI Y4.5M, CONTROLLING DIMENSION: INCH 3. 22D-0 THRU 22D-02 OBSOLETE, NEW STANDARD 22D-03. INCHES MILLIMETERS DIM MIN MAX MIN MAX A B C D F G 0.00 BSC 2.54 BSC H J K L N BSC 5.08 BSC Q R S U Page 6/6