up V MOSFET Drivers with Output Disable for Single Phase Synchronous-Rectified Buck Converter General Description Ordering Information

Transcription

1 up MOSFE Drivers with Disable for Single Phase SynchronousRectified Buck Converter General Description he up6281 is a dual, high voltage MOSFE driver optimized for driving two NChannel MOSFEs in a synchronousrectified buck converter. Each driver is capable of driving a 5000pF load with 30 traition time. his device combined with upi multiphase buck controller forms a complete core voltage regulator for advanced microprocessors. he up6281 features adaptive antishootthrough protection that prevents crossconduction of the external MOSFE while maintai minimum deadtime for optimized efficiency. Both gate drives are turned off by pulling low pin or highimpedance at pin, preventing rapid output capacitor discharge during system shutdow. Other feature is supply input under voltage lockout. he up6281 is available in thermal enhanced PSOP8L or WDFN3x38L packages. Core oltage Supplies for Desktop, Motherboard CPUs Applicatio High Frequency Low Profile DC/DC Converters High Current Low oltage DC/DC Converters AllInOne Synchronous Buck Drivers Bootstrapped HighSide Driver Adaptive AntiShoothrough Protection Circuitry 1 Signal Generates both Drivers ristate Input for Bridge Shutdown Disable Control ur Off both MOSFEs Under oltage Lockout for Supply Input PSOP8L or WDFN3x38L Packages RoHS Compliant and Halogen Free Order Number up6281asu8 up6281add8 Package yp e PSOP 8L WDFN3x3 8L Features Ordering Information Remark Note: upi products are compatible with the current IPC/ JEDEC JSD0 requirement. hey are halogenfree, RoHS compliant and 100% matte tin (Sn) plating that are suitable for use in SnPb or Pbfree soldering processes. Pin Configuration & ypical Application Circuit BOO 1 8 IN CC Input 1 2 BOO 8 7 OU PSOP8L 3 6 BOO 1 8 CC 4 CC CC 4 5 WDFN3x38L 1

2 Functional Block Diagram CC ULO Adaptive Shoothrough Protection BOO Disable Adaptive Shoothrough Protection CC No. Pin Name 1 BOO Pin Function 2 P WM Input. Functional Pin Description Bootstrap Supply for the floating upper gate driver. Connect the bootstrap capacitor CBOO between BOO pin and the pin to form a bootstrap circuit. he bootstrap capacitor provides the charge to turn on the upper MOSFE. Eure that C is placed near the IC his pin receives logic level input and controls the driver outputs.. B OO 3 4 CC 5 Disable. his pin disables normal operation and forces both and off when it is pulled low. Supply oltage for the IC. his pin provides bias voltage for the IC. Connect this pin to 12 voltage source and bypass it with an R/C filter. Lower Gate Driver. Connect this pin to the gate of lower MOSFE. his pin is monitored by the adaptive shootthrough protection circuitry to determine when the lower MOSFE has turn off. 6 G ND Ground for the IC. All voltages levels are measured with respect to this pin. 7 8 Exposed Pad () Switch Node. Connect this pin to the source of the upper MOSFE and the drain of the lower MOSFE. his pin is used as the sink for the driver. his pin is also monitored by the adaptive shootthrough protection circuitry to determine when the upper MOSFE has turned off. A Schottky diode between this pin and ground is recommended to reduce negative traient voltage which is common in a power supply system. Upper Gate Driver. Connect this pin to the gate of upper MOSFE. his pin is monitored by the adaptive shootthrough protection circuitry to determine when the upper MOSFE has turned off. Ground for the IC. he exposed pad should be well soldered to PCB for effective heat conduction. 2

3 he up6281 is a dual, high voltage MOSFE driver optimized for driving two NChannel MOSFEs in a synchronousrectified buck converter. Each driver is capable of driving a 5000pF load with 30 traition time. his device combined with upi multiphase buck controller forms a complete core voltage regulator for advanced microprocessors. he up6281 features adaptive antishootthrough protection that prevents crossconduction of the external MOSFE while maintai minimum deadtime for optimized efficiency. Both gate drives are turned off by pulling low pin or highimpedance at pin, preventing rapid output capacitor discharge during system shutdow. Other feature is supply input under voltage lockout. he up6281 is available in thermal enhanced PSOP8L or WDFN3x38L packages. Disable Logic low of disables the gate drivers and keep both output low. ie the pin to controller power directly if the output disable function is not used. Input he pin is a tristate input. Logic high tur on the highside gate driver and tur off the low side gate driver once the POR of CC is granted and is kept high. Logic low tur off the high side gate driver and tur off the low side gate driver. Functional Description he bootstrap capacitor C BOO is charged to CC when pin is grounded by turning on the lowside MOSFE. he raises to IN when the highside MOSFE is turned on, forcing the BOO pin voltage to IN + CC that provides voltage to hold the highside MOSFE on. he highside gate driver output is in phase with the input when it is enabled. he highside driver is held low if the pin is pulled low or highimpedance at pin. Adaptive Shoot hrough Protection he adaptive shootthrough circuit prevents the highside and lowside MOSFEs from being ON simultaneously and conducting destructive large current. It is done by turning on one MOSFE only after the other MOSFE is off already with adequately delay time. At the highside off edge, and voltages are monitored for antishootthrough protection. he up6281 will not begin to output lowside driver high until both ( ) and are lower than 1.2, making sure the highside MOSFE is turned off completely. At the lowside off edge, voltage is monitored for antishootthrough protection. he up6281 will not begin to output highside driver high until is lower than 1.2, making sure the lowside MOSFE is turned off completely. High impedance input at pin will keep both highside and lowside gate drivers low and tur off both MOSFEs. he pin voltage is kept around 2.0 by internal bias resistors when floating. Low Side Driver he lowside driver is designed to drive a groundreferenced NChannel MOSFE. he bias to the lowside driver is internally connected to CC supply and. he lowside driver output is out of phase with the input when it is enabled. he low side driver is held low if the pin is pulled low or highimpedance at pin. HighSide Driver he highside driver is designed to drive a floating NChannel MOSFE. he bias voltage to the highside driver internally connected to BOO and pi. An external bootstrap supply circuit that is connected between BOO and pi provides the bias current for the highside gate driver. 3

4 Package hermal Resistance (Note 3) PSOP8 θ JA 50 C/W WDFN3x38L θ JA 68 C/W PSOP8L θ JC 5 C/W WDFN3x38L θ JC 6 C/W Power Dissipation, P A = 25 C PSOP8L 2.0W WDFN3x38L 1.47W Operating Junction emperature Range (Note 4) 40 C to +125 C Operating Ambient emperature Range 40 C to +85 C Supply Input oltage, CC to 13.2 ( CC = 12, A = 25 O C, unless otherwise specified) Absolute Maximum Rating Supply Input oltage, CC12 (Note 1) 0.3 to +15 BOO to 0.3 to +15 to DC 0.7 to 15 < 0 8 to 30 BOO to DC 0.3 to CC < to 42 to DC 0.3 to (BOO +0.3) <0 5 to (BOO + 0.3) to DC 0.3 to + (CC ) <0 5 to CC to to (CC + 0.3) Storage emperature Range 65 O C to +150 O C Junction emperature 150 O C Lead emperature (Soldering, 10 sec) 260 O C ESD Rating (Note 2) HBM (Human Body Mode) 2k MM (Machine Mode) 0 hermal Information Recommended Operation Conditio Electrical Characteristics Parameter Symbol est Conditio Min yp Max Unit Supply Input Supply Input Supply Input oltage Current CC 0. 8 I C C CC POR Rising hreshold CCR H CC POR Hysteresis CHYS = = 0, each channe l ma CC rising C

5 Parameter Input Input Input High hreshold Low hreshold Floating oltage Symbol Input Current IPW M Disable Input est Conditio Min.15 RH. 6 FH FL yp up6281 Max Unit = ua = ma I nput High H 2. 6 I nput Low L 0. 8 Input Current I Propogation Delay ime High Side Driver Resistance, Sourcing R _SRC Resistance, Sinking R _SNK Rising ime Falling ime Propogation Delay ime Low Side Driver = 0 to ua PDH 45 PDL 45 H BOO = 12, I H BOO = 12, I R BOO = 12, C LOAD F BOO = 12, C LOAD PDHUGA E BOO PDL BOO Electrical Characteristics = 80mA = 80mA Ω Ω = 3nF = 3nF 30 = = Resistance, Sourcing R L_SRC Resistance, Sinking R L_SNK Rising ime R Falling ime FLGA E Propogation Delay ime PDH PDL CC CC CC CC CC CC = 12, IL GAE = 12, IL GAE = 12, CLOAD = 12, CLOAD = 80mA = 80mA Ω Ω = 3nF = 3nF 30 = =

6 Electrical Characteristics PDLD PDHD or 90% 10% PDL F PDH PDL PDH R F R Note 1. Stresses listed as the above Absolute Maximum Ratings may cause permanent damage to the device. hese are for stress ratings. Functional operation of the device at these or any other conditio beyond those indicated in the operational sectio of the specificatio is not implied. Exposure to absolute maximum rating conditio for extended periods may remain possibility to affect device reliability. Note 2. Devices are ESD seitive. Handling precaution recommended. Note 3. θ JA is measured in the natural convection at A = 25 C on a low effective thermal conductivity test board of JEDEC 513 thermal measurement standard. Note 4. he device is not guaranteed to function outside its operating conditio. 6

7 Rising Proporgation Delay ypical Operation Characteristics Falling Proporgation Delay (1/Div) (1/Div) ime (40/Div) = 0, MHz bandwidth limited Proporgation Delay ime (40/Div) = 0, MHz bandwidth limited Short Pulse Waveforms (2/Div) ime (80/Div) MHz bandwidth limited Switching Waveforms ime (40/Div) MHz bandwidth limited Switching Waveforms ime (40/Div) MHz bandwidth limited ime (40/Div) MHz bandwidth limited 7

8 he power dissipation in up6281 is dependent of the supply voltage, the frequency and the input capacitance of the MOSFE: P LOSS = CC {I CC + [ CC (C ISS _ U + C ISS _ L ) + IN C OSS _ U ]f where CC is the supply voltage, I CC is the operation current of the control circuit, C ISS_U and C ISS_L are the total input capacitance of the upper and lower MOSFE respectively, IN is the supply voltage of the buck converter, C OSS_U is the reverse trafer capacitance regarding the Miller effect and f is the input frequency. ake a typical case for example, CC = 12, I CC = 1mA, C ISS_U = 2x1.5nF, C OSS_U = 2x0.1nF, IN = 12, CISS_L = 2x3nF, f OSC = 300kHz, the power dissipation is calculated as: P LOSS = 12{1mA + [12(3nF + 6nF) nF]300kHz} = 0.41W he up6281 is available in thermal enhanced PSOP8L or WDFN3x38L packages. However, the thermal resistance θ JA still highly depends on the PCB design. Copper plane under the exposed pad is an effective heatsink and is useful for improving thermal conductivity. Figure 1 shows the relatiohip between thermal resistance θ JA of PSOP8L package vs. copper area on a standard JEDEC 517 (4 layers, 2S2P) thermal test board at A = 25 O C. A 50mm 2 copper plane reduces θ JA from 75 O C/W to 50 O C/W. } hermal Resistance θ JA ( O C/W) Application Information Copper Area (mm 2 ) Figure 1. hermal Resistance θ JA vs. Copper Area ake the above case for example, 0.41W power loss will cause 0.41W x 50 O C/W =.5 O C temperature raise with 50mm2 copper area. 8

9 0.70 ± ± ± PSOP8 Package 1.50 ± Package Information ± ± ± ± BSC Recommended Solder Pad Layout MAX BSC Note 1.Package Outline Unit Description: BSC: Basic. Represents theoretical exact dimeion or dimeion target MIN: Minimum dimeion specified. MAX: Maximum dimeion specified. REF: Reference. Represents dimeion for reference use only. his value is not a device specification. YP. ypical. Provided as a general value. his value is not a device specification. 2.Dimeio in Millimeters. 3.Drawing not to scale. 4.hese dimeio no not include mold flash or protrusio. Mold flash or protrusio shell not exceed 0.15mm. 9

10 Package Information WDFN3x38L Package BSC REF MAX BSC Recommended Solder Pitch and Dimeio Note 1.Package Outline Unit Description: BSC: Basic. Represents theoretical exact dimeion or dimeion target MIN: Minimum dimeion specified. MAX: Maximum dimeion specified. REF: Reference. Represents dimeion for reference use only. his value is not a device specification. YP. ypical. Provided as a general value. his value is not a device specification. 2.Dimeio in Millimeters. 3.Drawing not to scale. 4.hese dimeio no not include mold flash or protrusio. Mold flash or protrusio shell not exceed 0.15mm. 10