FOD3182 3A Output Current, High Speed MOSFET Gate Driver Optocoupler

Transcription

1 FOD A Output Current, High Speed MOSFET Gate Driver Optocoupler Features High noise immunity characterized by kv/µs (Typ.) common mode V CM =,V Guaranteed operating temperature range of - C to C A peak output current Fast switching speed ns max. propagation delay ns max pulse width distortion Fast output rise/fall time Offers lower dynamic power dissipation khz maximum switching speed Wide V DD operating range: V to V Use of P-Channel MOSFETs at output stage enables output voltage swing close to the supply rail (rail-to-rail output) Vrms, minute isolation Under voltage lockout protection (UVLO) with hysteresis optimized for driving MOSFETs Minimum creepage distance of.mm Minimum clearance distance of mm to mm (option TV or TSV) Minimum insulation thickness of.mm UL and VDE*, peak working insulation voltage (V IORM ) Applications February Plasma Display Panel High performance DC/DC convertor High performance switch mode power supply High performance uninterruptible power supply Isolated Power MOSFET gate drive Description The FOD is a A Output Current, High Speed MOSFET Gate Drive Optocoupler. It consists of a aluminium gallium arsenide (AlGaAs) light emitting diode optically coupled to a CMOS detector with PMOS and NMOS output power transistors integrated circuit power stage. It is ideally suited for high frequency driving of power MOSFETS used in Plasma Display Panels (PDPs), motor control inverter applications and high performance DC/DC converters. The device is packaged in an -pin dual in-line housing compatible with C reflow processes for lead free solder compliance. *Requires V ordering option Functional Block Diagram Package Outlines NC V DD ANODE 7 V O CATHODE V O NC V SS Note: A.µF bypass capacitor must be connected between pins and. FOD Rev...9

2 Truth Table Pin Definitions V DD V SS Positive Going (Turn-on) V DD V SS Negative Going (Turn-off) LED V O Off V to V V to V Low On V to 7.V V to 7V Low On 7.V to 9V 7V to.v Transition On 9V to V.V to V High Pin # Name Description NC Not Connected Anode LED Anode Cathode LED Cathode NC Not Connected V SS Negative Supply Voltage V O Output Voltage (internally connected to V O ) 7 V O Output Voltage V DD Positive Supply Voltage FOD Rev...9

3 Safety and Insulation Ratings As per DIN EN/IEC This optocoupler is suitable for safe electrical insulation only within the safety limit data. Compliance with the safety ratings shall be ensured by means of protective circuits. Symbol Parameter Min. Typ. Max. Unit Installation Classifications per DIN VDE /.9 Table For Rated Mains Voltage < Vrms IIV For Rated Mains Voltage < Vrms IIV For Rated Mains Voltage < Vrms IIII For Rated Mains Voltage < Vrms IIII For Rated Mains Voltage < Vrms (Option T, TS) IIII Climatic Classification // Pollution Degree (DIN VDE /.9) CTI Comparative Tracking Index 7 V PR Input to Output Test Voltage, Method b, V IORM x.7 = V PR, % Production Test with tm = sec., Partial Discharge < pc Input to Output Test Voltage, Method a, V IORM x. = V PR, Type and Sample Test with tm = sec.,partial Discharge < pc V IORM Max Working Insulation Voltage, V peak V IOTM Highest Allowable Over Voltage V peak External Creepage mm External Clearance 7. mm External Clearance (for Option T or TS -. Lead Spacing). mm Insulation Thickness. mm Safety Limit Values Maximum Values Allowed in the Event of a Failure T Case Case Temperature C I S,INPUT Input Current ma P S,OUTPUT Output Power (Duty Factor.7%) mw R IO Insulation Resistance at T S, V IO = V 9 Ω FOD Rev...9

4 Absolute Maximum Ratings (T A = C unless otherwise specified) Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. Symbol Parameter Value Units T STG Storage Temperature - to C T OPR Operating Temperature - to C T J Junction Temperature - to C T SOL Lead Solder Temperature Wave solder for sec. C (Refer to Reflow Temperature Profile, pg. ) I F(AVG) Average Input Current () ma I F(tr, tf) LED Current Minimum Rate of Rise/Fall ns V R Reverse Input Voltage V I OH(PEAK) High Peak Output Current () A I OL(PEAK) Low Peak Output Current () A V DD V SS Supply Voltage -. to V V O(PEAK) Output Voltage to V DD V P O Output Power Dissipation () mw P D Total Power Dissipation () 9 mw Recommended Operating Conditions The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to absolute maximum ratings. Symbol Parameter Value Units V DD V SS Power Supply to V I F(ON) Input Current (ON) to ma V F(OFF) Input Voltage (OFF) -. to. V FOD Rev...9

5 Electrical-Optical Characteristics (DC) Apply over all recommended conditions, typical value is measured at V DD = V, V SS = V, T A = C, unless otherwise specified. Symbol Parameter Test Conditions Min. Typ. Max. Unit I OH High Level Output Current V OH = (V DD V SS V)..9 A V OH = (V DD V SS V). I OL Low Level Output Current V OL = (V DD V SS V). A V OL = (V DD V SS V). V OH High Level Output Voltage ()() I O = -ma V DD. V V OL Low Level Output Voltage ()() I O = ma V SS. V I DDH High Level Supply Current Output Open,.. ma I F = to ma I DDL Low Level Supply Current Output Open,.. ma V F = -. to.v I FLH Threshold Input Current Low to High I O = ma, V O > V. 7. ma V FHL Threshold Input Voltage High to Low I O = ma, V O < V. V V F Input Forward Voltage I F = ma... V V F /T A Temperature Coefficient of Forward I F = ma -. mv/ C Voltage V UVLO UVLO Threshold V O > V, I F = ma 7. 9 V V UVLO V O < V, I F = ma V UVLO HYST UVLO Hysteresis. V BV R Input Reverse Breakdown Voltage I R = µa V C IN Input Capacitance f = MHz, V F = V pf FOD Rev...9

6 Switching Characteristics Apply over all recommended conditions, typical value is measured at V DD = V, V SS = V, T A = C, unless otherwise specified. Symbol Parameter Test Conditions Min. Typ. Max. Unit -9 9 ns t PLH Propagation Delay Time to High Output Level (7) I F = ma, ns t R g = Ω, PHL Propagation Delay Time to Low Output Level (7) ns f = khz, P WD Pulse Width Distortion () Duty Cycle = %, ns P DD Propagation Delay Difference Between Any C g = nf (t PHL t PLH ) Two Parts (9) t r Rise Time C L = nf, ns t f Fall Time R g = Ω ns t UVLO ON UVLO Turn On Delay. µs t UVLO OFF UVLO Turn Off Delay. µs CM H Output High Level Common Mode Transient T Immunity () () CM L Output Low Level Common Mode Transient T Immunity () () Isolation Characteristics *Typical values at T A = C A = C, I f = 7mA to ma, V CM = kv, V DD = V A = C, V f = V, V CM = kv, V DD = V kv/µs kv/µs Symbol Parameter Test Conditions Min. Typ.* Max. Unit V ISO Withstand Isolation Voltage () () T A = C, R.H. < %, t = min., I I-O µa V rms R I-O Resistance (input to output) () V I-O = V Ω C I-O Capacitance (input to output) Freq. = MHz pf FOD Rev...9

7 Notes:. Derate linearly above 79 C free air temperature at a rate of.7ma/ C.. Maximum pulse width = µs, maximum duty cycle = %. Derate linearly above 79 C, free air temperature at the rate of.7mw/ C.. No derating required across operating temperature range.. In this test, V OH is measured with a dc load current of ma. When driving capacitive load V OH will approach V DD as I OH approaches zero amps.. Maximum pulse width = ms, maximum duty cycle = %. 7. t PHL propagation delay is measured from the % level on the falling edge of the input pulse to the % level of the falling edge of the V O signal. t PLH propagation delay is measured from the % level on the rising edge of the input pulse to the % level of the rising edge of the V O signal.. PWD is defined as t PHL t PLH for any given device.. The difference between t PHL and t PLH between any two FOD parts under same operating conditions, with equal loads.. Pin and need to be connected to LED common.. Common mode transient immunity in the high state is the maximum tolerable dv CM /dt of the common mode pulse V CM to assure that the output will remain in the high state (i.e. V O > V).. Common mode transient immunity in a low state is the maximum tolerable dv CM /dt of the common mode pulse, V CM, to assure that the output will remain in a low state (i.e. V O <.V).. In accordance with UL 77, each optocoupler is proof tested by applying an insulation test voltage > Vrms, Hz for second (leakage detection current limit I I-O < µa).. Device considered a two-terminal device: pins on input side shorted together and pins on output side shorted together. FOD Rev...9 7

8 Typical Performance Curves (VOH - VDD) HIGH OUTPUT VOLTAGE DROP (V) Fig. Output High Voltage Drop vs. Output High Current. IOH OUTPUT HIGH CURRENT (A) I OH OUTPUT HIGH CURRENT (A) Fig. Output High Current vs. Ambient Temperature Frequency = Hz Duty Cycle =.% I F = ma to ma V DD = V to V T A = C V O = V V O = V Frequency = Hz Duty Cycle =.% I F = ma to ma V DD = V to V V SS = V T A = - C T A = C - - T A AMBIENT TEMPERATURE ( C) (VOH - VDD) HIGH OUTPUT VOLTAGE DROP (V) Fig. Output High Voltage Drop vs. Ambient Temperature V DD = V to V V SS = V I F = ma to ma I O = -ma IOH OUTPUT HIGH CURRENT (A) T A AMBIENT TEMPERATURE ( C) Fig. Output High Current vs. Ambient Temperature Frequency = Hz Duty Cycle =.% I F = ma to ma V DD = V to V V O = V V O = V - - T A AMBIENT TEMPERATURE ( C) VOL OUTPUT LOW VOLTAGE (V) Fig. Output Low Voltage vs. Output Low Current Frequency = Hz Duty Cycle = 99.9% V F (off) =.V V DD = V to V V SS = V T A = C T A = - C T A = C VOL OUTPUT LOW VOLTAGE (V) Fig. Output Low Voltage vs. Ambient Temperature V DD = V to V V SS = V V F = -V to.v I O = ma..... I OL OUTPUT LOW CURRENT (A) - - T A AMBIENT TEMPERATURE ( C) FOD Rev...9

9 Typical Performance Curves (Continued) IDD SUPPLY CURRENT (ma) IFLH LOW-to-HIGH INPUT CURRENT THRESHOLD (ma) IOL OUTPUT LOW CURRENT (A) Fig. 7 Output Low Current vs. Ambient Temperature Frequency = Hz Duty Cycle = 99.% V F =.V V DD = V to V V O = V V O = V - - T A AMBIENT TEMPERATURE ( C) Fig. 9 Supply Current vs. Ambient Temperature V DD = V to V V SS = V I F = ma (for I DDL ) I F = ma (for I DDH ) I DDH (V) I DDL (V) I DDH (V) I DDL (V) T A AMBIENT TEMPERATURE ( C) Fig. Low-to-High Input Current Threshold vs. Ambient Temperature V DD = V to V V SS = V Output = Open. - - T A AMBIENT TEMPERATURE ( C) IOL OUTPUT LOW CURRENT (A) IDD SUPPLY CURRENT (ma) tp PROPAGATION DELAY (ns) Fig. Output Low Current vs. Ambient Temperature Frequency = Hz Duty Cycle = 99.% V F =.V V DD = V to V V O = V V O = V T A AMBIENT TEMPERATURE ( C) Fig. Supply Current vs. Supply Voltage I F = ma (for I DDL ) I F = ma (for I DDH ) V SS = V T A = C I DDH I DDL. V DD SUPPLY VOLTAGE (V) Fig. Propagation Delay vs. Supply Voltage I F = ma to ma T A = C R G = Ω C G = nf Duty Cycle = % Frequency = khz t PHL t PLH 7 V DD SUPPLY VOLTAGE (V) FOD Rev...9 9

10 Typical Performance Curves (Continued) tp PROPAGATION DELAY (ns) tp PROPAGATION DELAY (ns) Fig. Propagation Delay vs. LED Forward Current V DD = V to V T A = C R G = Ω C G = nf Duty Cycle = % Frequency = khz t PHL t PLH I F FORWARD LED CURRENT (ma) Fig. Propagation Delay vs. Series Load Resistance I F = ma to ma V DD = V to V C G = nf Duty Cycle = % Frequency = khz t PHL t PLH R G SERIES LOAD RESISTANCE (Ω) tp PROPAGATION DELAY (ns) tp PROPAGATION DELAY (ns) Fig. Propagation Delay vs. Ambient Temperature I F = ma to ma V DD = V to V R G = Ω C G = nf Duty Cycle = % Frequency = khz - - T A AMBIENT TEMPERATURE ( C) Fig. Propagation Delay vs. Series Load Capacitance I F = ma to ma V DD = V to V R G = Ω Duty Cycle = % Frequency = khz t PHL t PLH t PHL t PLH C G SERIES LOAD CAPACITANCE (nf) VO OUTPUT VOLTAGE (V) V DD = V T A = C Fig. 7 Transfer Characteristics IF FORWARE CURRENT (ma) Fig. Input Forward Current vs. Forward Voltage.. T A = C C - C I F FORWARD LED CURRENT (ma) V R FORWARE VOLTAGE (V) FOD Rev...9

11 Typical Performance Curves (Continued) VO OUTPUT VOLTAGE (V) Fig. 9 Under Voltage Lockout (.V) (7.) (V DD V SS ) SUPPLY VOLTAGE (V) FOD Rev...9

12 Test Circuit Pulse Generator PW =.99ms Period = ms R OUT = Ω Test Conditions: Frequency = Hz Duty Cycle = 99.% V DD = V to V V SS = V V F(OFF) = -.V to.v Pulse Generator PW = µs Period = ms R OUT = Ω Pulse-In LED-IFmon Pulse-In LED-IFmon R Ω R Ω R Ω R Ω Figure. I OL Test Circuit 7 7 V OL V OH Ioh C.µF Iol D C.µF D Current Probe C 7µF C.µF To Scope C 7µF C.µF To Scope C 7µF C 7µF Power Supply V DD = V to V Power Supply V = V Power Supply V DD = V to V Power Supply V = V Test Conditions: Frequency = Hz Duty Cycle =.% V DD = V to V V SS = V I F = ma to ma Figure. I OH Test Circuit FOD Rev...9

13 Test Circuit (Continued) I F = to ma 7.µF V O ma Figure. V OH Test Circuit 7.µF Figure. V OL Test Circuit ma V O V DD = to V V DD = to V FOD Rev...9

14 Test Circuit (Continued) I F = to ma V F = -. to.v 7.µF Figure. I DDH Test Circuit 7.µF Figure. I DDL Test Circuit V O V O V DD = V V DD = V FOD Rev...9

15 Test Circuit (Continued) IF V F =. to.v I F = ma 7.µF V O > V Figure. I FLH Test Circuit 7.µF Figure 7. V FHL Test Circuit V O 7.µF V O = V V DD = to V V DD = to V V or V V DD Ramp Figure. UVLO Test Circuit FOD Rev...9

16 Test Circuit (Continued) F = khz DC = % V Probe I F V OUT I F Ω t PLH Figure 9. t PHL, t PLH, t r and t f Test Circuit and Waveforms A B t r 7 7 t PHL.µF t f.µf V O Rg = Ω Cg = nf 9% % % V O V DD = to V V DD = V V CM =,V V CM V t V O V OH Switch at A: I F = ma V O V OL Switch at B: I F = ma Figure. CMR Test Circuit and Waveforms FOD Rev...9

17 Package Dimensions Through Hole... MAX Pin..9.. (.7)... BSC 7. TYP Surface Mount." Lead Spacing (Option S). MAX..9. MIN Pin..7 (.7) (.) (7.9) (.) (.7)." Lead Spacing (Option T) MAX... BSC Pin..7. MIN..9 (.) Recommended Land Pattern (Option S).. (.7). MAX. TYP... MIN. BSC (.7) (..). MIN Both sides. MIN. MAX Note:. All dimensions are in millimeters.. Dimensions are exclusive of burrs, mold fash, and tie bar extrusion. Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor s online packaging area for the most recent package drawings: FOD Rev...9 7

18 Package Dimensions (Continued) Surface Mount." Lead Spacing (Option TS). MAX MIN. TYP ø. TYP (.7) Note:. All dimensions are in millimeters.. Dimensions are exclusive of burrs, mold fash, and tie bar extrusion. Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor s online packaging area for the most recent package drawings: (.7) (.) (9.9) (.) (.7) (.) Recommended Land Pattern (Option S) 7. TYP. MIN Both sides.. MAX.. FOD Rev...9

19 Ordering Information Part Number Package Packing Method FOD DIP -Pin Tube ( units per tube) FODS SMT -Pin (Lead Bend) Tube ( units per tube) FODSD SMT -Pin (Lead Bend) Tape and Reel (, units per reel) FODV DIP -Pin, IEC77-- option Tube ( units per tube) FODSV SMT -Pin (Lead Bend), DIN EN/IEC 77-- option Tube ( units per tube) FODSDV SMT -Pin (Lead Bend), DIN EN/IEC 77-- option Tape and Reel (, units per reel) FODTV DIP -Pin,. Lead Spacing, DIN EN/IEC 77-- option Tube ( units per tube) FODTSV SMT -Pin,. Lead Spacing, DIN EN/IEC 77-- option Tube ( units per tube) FODTSR SMT -Pin,. Lead Spacing Tape and Reel (7 units per reel) FODTSRV SMT -Pin,. Lead Spacing, DIN EN/IEC 77-- option Tape and Reel (7 units per reel) Marking Information V XX YY B Definitions Fairchild logo Device number VDE mark (Note: Only appears on parts ordered with DIN EN/IEC 77-- option See order entry table) Two digit year code, e.g., Two digit work week ranging from to Assembly package code FOD Rev...9 9

20 Carrier Tape Specifications Option S D P P t K E F A W W B d User Direction of Feed P D Symbol Description Dimension in mm W Tape Width. ±. t Tape Thickness. ±. P Sprocket Hole Pitch. ±. D Sprocket Hole Diameter. ±. E Sprocket Hole Location.7 ±. F Pocket Location 7. ±. P. ±. P Pocket Pitch. ±. A Pocket Dimensions. ±. B. ±. K.9 ±. W Cover Tape Width. ±. d Cover Tape Thickness. max Max. Component Rotation or Tilt R Min. Bending Radius FOD Rev...9

21 Carrier Tape Specifications Option TS D P P t K E F A W W B d User Direction of Feed P D Symbol Description Dimension in mm W Tape Width. ±. t Tape Thickness. ±. P Sprocket Hole Pitch. ±. D Sprocket Hole Diameter. ±. E Sprocket Hole Location.7 ±. F Pocket Location. ±. P. ±. P Pocket Pitch. ±. A Pocket Dimensions. ±. B. ±. K.7 ±. W Cover Tape Width. ±. d Cover Tape Thickness. max Max. Component Rotation or Tilt R Min. Bending Radius FOD Rev...9

22 Reflow Profile Temperature ( C) TP TL Tsmax Tsmin Max. Ramp-up Rate = C/S Max. Ramp-down Rate = C/S Preheat Area Time C to Peak Time (seconds) Profile Freature Pb-Free Assembly Profile Temperature Min. (Tsmin) C Temperature Max. (Tsmax) C Time (t S ) from (Tsmin to Tsmax) seconds Ramp-up Rate (t L to t P ) C/second max. Liquidous Temperature (T L ) 7 C Time (t L ) Maintained Above (T L ) seconds Peak Body Package Temperature C C / C Time (t P ) within C of C seconds Ramp-down Rate (T P to T L ) C/second max. ts tl tp Time C to Peak Temperature minutes max. FOD Rev...9

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