High-Bandwidth, Low Voltage, Dual SPDT Analog Switches

Transcription

1 DG9E High-Bandwidth, Low Voltage, Dual SPDT Analog Switches DESCRIPTION The DG9E is monolithic CMOS dual single-pole / double-throw (SPDT) analog switches. It is specifically designed for low-voltage, high bandwidth applications. The DG9E on-resistance, matching and flatness are guaranteed over the entire analog voltage range. Wide dynamic performance is achieved with typical at - db for both cross-talk and off-isolation at MHz. Both SPDT s operate with independent control logic, conduct equally well in both directions and block signals up to the power supply level when off. Break-before-make is guaranteed. With fast switching speeds, low on-resistance, high bandwidth, and low charge injection, the DG9E are ideally suited for audio and video switching with high linearity. Built on s low voltage CMOS technology, the DG9E contain an epitaxial layer which prevents latch-up FEATURES Single supply (.8 V to. V) Low on-resistance - R ON :. Crosstalk and off isolation: - db at MHz MSOP- and DFN- package Material categorization: for definitions of compliance please see BENEFITS FUNCTIONAL BLOCK DIAGRAM AND P CONFIGURATION Reduced power consumption High accuracy Reduce board space Low-voltage logic compatible High bandwidth APPLICATIONS Cellular phones Speaker headset switching Audio and video signal routing PCMCIA cards Low-voltage data acquisition ATE NO 9 8 NO 4 7 EN Top view NC NC TRUTH TABLE LOGIC EN NC and NC NO and NO ON OFF OFF ON OFF OFF OFF OFF ORDERG FORMATION TEMP. RANGE PACKAGE PART NUMBER -4 C to +8 C MSOP- DG9EDQ-T-GE DFN- DG9EDN-T-GE4 ABSOLUTE MAXIMUM RATGS PARAMETER LIMIT UNIT Reference to -. to +,, NC, NO a -. to ( +.) V Continuous current (any terminal) ± Peak current (pulsed at ms, % duty cycle) ± ma Storage temperature (D suffix) - to + C Power dissipation (packages) b MSOP- c DFN- d 9 mw ESD / HBM EIA / JESD-A4-A 7.k ESD / CDM EIA / JESD-C-A.k V Latch up JESD78 ma Notes a. Signals on NC, NO,,, or EN exceeding will be clamped by internal diodes. Limit forward diode current to maximum current ratings b. All leads welded or soldered to PC board c. Derate 4 mw/ C above 7 C d. Derate 4.9 mw/ C above 7 C S7-4-Rev. A, -Apr-7 Document Number: 789 THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HERE AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT

2 DG9E SPECIFICATIONS ( = V) PARAMETER SYMBOL TEST CONDITIONS TEMP. OTHERWISE UNLESS SPECIFIED = V, ± %, V /ENL =.4 V, V /ENH =. V e a LIMITS -4 C to +8 C UNIT M. c TYP. b MAX. c Analog Switch Analog signal range d V ANALOG Full - V Room - 7 =.8 V, V NC/NO =.4 V /, I NC/NO = 8 ma Full - - Drain-source on-resistance R DS(on) Room =.7 V, V =.8 V /.8 V, I = ma Full - -. Room -.. On-resistance matching R DS(on) =.7 V, V =.8 V /.4 V /.8 V, Full - -. On-resistance flatness d, f R flat(on) I = ma Room -.. Full - -. Off leakage current g I NC/NO(off) =. V, V NC/NO = V /. V, Room Full off leakage current g I (off) V =. V / V, V EN = V Room -. Full - - na Channel-on leakage Room -. current g I (on) =. V, V = V NC/NO = V /. V Full - - Digital Control Input current d I L or I H Full - - μa Input high voltage d V H Full. - - Input low voltage d V L Full V Digital input capacitance d C Room - - pf Dynamic Characteristics Turn-on time t ON Room - 4 Full - - Room - Turn-off time t OFF V NC/NO = V, C L = pf, R L = Full ns Break-before-make time d Room - t BBM Full - - Charge injection d Q J C L = nf, V gen =. V, R gen = Room pc Bandwidth d BW C L = pf (set up capacitance) Room - - MHz Off-isolation d OIRR R L =, C L = pf f = MHz Room f = MHz Room Channel-to-channel crosstalk d X TALK R L =, C L = pf f = MHz Room f = MHz Room db NO, NC Off capacitance d C NO(off) Room C NC(off) Room =.7 V, f = MHz Channel-on capacitance d C NO(on) Room C NC(on) Room pf Power Supply Power supply range.7 -. V Power supply current d I+ =.7 V, V = V or.7 V Full - - μa Notes a. Room = C, Full = as determined by the operating suffix b. Typical values are for design aid only, not guaranteed nor subject to production testing c. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this datasheet d. Guarantee by design, not subjected to production test e. V = voltage to perform proper function f. Crosstalk measured between channels g. Guarantee by V testing S7-4-Rev. A, -Apr-7 Document Number: 789 THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HERE AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT

3 DG9E SPECIFICATIONS ( = V) PARAMETER SYMBOL TEST CONDITIONS OTHERWISE UNLESS SPECIFIED = V, ± %, V /ENL =. V, V /ENH = V e Notes a. Room = C, Full = as determined by the operating suffix b. Typical values are for design aid only, not guaranteed nor subject to production testing c. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this datasheet d. Guarantee by design, not subjected to production test e. V = input voltage to perform proper function f. Difference of min and max values g. Guaranteed by V testing. Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. S7-4-Rev. A, -Apr-7 Document Number: 789 THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HERE AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT TEMP. a LIMITS -4 C to +8 C M. c TYP. b MAX. c Analog Switch Analog signal ranged V ANALOG Full - V Drain-source on-resistance R DS(on) = 4. V, V =.8 V /. V; I = ma Room -.. Full On-resistance matching R DS(on) Room -..4 = 4. V, V =.8 V /. V /. V, Full - -. On-resistance flatness d, f R flat(on) I = ma Room -. Full - -. Off leakage current g I NC/NO(off) =. V, V NC/NO = V / 4. V, Room Full off leakage current g I (off) V = 4. V / V, V EN = V Room -. Full - - na Channel-on leakage current g I (on) =. V, V = V NC/NO = V / 4. V Room -. Full - - Power down leakage d I PD = V, V NC/NO =. V,, open Full -. ma = V, V =. V, NC/NO open Full -. μa Digital Control Input current d I L or I H Full - - μa Input high voltage d V H Full - - Input low voltage d V L Full - -. V Digital input capacitance d C Room - - pf Dynamic Characteristics Turn-on time t ON Room Full Room - 7 Turn-off time t OFF V NC/NO = V, C L = pf, R L = Full - - ns Break-before-make time d Room 8 - t BBM Full - - Propagation delay d tpd = V, no R L Room - - ps Charge injection d Q J C L = nf, V gen =. V, R gen = Room pc Bandwidth d BW C L = pf (set up capacitance) Room MHz Off-isolation d f = MHz Room OIRR R L =, C L = pf f = MHz Room Channel-to-channel f = MHz Room crosstalk d X TALK R L =, C L = pf f = MHz Room db NO, NC Off capacitance d C NO(off) Room C NC(off) Room = V, f = MHz Channel-On capacitance d C NO(on) Room C NC(on) Room pf Power Supply Power supply range V Power supply current d I+ =. V, V = V or. V Full - - μa UNIT

4 DG9E TYPICAL CHARACTERISTICS (T A = C, unless otherwise noted) 8 = +.8 V I S = ma 9 V /EN = R ON - On-Resistance (Ω) = +.7 V = + V = +4. V I+ - Supply Current (na) = +. V = + V 4 V - Analog Voltage (V) = +.7 V Temperature ( C) R ON vs. V and Single Supply Voltage Supply Current vs. Temperature R ON - On-Resistance (Ω) 7 4 = +.7 V I S = ma +8 C -4 C + C... V - Analog Voltage (V) I+ - Supply Current (μa).... = + V = +.7 V. K K M M V /EN Switching Frequency (Hz) R ON vs. Analog Voltage and Temperature Positive Supply Current vs. Switching Frequency 4 R ON - On-Resistance (Ω) = +4. V I S = ma +8 C -4 C + C V - Analog Voltage (V) t ON(EN), t OFF(EN) - Switching Time (ns) = + V, t ON = + V, t ON = + V, t OFF = + V, t OFF Temperature ( C) R ON vs. Analog Voltage and Temperature Switching Time vs. Temperature S7-4-Rev. A, -Apr-7 4 Document Number: 789 THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HERE AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT

5 DG9E TYPICAL CHARACTERISTICS (T A = C, unless otherwise noted) t BBM - Switching Time (ns) = + V = + V Leakage Current (pa) I (OFF),V = V, V NC/NO = 4. V I (OFF),V = 4. V, V NC/NO = V I (ON),V /NC/NO = 4. V I NC/NO(OFF),V = 4. V, V NC/NO = V I NC/NO(OFF),V = V, V NC/NO = 4. V I (ON),V /NC/NO = V Temperature ( C) = +. V Temperature ( C) Switching Time vs. Temperature Leakage Current vs. Temperature V T - Switching Threshold (V) C to +8 C V IH =-4 C V IL = 8 C 4 - Supply Voltage (V) Switching Threshold vs. Supply Voltage Leakage Current (pa) I (OFF),V =. V, V NC/NO = V I (ON),V /NC/NO =. V I NC/NO(OFF),V = V, V NC/NO =. V I (OFF),V = V, V NC/NO =. V I (ON),V /NC/NO = V I NC/NO(OFF),V =. V, V NC/NO = V = +. V Temperature ( C) Leakage Current vs. Temperature Q J - Charge Injection (pc) =.8 V = V = V Leakage Current (pa) I NC/NO(off) I (on) I (off) = +. V V S - Analog Voltage (V) -4 4 V D - Analog Voltage (V) Charge Injection vs. Source Voltage Leakage Current vs. Analog Voltage S7-4-Rev. A, -Apr-7 Document Number: 789 THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HERE AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT

6 DG9E TYPICAL CHARACTERISTICS (T A = C, unless otherwise noted) Loss Loss, OIRR, X TALK (db) X TALK OIRR I+ - Supply Current (μa). =.7 V = V - = + V -7 K M M M G Frequency (Hz) V /EN (V) Loss, OIRR, X TALK vs. Frequency Positive Supply Current vs. Logic Voltage TEST CIRCUITS Logic Input Switch Input NO or NC V Switch Output R L V OUT C L pf Logic Input Switch Output V H V L V t ON % t r < ns t f < ns.9 x V OUT t OFF C L (includes fixture and stray capacitance) R V OUT = V L R L + R ON Logic "" = Switch On Logic input waveforms inverted for switches that have the opposite logic sense. Fig. - Switching Time Logic Input V H t r < ns t f < ns V NO NO V O V L V NC NC R L C L pf V NC = V NO V O 9 % Switch Output V t D t D C L (includes fixture and stray capacitance) Fig. - Break-Before-Make Interval S7-4-Rev. A, -Apr-7 Document Number: 789 THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HERE AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT

7 DG9E TEST CIRCUITS V gen + R gen V = - NC or NO V OUT C L = nf V OUT On V OUT Off On Q = V OUT x C L Fig. - Charge Injection depends on switch configuration: input polarity determined by sense of switch. nf nf NC or NO Analyzer R L V Off Isolation = log V NO/ NC V,.4 V V,.4 V NC or NO Meter HP49A Impedance Analyzer or Equivalent f = MHz Fig. 4 - Off-Isolation Fig. - Channel Off/On Capacitance NC, NO, Sx A. V + -. V A + - NC, NO, Sx Fig. - Source / Drain Power Down Leakage maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package / tape drawings, part marking, and reliability data, see S7-4-Rev. A, -Apr-7 7 Document Number: 789 THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HERE AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT

8 Package Information MSOP: LEADS JEDEC Part Number: MO-87, (Variation AA and BA) (N/) Tips) N N- A B C X. E..48 Max Detail B (Scale: /) Dambar Protrusion.. N/ Top View b.8 M C B S A S 7 b e See Detail B e A With Plating c c. BSC Parting Line L 4 Detail A (Scale: /) NOTES:. Die thickness allowable is..7.. Dimensioning and tolerances per ANSI.Y4.M Dimensions D and E do not include mold flash or protrusions, and are measured at Datum plane -H-, mold flash or protrusions shall not exceed. mm per side. 4. Dimension is the length of terminal for soldering to a substrate.. Terminal positions are shown for reference only.. Formed leads shall be planar with respect to one another within. mm at seating plane. 7. The lead width dimension does not include Dambar protrusion. Allowable Dambar protrusion shall be.8 mm total in excess of the lead width dimension at maximum material condition. Dambar cannot be located on the lower radius or the lead foot. Minimum space between protrusions and an adjacent lead to be.4 mm. See detail B and Section C-C. 8. Section C-C to be determined at. mm to. mm from the lead tip. 9. Controlling dimension: millimeters. D Side View.9. This part is compliant with JEDEC registration MO-87, variation AA and BA.. Datums -A- and -B- to be determined Datum plane -H-.. Exposed pad area in bottom side is the same as teh leadframe pad size. A.7 R. Min Places Seating Plane. C Seating Plane Base Metal See Detail A A. S Section C-C Scale: / (See Note 8) ς E End View N = L MILLIMETERS Dim Min Nom Max Note A - -. A... A b b c. -. c...8 D. BSC E 4.9 BSC E.9.. e. BSC e. BSC L N 4 ECN: T-8 Rev. C, -Jul- DWG: 87 C C -H- -A- -C- -B- Document Number: 74 -Jul-

9 Package Information DFN- LEAD ( X ) e D Terminal Tip NXb D/. M C A B Index Area D/E/ E/ NXL E Exposed Pad. C x ÉÉÉÉ ÉÉÉÉ ÉÉÉÉ E D BOTTOM VIEW Index Area D/E/. C x TOP VIEW //. C 4 NX.8 C A A A SEATG PLANE SIDE VIEW NOTES:. All dimensions are in millimeters and inches.. N is the total number of terminals.. Dimension b applies to metallized terminal and is measured between. and. mm from terminal tip. 4. Coplanarity applies to the exposed heat sink slug as well as the terminal.. The pin # identifier may be either a mold or marked feature, it must be located within the zone iindicated. MILLIMETERS CHES Dim Min Nom Max Min Nom Max A A A. BSC.8 BSC b D. BSC.8 BSC D E. BSC.8 BSC E e. BSC. BSC L *Use millimeters as the primary measurement. ECN: S-44 Rev. A, 9-Nov-4 DWG: 94 Document Number: 78 9-Nov-4

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