CDC341 1-LINE TO 8-LINE CLOCK DRIVER
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1 CDC34 -LINE TO 8-LINE CLOCK DRIVER SCS333D DECEMBER 99 REVISED OCTOBER 998 Low Output Skew, Low Pulse Skew for Clock-Distribution and Clock-Generation pplications TTL-Compatible Inputs and Outputs Distributes One Clock Input to Eight Outputs Distributed V CC and Ground Pins Reduce Switching Noise High-Drive Outputs ( 48-m I OH, 48-m I OL ) State-of-the-rt EPIC-ΙΙB BiCMOS Design Significantly Reduces Power Dissipation Packaging Options Include Plastic Small-Outline (DW) Packages V CC G G P0 P V CC Y4 Y3 GND DW PCKGE (TOP VIEW) V CC Y Y GND Y3 Y4 GND Y Y GND description The CDC34 is a high-performance clock-driver circuit that distributes one () input signal to eight (Y) outputs with minimum skew for clock distribution. Through the use of the control pins (G and G), the outputs can be placed in a low state regardless of the input. The propagation delays are adjusted at the factory using the P0 and P pins. These pins are not intended for customer use and should be strapped to GND. The CDC34 is characterized for operation from 0 C to 70 C. FUNCTION TBLE INPUTS OUTPUTS G G Y Y4 Y Y4 X X L L L L L H L L L H H L H H L H H L H H H H H Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. EPIC-ΙΙΒ is a trademark of Texas Instruments Incorporated. PRODUCTION DT information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright 998, Texas Instruments Incorporated POST OFFICE BOX DLLS, TEXS 7565
2 CDC34 -LINE TO 8-LINE CLOCK DRIVER SCS333D DECEMBER 99 REVISED OCTOBER 998 logic symbol G G 3 G G Y Y Y3 Y4 Y Y Y3 Y4 This symbol is in accordance with NSI/IEEE Std and IEC Publication 67-. logic diagram (positive logic) G 9 Y G 3 8 Y 6 Y3 5 Y4 4 3 Y Y 9 Y3 8 Y4 POST OFFICE BOX DLLS, TEXS 7565
3 CDC34 -LINE TO 8-LINE CLOCK DRIVER SCS333D DECEMBER 99 REVISED OCTOBER 998 absolute maximum ratings over operating free-air temperature range (unless otherwise noted) Supply voltage range, V CC V to 7 V Input voltage range, V I (see Note ) V to 7 V Voltage range applied to any output in the high state or power-off state, V O (see Note ) V to V CC V Current into any output in the low state, I O m Input clamp current, I IK (V I < 0) m Maximum power dissipation at T = 55 C (in still air) (see Note ) W Storage temperature range, T stg C to 50 C Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES:. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.. The maximum package power dissipation is calculated using a junction temperature of 50 C and a board trace length of 750 mils. For more information, refer to the Package Thermal Considerations application note in the BT dvanced BiCMOS Technology Data Book, literature number SCBD00. recommended operating conditions (see Note 3) MIN MX UNIT VCC Supply voltage V VIH High-level input voltage V VIL Low-level input voltage 0.8 V VI Input voltage 0 VCC V IOH High-level output current 48 m IOL Low-level output current 48 m fclock Input clock frequency One output bank loaded 80 Both output banks loaded 40 T Operating free-air temperature 0 70 C NOTE 3: Unused pins (input or I/O) must be held high or low. MHz POST OFFICE BOX DLLS, TEXS
4 CDC34 -LINE TO 8-LINE CLOCK DRIVER SCS333D DECEMBER 99 REVISED OCTOBER 998 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PRMETER TEST CONDITIONS T = 5 C MIN TYP MX MIN MX UNIT VIK VCC = 4.75 V, II = 8 m.. V VCC = 4.75 V, IOH = 3 m.5.5 VOH VCC = 5 V, IOH = 3 m 3 3 V VCC = 4.75 V, IOH = 48 m VOL VCC = 4.75 V, IOL = 48 m 0.5 V II VCC = 5.5 V, VI = VCC or GND ± ± µ IO VCC = 5.5 V, VO =.5 V m ICC VCC = 5.5 V, IO O = 0, Outputs high 3.5 VI = VCC or GND Outputs low 4 33 Ci VI =.5 V or 0.5 V 3 pf ll typical values are at VCC = 5 V. Not more than one output should be tested at a time, and the duration of the test should not exceed one second. switching characteristics, C L = 50 pf (see Figures and ) PRMETER FROM (INPUT) TO (OUTPUT) VCC = 5 V, T = 5 C VCC = 4.75 V to 5.5 V, T = 0 C to 70 C MIN TYP MX MIN MX tplh Y tphl tplh G Y tphl tsk(o) tsk(p) Y ns tsk(pr) tr Y.5 ns tf Y.5 ns m UNIT ns ns t pd performance information relative to V CC and temperature variation (see Note 4) DtPLH(T) Temperature drift of tplh from 0 C to 70 C 4 ps / 0 C DtPHL(T) Temperature drift of tphl from 0 C to 70 C 5 ps / 0 C DtPLH(VCC) VCC drift of tplh from 4.75 V to 5.5 V 8 ps / 00 mv DtPHL(VCC) VCC drift of tphl from 4.75 V to 5.5 V 0 ps / 00 mv Virtually independent of VCC Virtually independent of temperature NOTE 4: The data extracted is from a wide range of characterization material. 4 POST OFFICE BOX DLLS, TEXS 7565
5 CDC34 -LINE TO 8-LINE CLOCK DRIVER PRMETER MESUREMENT INFORMTION From Output Under Test SCS333D DECEMBER 99 REVISED OCTOBER 998 CL = 50 pf (see Note ) 500 Ω LOD CIRCUIT Input (see Note B).5 V.5 V 3 V 0 V tplh tphl Output.5 V V.5 V 0.8 V 0.8 V tr tf VOH VOL VOLTGE WVEFORMS PROPGTION DELY TIMES NOTES:. CL includes probe and jig capacitance. B. ll input pulses are supplied by generators having the following characteristics: PRR 0 MHz, ZO = 50 Ω, tr.5 ns, tf.5 ns. Figure. Load Circuit and Voltage Waveforms G G Yn tplh tphl Yn tplh tphl NOTES:. Output skew, tsk(o), is calculated as the greater of: The difference between the fastest and slowest of tplhn (n =, ) The difference between the fastest and slowest of tphln (n =, ) B. Pulse skew, tsk(p), is calculated as the greater of tplhn tphln (n =, ). C. Process skew, tsk(pr), is calculated as the greater of: The difference between the fastest and slowest of tplhn (n =, ) across multiple devices under identical operating conditions The difference between the fastest and slowest of tphln (n =, ) across multiple devices under identical operating conditions Figure. Waveforms for Calculation of t sk(o), t sk(p), t sk(pr) POST OFFICE BOX DLLS, TEXS
6 CDC34 -LINE TO 8-LINE CLOCK DRIVER SCS333D DECEMBER 99 REVISED OCTOBER 998 DW (R-PDSO-G**) 6 PIN SHOWN MECHNICL INFORMTION PLSTIC SMLL-OUTLINE PCKGE (,7) 0.00 (0,5) 0.04 (0,35) 0.00 (0,5) M (0,65) (0,5) 0.99 (7,59) 0.93 (7,45) 0.00 (0,5) NOM Gage Plane (0,5) (,7) 0.06 (0,40) 0.04 (,65) MX 0.0 (0,30) (0,0) Seating Plane (0,0) DIM PINS ** MX 0.40 (0,4) 0.50 (,95) 0.60 (5,49) MIN (0,6) (,70) (5,4) / D 0/98 NOTES:. ll linear dimensions are in inches (millimeters). B. This drawing is subject to change without notice. C. Body dimensions do not include mold flash or protrusion not to exceed (0,5). D. Falls within JEDEC MS-03 6 POST OFFICE BOX DLLS, TEXS 7565
7 PCKGE OPTION DDENDUM 4-Oct-008 PCKGING INFORMTION Orderable Device Status () Package Type Package Drawing Pins Package Qty Eco Plan () Lead/Ball Finish MSL Peak Temp (3) CDC34DBLE OBSOLETE SSOP DB 0 TBD Call TI Call TI CDC34DW CTIVE SOIC DW 0 5 Green (RoHS & no Sb/Br) CDC34DWG4 CTIVE SOIC DW 0 5 Green (RoHS & no Sb/Br) CDC34DWR CTIVE SOIC DW Green (RoHS & no Sb/Br) CDC34DWRG4 CTIVE SOIC DW Green (RoHS & no Sb/Br) CU NIPDU CU NIPDU CU NIPDU CU NIPDU CDC34NSR OBSOLETE SO NS 0 TBD Call TI Call TI CDC34NSRG4 OBSOLETE SO NS 0 TBD Call TI Call TI Level--60C-UNLIM Level--60C-UNLIM Level--60C-UNLIM Level--60C-UNLIM () The marketing status values are defined as follows: CTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. () Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either ) lead-based flip-chip solder bumps used between the die and package, or ) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and ntimony (Sb) based flame retardants (Br or Sb do not exceed 0.% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. ddendum-page
8 PCKGE MTERILS INFORMTION -Mar-008 TPE ND REEL INFORMTION *ll dimensions are nominal Device Package Type Package Drawing Pins SPQ Reel Reel Diameter Width (mm) W (mm) 0 (mm) B0 (mm) K0 (mm) P (mm) CDC34DWR SOIC DW Q W (mm) Pin Quadrant Pack Materials-Page
9 PCKGE MTERILS INFORMTION -Mar-008 *ll dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) CDC34DWR SOIC DW Pack Materials-Page
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