Wideband Plasmonic Slot-Silicon Wire Coupling. Benedict Lau

Transcription

1 Wideband Plasmonic Slot-Silicon Wire Coupling by Benedict Lau A thesis submitted in conformity with the requirements for the degree of Master of Applied Science Graduate Department of Electrical and Computer Engineering University of Toronto Copyright c 2010 by Benedict Lau

2 Abstract Wideband Plasmonic Slot-Silicon Wire Coupling Benedict Lau Master of Applied Science Graduate Department of Electrical and Computer Engineering University of Toronto 2010 An SOI-based platform designed for wideband coupling of light from optical fibers to a 50 nm wide plasmonic slot waveguide is described in this thesis. The device is based on a newly proposed orthogonal junction with coupling efficiencies above 70% near the telecom wavelength. To construct the coupling platform, two such junctions are utilized for input and output, where Si wires are place 90 with respect to each of the two ends of a plasmonic section. Analytic studies and FDTD simulations have demonstrated attractive properties such as a smooth micron-wide transmission spectrum that can be spectrally shifted with the design parameters, and the natural phase-matching between the dielectric and plasmonic sections consequent of the waveguide orientations. Fabrication procedures and proof-of-concept characterization work are also presented. The experimentally-tested platform with its unique features would enable applications in on-chip sensing and plasmonic slot-based waveguiding at the 50 nm scale. ii

3 To my good friend, Phileas. iii

4 Acknowledgements First of all, I would like to thank my supervisor, Professor Amr Helmy, for his guidance throughout my M.A.Sc. project, as well as the invaluable input from the thesis review committee. This project would also be impossible without the help of Aju Jugessur, Henry Lee, Edward Xu and Yimin Zhou at the Emerging Communications Technology Institute, Battista Calviera and Steven Doyle at the Faculty of Medicine Microscopy Imaging Laboratory, and Todd Simpson at the University of Western Ontario Nanofabrication Facility. A special thank you to my colleague, Mohamed Swillam, who contributed some of the analytical models presented in this thesis. I am indebted to many other colleagues who contributed their time and experience at various stages of this project: Bhavin, James, Junbo, Michelle, Payam, and Sean, amongst others. Last but not least, a big thank you for the continued support from my parents, Mandy and Joe, my brother, Anselm, and my girlfriend, Evelyn. iv

5 Contents 1 Introduction The Interconnect Problem Photonics, Plasmonics and Nanotechnology Thesis Objective and Scope Thesis Outline Literature Review Light, Surface Plasmon Polaritons and Spatial Dimensions Plasmonic Waveguide Designs D Designs D Designs Coupling Schemes Potential of the Plasmonic Slot Waveguide Coupler Design The Plasmonic Slot Mode Silicon Wire Coupling Orthogonal Configuration Glass Prism vs. Silicon Wire Analytical Theory for Orthogonal Coupling Conceptual Design of the Coupling Platform v

6 3.4 Plan for a Prototype Finite-Difference Time-Domain Simulations Computational Domain Setup The Orthogonal Junction and Effects of Silicon Wire Widths The Orthogonal Coupling Platform and Resonance Effects High-index Plasmonic Slots Fabrication of the Orthogonal Coupling Platform Substrate and Fabrication Process Overview Patterning with Electron Beam Lithography Pattern Design Coating and Patterning the Electron Resist Marker System for Alignment of Layers Suggestions for Future Optimizations Etching Silicon Wire Waveguides Silicon Etching Recipe Optimization Compensation for Undercut and Slanted Sidewalls Suggestions for Future Optimizations Metal Deposition and the Lift-off Process Metal Evaporation Lift-off Ag Particles Scattered Across Sample Surface Suggestions for Future Optimizations Focused Ion Beam Milling of Plasmonic Slots Testing for Fabrication Limits Plasmonic Slot Milling Process Final Device with Plasmonic Slot Waveguides vi

7 5.6 Post-Processing for Optical Characterization Optical Characterization Optical Characterization Setup Imaging the Mode Profile Power Measurements Fabry-Perot Loss Measurements Summary and Conclusion Summary Suggestions for Future Steps and Potential Applications A Sample Lumerical Script 105 B Device Fabrication Recipe 109 B.1 Layer I: Au Alignment Markers B.1.1 ZEP Spin Coating and Patterning B.1.2 Au Deposition and Lift-off B.2 Layer II: Silicon Wires B.2.1 ZEP Spin Coating and Patterning B.2.2 Silicon Etching B.2.3 ZEP removal B.3 Layer III: Plasmonic Slot Waveguides B.3.1 ZEP Spin Coating and Patterning B.3.2 Ag Deposition and Lift-off B.3.3 Plasmonic Slot Waveguide Milling B.4 Post-Processing C Silicon Etching Chemistry 115 vii

8 Bibliography 116 viii

9 List of Tables 2.1 Comparison of propagation lengths and modal confinement between various plasmonic waveguide designs. Note that some results are based on simulations, and the reported figures are processed for easy comparisons Fine-meshing parameters for PSW region. Note that the number of cells are estimates derived from feature size and cell size Transmission spectrum peak locations derived from analytical and simulated results for different values of Si wire width Representative recipes of the Si etching optimization process Optimized recipes for silicon wire etching P out values measured for offset Si wires bridged by PSWs of various lengths, and their corresponding transmission factors ix

10 List of Figures 2.1 Momentum space surface plots depicting the diffraction limits for spatial modal size in each dimension. An upper bound to the wave vector component, k i (i = x, y, z), in a specific dimension translates to a lower bound in spatial modal size in that dimension [1] Cross-sectional schematics of 2D plasmonic waveguide designs. Their modes are coupled single-interface modes, and the two designs exhibit very different propagation and modal confinement characteristics SPP propagation lengths and modal confinement tradeoff for IMI and MIM designs [2, 3] Cross-section of various 3D plasmonic waveguide designs [1]. In addition to different propagation and modal confinement characteristics, these designs also present different levels of fabrication challenges Cross-sectional schematics of 3D plasmonic waveguide designs. The slab is a 3D version of of the IMI design and its low-loss mode is poorly confined. On the other hand, the slot, which is a 3D implementation of the MIM supports a truly sub-wavelength mode at the expense of high propagation losses Mode solution of 50 nm wide and 340 nm tall PSW at λ = 1550 nm. The images are generated with Lumerical MODE Solutions. It is clear that the slot mode is highly confined to within the bounds of the metal sidewalls. 20 x

11 3.2 Mode solution of nominally 400 nm wide and 340 nm tall PSW at λ = 1550 nm. Note that the slanted sidewalls are due to fabrication constraints documented in Section Fundamental mode solution of nominally 2500 nm wide and 340 nm tall PSW at λ = 1550 nm. Note that the slanted sidewalls are due to fabrication constraints documented in Section Phase-matching conditions for coupling into a SPP mode from a glass prism or a Si wire waveguide. The red lines indicate the input light with the coupling beam broken down into its wave vector components in blue, where the k x component is matched to the SPP propagation vector, k SP P Top view of orthogonal junction and phase-matching condition for coupling into a plasmonic slot mode from a Si wire waveguide Momentum mismatch between a Si wire waveguide mode and a PSW mode in the wavelength range from 800 nm to 2800 nm. The Si wire is 500 nm wide by 340 nm tall on silica, while the PSW consists of a 50 nm wide airfilled slot in a 340 nm thick Ag layer on silica [generated by and courtesy of Mohamed Swillam] Top view of the orthogonal coupling platform. The PSW cavity length, L, is defined as labeled in the diagram SEM of fabricated orthogonal coupling platform. FDTD overlay shows input light pulse flowing from Si wire to PSW Light coupling from Si wire to PSW upon continuous wave excitation at λ = 1550 nm. Bright spots generated by 2D FDTD simulation depict electric field intensities across the junction xi

12 4.2 Analytically calculated phase mismatch between k SP P of an air-filled slot and k x of Si wires with width w [generated by and courtesy of Mohamed Swillam]. The intersection point that indicates the maximum coupling efficiency red-shifts as w is increased D FDTD simulated transmission spectra red-shifting with increasing Si wire widths. A 996 nm wide FWHM spectrum is recorded for a 400 nm Si wire D FDTD simulated transmission at λ = 1550 nm for different Si wire widths. Peak coupling efficiency occurs for a Si wire width slightly above 400 nm at this specific wavelength D FDTD model for the orthogonal coupling platform. The P1 and P2 surfaces indicate positions of the source and detector, respectively D models constructed in Lumerical FDTD to compute transmissions of the orthogonal and parallel coupling schemes over wavelengths from 800 to 2800 nm Transmissions at λ = 1550 nm generated from a 2D FDFD method by Fan et al. Inset shows the model and its parameters w d, w p and l. The first two parameters are set to 300 nm and 50 nm, respectively, while the cavity length is swept from 0 to 2000 nm [4] D FDTD simulated transmissions for the orthogonal and parallel coupling schemes, contrasting the resonance effects of both configurations. Inset shows how the cavity length, L, is defined in the orthogonal case, as described in Section D FDTD simulated transmission spectrum for a 2 micron long cavity accessed via 400 nm wide Si wires on the orthogonal coupling platform. The resonance peaks can be observed from this plot. The coupling spectrum at FWHM is 733 nm wide xii

13 4.10 3D FDTD simulated transmissions at λ = 1550 nm for different cavity lengths accessed via 400 nm wide Si wires on the orthogonal coupling platform. The resonance peaks can be observed on top of the decay that corresponds to the increasing propagation losses as the plasmonic cavity length is increased Analytically calculated phase mismatch between k x of a 500 nm wide Si wire and k SP P of PSWs filled with materials of refractive index n [generated by and courtesy of Mohamed Swillam]. As n is increased, the momentum gap between k x and k SP P widens, especially for the short wavelengths D FDTD simulated transmission spectra showing weaker coupling as n is increased from 1.0 to 2.0. The simulation is based on a junction with a 400 nm Si wire. The coupling efficiency drop is more significant for the short wavelengths, as expected from analytical results Schematics depicting the device fabrication process flow Different sections of the Si wire-psw coupling platform. Light is coupled through a 2.5 micron wide Si wire section, tapered to a single-moded section and orthogonally coupled to the PSW, then back out into a wide Si wire Offset Si wires that would later be bridged with PSWs Ag patches deposited between offset Si wires. Precise alignment is achieved by the EBL tool using the square markers shown Misaligned lithography layers Excess areas exposed in the resist during the marker-searching process of the EBL tool Properly aligned resist window / Ag patch with Si wire layer. The optical and SEM images show the device at various stages in the fabrication process. 61 xiii

14 5.8 Two types of misalignments that occur in the batch of samples. These imperfections greatly affect the coupling mechanism and would make the device unuseable Schematics of various alignment methods of the EBL tool. (a) is the currently used method, but adding (b) to the alignment process would achieve more precise alignment and is recommended for future revisions of the device Representative SEMs of the Si etching optimization process. The earlier recipes lead to isotropic etches that produce narrow Si wires with very slanted sidewalls Optimized recipes for Si wire etching. The Si wires have relatively vertical sidewalls compared to the earlier recipes and their dimensions are much more controllable Si wire waveguide cross-section and resist pattern design Gap between Si wire and PSW leading to significant light leakage nm thick Ag film deposited onto the silica surface alongside Si toplayer of the SOI wafer Continuous film on one side of the step from Ag deposition process. The bridging of the films is undesirable for lift-off as it may peel off the film that should have stayed on the substrate Ag patch on samples after lift-off Ag particles scattered across sample surface leading to significant attenuation of light. They must be removed with a post-processing step before optical characterization Preliminary testing of the FIB tool to mill out 50 nm wide slots on Ag The FIB process flow for milling out the PSWs nm and 2000 nm PSWs imaged at different angles and zoom xiv

15 5.21 All devices used for optical characterization. PSW lengths range from 200 nm to 2000 nm in steps of 200 nm The experimental setup for optical characterization of the Si wire-psw coupling platform Mode profile of Si wire after passing through PSWs of various lengths. (b) to (h) are imaged with a higher gain compared to the full Si wire reference in (a). This is evident in the amount of background light collected in each image Fabrication issues that are reflected in optical characterization measurements Plots of FP scans over a 1 nm range at 2 pm spectral resolution Plot of FP loss measurement data from PSWs of various lengths. The variables for the plot are selected according to Equation C.1 Schematic of the SF 6, O 2 and CHF 3 process for Si etching [5] xv

16 List of Acronyms 2D Two-dimensional 3D Three-dimensional AFM Atomic force microscopy CMOS Complementary metal-oxide-semiconductor DRIE Deep reactive ion etching EBL Electron beam lithography ECTI Emerging Communications Technology Institute FDTD Finite-difference time-domain FIB Focused ion beam FP Fabry-Perot IC Integrated circuit ICP Inductively-coupled plasma IMI Insulator-metal-insulator LRSPP Long-range surface plasmon polariton MIM Metal-insulator-metal xvi

17 NSOM Near-field scanning optical microscopy OE-MOSFET Optoelectronic metal-oxide semiconductor field-effect transistor PML Perfectly matched layer PSW Plasmonic slot waveguide RIE Reactive ion etching SEM Scanning electron microscopy SOI Silicon-on-insulator SPP Surface plasmon polariton TE Transverse-electric xvii

18 List of Symbols α Propagation losses along Si wire α Propagation losses along PSW β Propagation constant γ Conductivity of metal ɛ d Permittivity of dielectric ɛ m Permittivity of metal λ Wavelength of light wave λ 0 Free-space wavelength of light wave λ Fabry-Perot peak spacing ω Angular frequency of light wave ω p Plasma frequency of metal A Grouping of variables as defined in Equation 6.10 b Grouping of variables as defined in Equation 6.14 B Grouping of variables as defined in Equation 6.11 C Coupling efficiency from fiber mode to Si wire input mode xviii

19 C Coupling efficiency from Si wire mode to PSW mode C Coupling efficiency from PSW mode to Si wire mode f Frequency of light wave k i (i = x, y, z) Wave vector component in the x, y, z dimension, respectively k SP P Wave vector component of the SPP in the propagation direction l Cavity length defined in the parallel coupling platform L Length of Si wire L Length of PSW L p Propagation length of PSW m Grouping of variables as defined in Equation 6.13 n Refractive index n eff Effective refractive index P in Input laser power in optical characterization P monitor Power measured by monitor in FDTD simulations P out Measured output power in optical characterization P source Source power in FDTD simulations r Ratio of Fabry-Perot resonance depths R Reflectivity off the Si-air interfaces at both input and output Si wire facets R Reflectivity between Si wire facet and Ag-surrounded air slot T Transmission calculated in FDTD simulations xix

20 T 1 Transmission factor resulting from losses associated with the Si wire T 2 Transmission factor resulting from losses associated with the PSW T system Transmission factor resulting from losses associated with the optical characterization system w Width of Si wire w d Si wire width defined in the parallel coupling platform w p PSW width defined in the parallel coupling platform xx

21 Chapter 1 Introduction 1.1 The Interconnect Problem In a world where battery-powered devices are ubiquitous and environmental footprint is a key criteria, our power-hungry integrated circuits (ICs) are in need of a major refresh. In fact, a redesign in some of the fundamental building blocks can lead to major performance gains in addition to cutting down power consumption. One such fundamental component is the metal wire that routes signals around the chip. As simple as they may seem, these Cu wire interconnects present a major performance bottleneck. They also dissipate a large fraction of the total chip power as we try to stretch their physical limits to deliver the processing power we need from modern day ICs. A typical IC stack consists of around 10 metal layers. The global interconnects occupy the top one or two layers, and are responsible for clock and signal distribution across functional blocks [6]. In a multi-core architecture, these metallic wires are also responsible for the communication between different cores. These long interconnects span millimeters and are subject to bandwidth and latency constraints, placing a limit on how far apart we can 1

22 Chapter 1. Introduction 2 put these processing units, which ultimately sets a limit to the number of cores we can put on a chip. For these chips to operate at high bit rates in the gigahertz range, the interconnect line must also be driven with high power where a large fraction of it gets dissipated [7]. In a low-power device, we cannot afford to have these wire links occupying a significant portion of a chip s power budget. Luckily, at the global interconnect level where dimensions are relatively large, high-bandwidth and low-loss optical waveguides can be integrated through high-index dielectric waveguides. In fact, IBM has demonstrated propagation of 1.28 Tb/s signals through a 5-cm Si wire waveguide [7], as well as components to bridge photonics with electronics at the 500 nm scale such as modulators [8] and photodetectors [9]. These Si wires also have losses in the range of 3 db/cm, making power loss almost negligible across current chip dimensions [7]. The low losses also promise the potential for distributed processing between many cores placed far apart, linked up by optical interconnects. While global interconnects have the dimensions of high-index dielectric waveguides, the bottom metal layers in the IC stacks are occupied by interconnects that are an order of magnitude smaller. The widths and pitch of these local interconnects are on the scale of 50 nm, routing transistors within a functional block and therefore only span micron-scale distances [6]. Even though transistors have been able to take advantage of downward scaling in size to boost performance, current ICs cannot take advantage of their potential as the clock speeds are limited by the interconnects bridging these transistors [10, 11, 12]. The operation frequencies are limited by the interconnect RC delay resulting from the resistance and the line-to-line capacitance, which would grow as the size and pitch of the interconnects shrink [6]. As we move towards

23 Chapter 1. Introduction 3 the 22 nm node, effects of line-to-line inductance [13], as well as capacitance variability due to line edge roughness [14] would become increasingly critical to IC design, requiring complex modelling and bus encoding schemes. If a high-bandwidth photonic solution can be implemented to bridge the worlds of the terahertz with the nanoscale, the transistor links will no longer be subject to these limitations. Disruptive hardware innovations are not new in this industry. The invention of the optical fiber led to a significant performance boost and cost reduction compared to its electrical counterpart, the coaxial cable. More recently, the switch to chasing after multiple cores rather than faster clock speeds allowed ICs to cope with performance needs without running into the intrinsic clock speed limitations described above. It is not unimaginable for us to develop a new class of interconnects that would not only lead to performance gains, but also cut down on the chip s power budget. Such innovations may be enabled through advances in our understanding of materials, ever more powerful computational modelling capability and refined fabrication technologies. Specifically, this thesis approaches the interconnect problem by exploring the intersection of photonics, plasmonics and nanotechnology. 1.2 Photonics, Plasmonics and Nanotechnology Photonics is currently the dominant technology for long-distance communication and in applications where high-bandwidth data transfer is required [11]. The ability to use light as the signal carrier have expanded from submarine communication cables that bridge the world together, to rack-to-rack communication and fiber-to-home services in many countries. More recently, its potential for global clock distribution have been explored through demon-

24 Chapter 1. Introduction 4 stration of various components to build a hybrid chip with a photonic layer bonded to CMOS electronics, further proving optics as a feasible chip-scale solution where high-bandwidth is needed [15]. The success of global optical interconnects would enable massively parallel processing by efficiently routing data between many processor cores [7, 15]. However, the possibilities in bringing optics to a CMOS chip does not end with global interconnects. Further down the IC stack, short and thin copper wires linking up local circuit modules are currently preventing transistors from operating at their peak performances [6]. The cross-sectional dimensions of these copper wires are only tens of nanometers [6], a factor of ten smaller than the high index contrast Si wire waveguides used for global interconnects. Simply scaling dielectric waveguides down to this size is not practical as the dimensions are smaller than the diffraction limit of light, and the Si wires will no longer behave as waveguides [1]. A new waveguiding mechanism is needed to utilize light as a signal carrier at sub-100 nm dimensions; one that can also provide strong confinement to avoid interference or cross-coupling between the tightly packed interconnects, and can be manufactured using conventional CMOS processes. Plasmonics is the technology that bridges the size mismatch between optics and electronics while providing high-bandwidth capabilities. By employing metals as part of the waveguide structure, the surface plasmon polariton (SPP) is utilized as the signal carrier. It has been demonstrated that SPPs can be tightly confined to small cross-sectional areas in various structures and remain guided along the metallic surfaces as a two-dimensional wave that is subject to different diffraction limit rules [16]. The fundamental sciences and various applications of plasmonics have been theoretically studied for many

25 Chapter 1. Introduction 5 years, but recent advances and the widespread accessibility of nanofabrication technologies have allowed for many experimental studies of plasmonic designs [17]. This thesis is concerned with a particular SOI-based plasmonic coupler design that would allow wideband coupling into a plasmonic slot, which may be used to replace local copper interconnects in future ICs. 1.3 Thesis Objective and Scope There have been many plasmonic structures proposed for waveguiding purposes, and they vary in modal confinement and propagation losses [16, 17, 1, 18, 19]. Just as important to these designs are the practical considerations, such as their fabrication complexity, compatibility with CMOS processes, and how light may be coupled into these structures for optical characterization. The goal for this thesis is to design and build a coupling platform that would allow us to couple light into a plasmonic structure suitable for guiding subdiffraction SPPs. The plasmonic structure, along with the integrated couplers, would allow us to explore the potential for SPP-based local interconnects. The plasmonic waveguide must offer strong SPP confinement to avoid interference from neighbouring waveguides, and allow for fabrication and optical characterization given the available resource constraints. Through the integrated coupling platform, the plasmonic device would need to interface with standard optical testing equipment, allowing us to launch laser light into the sub-100 nm waveguide via standard waveguide characterization procedures. In many situations, bringing a new technology to solve a problem often enables new possibilities. Plasmonic waveguides, in particular, enables new ap-

26 Chapter 1. Introduction 6 plications in sensing. It is also the goal of this thesis to explore such potential applications. 1.4 Thesis Outline Chapter 2 of this thesis gives a brief background theory about SPPs and the diffraction limit of light; various plasmonic waveguide designs in the literature are also discussed. Chapter 3 showcases some preliminary work and analytical studies that led to the design of the plasmonic coupling platform. Chapter 4 is dedicated to finite-difference time-domain (FDTD) simulations of the wideband coupling platform. Various parameters are investigated to observe their effects on the coupling scheme, and the results compared with analytical predictions. Chapter 5 documents the device fabrication process and the steps taken to arrive at the final recipe. Chapter 6 describes the optical characterization procedures and presents the proof-of-concept results obtained from the prototype device. In the final chapter, Chapter 7, suggestions for future steps and potentials for the project are discussed.

27 Chapter 2 Literature Review 2.1 Light, Surface Plasmon Polaritons and Spatial Dimensions (a) 3D wave: kx 2 + ky 2 + kz 2 = ɛk0 2 (b) Surface wave: k x 2 + ky 2 + kz 2 = ɛk0 2 Figure 2.1: Momentum space surface plots depicting the diffraction limits for spatial modal size in each dimension. An upper bound to the wave vector component, k i (i = x, y, z), in a specific dimension translates to a lower bound in spatial modal size in that dimension [1]. 7

28 Chapter 2. Literature Review 8 In the quest to interface optics with electronics at the sub-100 nm scale, the first challenge is to shrink the inherently diffraction-limited light to subwavelength dimensions. The diffraction limit is illustrated in Figure 2.1 (a) by plotting a surface in momentum space where each momentum component is bound [1]. An upper bound in momentum corresponds to a lower bound in spatial dimensions, which translates to light occupying a minimum modal volume on the order of a wavelength. In the case of telecom wavelengths, the modal volume is on the scale of a micron, whereas local interconnects have dimensions on the sub-100 nm scale. This one order of magnitude scaling defines the major challenge in interfacing optics with transistor-level CMOS electronics. The case in Figure 2.1 (a), however, applies only to light waves with a real wave vector in all three spatial dimensions. The picture is different when one of the three components become imaginary. An imaginary wave vector component translates physically to exponential decay that results in a surface wave. This new wave vector equality is presented in Figure 2.1 (b), where k x represents the evanescent dimension of the surface wave, allowing k y and k z to grow indefinitely with it [1]. The resulting surface wave is called a surface plasmon polariton (SPP), which occurs at a metal-dielectric interface. Physically, the SPP is light coupled to the electron densities in the skin layer of a metal, confined to the interface and oscillating collectively at optical frequencies [16]. From a quantum mechanical perspective, the SPP can be described as a quasi-particle resulting from coupling between a surface plasmon and a photon. An interface for excitation of SPPs require one of the two materials to exhibit metallic behaviour by having a negative value as the real part of the

29 Chapter 2. Literature Review 9 permitivity at the excitation frequency. This condition can be easily satisfied near the telecom wavelength by using CMOS-compatible metals such as Al, Cu, Au and Ag, since their plasma frequencies, ω p, are on the order of s 1, well above the telecom frequencies [20]. With the plasma frequency, the permitivity of a metal, ɛ m, can be calculated using the Drude model in Equation 2.1, where γ is the conductivity [21, 22]. ɛ m = 1 ω 2 p ω 2 + iωγ (2.1) The complex ɛ m defines the characteristics of the metallic half-space. The conductivity term resulting from a non-zero γ, in particular, gives rise to the primary loss mechanisms in plasmonic structures free-electron damping and interband damping [16]. To obtain the dispersion relation of the SPP, we use Equation 2.2, where the propagation constant, β is also complex due to the complex ɛ m [16]. β = k 0 ɛd ɛ m ɛ d + ɛ m (2.2) This SPP dispersion relation is critical as Im{β} would tell us the propagation loss, and hence the propagation length, at each wavelength. The Re{β} would be needed for analyzing coupling schemes based on phase-matching conditions. In the next few sections, various plasmonic structures with different dispersion relations from the single metal-dielectric interface are compared. These more complex designs lead to different levels of modal confinement and propagation lengths. In the end, one waveguide structure is selected based on our design requirements.

30 Chapter 2. Literature Review Plasmonic Waveguide Designs D Designs (a) 2D insulator-metal-insulator (IMI) (b) 2D metal-insulator-metal (MIM) Figure 2.2: Cross-sectional schematics of 2D plasmonic waveguide designs. Their modes are coupled single-interface modes, and the two designs exhibit very different propagation and modal confinement characteristics. It is useful practice to first study two multi-layered 2D designs, the insulatormetal-insulator (IMI) and the metal-insulator-metal (MIM), as shown in Figure 2.2. The IMI design in (a) exhibits a low-loss mode, where centimeterscale propagation lengths have been observed [23, 24]. This long-range surface plasmon polariton (LRSPP) mode occurs when a thin metal tens of nanometer thick is sandwiched between symmetric dielectrics on either side, and the SPP modes excited at both interfaces propagate down the metallic layer as a coupled mode. The attractive characteristic of low propagation loss is unfortunately overshadowed by its weak modal confinement. With modal dimensions penetrating microns into the dielectric subspaces, these IMI structures do not offer much advantage over dielectric waveguides for optical interconnect applications [1], although they have been utilized for sensing [25], modulation [26] and filter applications [27].

31 Chapter 2. Literature Review 11 (a) Propagation lengths (b) Modal confinement Figure 2.3: SPP propagation lengths and modal confinement tradeoff for IMI and MIM designs [2, 3]. The MIM structure in Figure 2.2 (b), which can be thought of as the inverse structure to the IMI, offers excellent modal confinement as penetration into the metallic cladding layers are limited to the skin depth [1]. The MIM mode is also a coupled mode between two SPPs, but the coupling occurs in a dielectric region where most of the field is confined. This mode also exhibits interesting properties, such as the high transmissions through sharp 90 bends [28, 29], which is atypical in optics but extremely useful in optical interconnect applications. The cost of adopting the MIM design is their much higher propagation losses, which results in propagation lengths only tens of microns. This tradeoff between propagation length and modal confinement is illustrated in Figure 2.3 [2, 3]. It is clear that sub-wavelength confinement is only possible with the MIM structure. The 2D IMI and MIM structures serve as simplistic models to understand the basic designs for SPP-guiding structures and coupled SPP waves, but these

32 Chapter 2. Literature Review 12 structures only guide within a plane. For practical applications, modulation of the index in the third dimension is required, so we must extend these models to some 3D designs D Designs Figure 2.4: Cross-section of various 3D plasmonic waveguide designs [1]. In addition to different propagation and modal confinement characteristics, these designs also present different levels of fabrication challenges. Many 3D plasmonic waveguides have been proposed, some of which are depicted in Figure 2.4 [1]. There are also designs based on metallic nanoparticles, where near-field coupling between nearby nodes are used to propagate the plasmon wave [16, 19]. In addition, there are more complex hybrid designs that aim to achieve strong modal confinement while having low propagation

33 Chapter 2. Literature Review 13 Table 2.1: Comparison of propagation lengths and modal confinement between various plasmonic waveguide designs. Note that some results are based on simulations, and the reported figures are processed for easy comparisons. Plasmonic waveguide design Propagation length Spatial extent Slab [23, 30, 24] 1 cm 5 µm Hybrid design by Oulton et al. [18] µm nm V-groove [16] 100 µm 1 µm Nanoparticle chain [16, 24] µm µm Slot [31] 20 µm 50 nm losses [18]. However, some of these designs present fabrication challenges requiring techniques such as controlled nanoparticle growth and nano-imprint technologies [32]. The propagation lengths and modal confinement achieved by some of these waveguide designs are presented in Table 2.1. One structure that has been heavily investigated is the plasmonic slab waveguide shown in Figure 2.5 (a). As an extension of the 2D IMI structure in Figure 2.2 (a), the slab waveguide consists of a slab of metal a few microns wide and less than 100 nm thick embedded in a highly symmetric cladding of dielectrics. The LRSPP mode exhibits propagation lengths up to millimeters or even a centimeter [30]. Partly due to the simplicity to fabricate this structure, the slab and its variants have been experimentally studied by various groups [23, 33, 34, 35, 30, 36, 37]. However, like its 2D version, the modal transverse dimensions extend microns into both dielectric half-spaces and offer no better confinement than what is achievable with dielectric waveguides. A perfectly symmetric cladding is also difficult to achieve practically and any asymmetry would lead to substantial increase in the propagation losses [1].

34 Chapter 2. Literature Review 14 The requirement for a symmetric dielectric index all around also makes sensing applications limited as the cover layer cannot be coated with a specimen of unknown refractive index. (a) 3D slab (b) 3D slot Figure 2.5: Cross-sectional schematics of 3D plasmonic waveguide designs. The slab is a 3D version of of the IMI design and its low-loss mode is poorly confined. On the other hand, the slot, which is a 3D implementation of the MIM supports a truly sub-wavelength mode at the expense of high propagation losses. There has been a shift to the plasmonic slot waveguide (PSW) structure depicted in Figure 2.5 (b) as a potential candidate for optical interconnect applications. The PSW is on the opposite end of Table 2.1, which is sorted by propagation lengths. Although it is also capable of longer propagation lengths at the expense of modal confinement, the 20 micron propagation length may be all we need for local interconnect applications and the 50 nm modal confinement gives a practical path to integration with transistor-level circuits. The PSW structure consists of a metallic film sandwiched between two dielectrics that need not be symmetric, then a rectangular slot is milled through the metal to provide the in-plane index modulation. The mode resides within the slot and penetration into the metals is on the order of the skin depth as it is confined by the MIM mechanism in the horizontal dimension. The vertical

35 Chapter 2. Literature Review 15 confinement is provided by the index guiding mechanism created by the core layer [38]. As the metal film thickness increases beyond 100 nm, the metallic sidewalls of the slot become well-defined, and the waveguide would support only a TE mode. This is because each metallic sidewall supports only a perpendicular electric field parallel to the substrate surface [1]. Simulations also show that increasing the metal thickness would make the mode effective index approach that of the slot dielectric, and propagation losses would drop with it. This means we can utilize a thicker layer of metal to boost the propagation length. The limitation, however, is the high aspect ratio of the slot which presents a major fabrication challenge. Although the PSW has been extensively studied theoretically [21, 39, 31, 40, 41], experimental studies have only begun to emerge in the literature as the required fabrication technologies become more commonly available [38, 42]. A device that requires a high aspect ratio, sub-100 nm wide slot defined by two vertical sidewalls, supporting a mode with propagation lengths only tens of microns, not only presents a fabrication challenge, but also great difficulty in optical characterization. Without a support platform to access the PSW, it would be extremely difficult to couple light into and out of these tiny plasmonic devices Coupling Schemes Most of the experimental work in the literature have been focused on the slab waveguide LRSPP mode because the SPP can propagate for up to centimeter distances, providing sufficient space for excitations through prism or grating coupling. These techniques help satisfy phase-matching conditions necessary for efficient coupling [16, 43, 44]. The SPP is often detected in the near

36 Chapter 2. Literature Review 16 field using tools such as the near-field scanning optical microscope (NSOM) [45, 43], or is scattered into free-space light via a set of output gratings [16]. The PSW, on the other hand, has high losses and therefore very short propagation lengths [31]. The spatial constraints and the vertical orientation of the metallic sidewalls that make up the plasmonic interfaces mean prism and grating couplers are impractical, hence end-fire coupling is often employed. The low-loss waveguide used to interface with the PSW can be a slab [45] or a high index contrast dielectric waveguide [46]. However, in an end-fire setup, the inherent one-order-of-magnitude spatial modal mismatch between the two sections set a limit to how narrow the PSW can be made. For example, a 50 nm wide slot collects light from a cross-section approximately 185 nm wide [38], much smaller than the typical mode of a Si wire. Due to this design constraint, the narrowest of experimentally tested designs known to the author is 150 nm [38]. The plasmonic slots reported in literature are also filled with a material with higher index than air, such as Si [38] and PMMA [42] to alleviate the momentum mismatch between the dielectric waveguide and the PSW. For a Si wire waveguide, the effective index is around 3, whereas for an air-filled slot it is around 1.5. Other modifications such as tapering [38, 47] and stubbing [4] are also utilized, but such resonance-based methods would make the transmissions wavelength-dependent, unsuitable for coupling of high bit rate signals that are broadband by nature. It is clear that to achieve our optical interconnect prototyping objective, we would require a new coupling scheme to support non-resonant wideband coupling into a sub-100 nm plasmonic slot. To enable this platform for sensor applications, we would also need the coupling to be efficient for various slot

37 Chapter 2. Literature Review 17 indices. 2.3 Potential of the Plasmonic Slot Waveguide Based on our analysis, the PSW offers all the basic requirements needed for short-range local optical interconnect applications such as the sub-100 nm modal confinement and transmission over sharp bends. The strong field confinement would allow PSWs to be placed in close proximity to each other without interference. In the electronic domain, the pitch of copper wires are subject to limitations resulting from line-to-line capacitance and crosstalk between wires [6]. Strongly confined light that do not interfere across waveguides would allow chip designers to pack them close to each other, and the high transmission over sharp bends would allow us to turn these optical-frequency signals around like we do with metallic wires. In fact, the PSW promises greater potential than serving as high bit rate versions of copper wires. Possibilities such as vertical integration through cross-coupling between layers [24, 48] and gain-assisted propagation to extend the short propagation lengths [49, 50, 51, 52, 53] have been proposed, which would add new dimensions to the design of interconnects. With the PSW acting as a cavity, the structure also has potential to act as a SPP laser described in literature [54, 55, 56, 57]. Other plasmonic slot-based structures have also been used for sensing applications such as photodetection of quantum dots [58]. The strong localized fields can also be utilized for on-chip sensing applications where the slot is filled with a liquid with dissolved particles. These applications can lead to low-cost and portable sensors that can be fabricated using standard CMOS processes.

38 Chapter 2. Literature Review 18 The use of Si wire waveguides as a coupling platform to the PSW is also of great interest, despite current coupling schemes that present the challenges explained in Section The platform is attractive because Si wires can be conveniently fabricated by etching a commercially available SOI wafer, and can carry light into and out of the PSW with minimal losses over large distances as their losses are on the order of 3 db/cm [7, 59]. The output light can also be detected via an integrated sensor such as Si-Ge quantum well detectors [60] or the Si-Ge optoelectronic metal-oxide semiconductor fieldeffect transistor (OE-MOSFET) that occupy a 100 x 100 x 100 nm 3 volume and can operate above 10 GHz [61]. The potential for the PSW seem promising, but the problem of efficient wideband coupling between the high index Si wire with the PSW remain. In the next chapter, the optical modes of the two waveguides are analyzed, leading to a new coupling scheme where phase-matching is naturally achieved between the two sections. The development of this coupling platform will bridge the worlds of dielectric waveguides and plasmonic waveguides, enabling the above possibilities to be explored experimentally.

39 Chapter 3 Coupler Design 3.1 The Plasmonic Slot Mode To begin the design of a PSW-based platform that can be fabricated with the available resources and can be experimentally tested for waveguiding and sensing applications, we first need to model the guided modes of the PSW and understand its properties. To solve for the plasmonic slot mode, the model in Figure 3.1 (a) is created in Lumerical MODE Solutions. The 50 nm by 340 nm plasmonic slot can only support a single mode with E x field components, as shown in Figure 3.1 (b), since each of the two plasmonic-air interfaces would only support electric field vectors orthogonal to the interface. The solution shown in Figure 3.1 corresponds to an effective index of 1.43 and propagation loss, α, of db/cm. Using Equation 3.1, we can determine the PSW wave vector, k SP P. k SP P = n eff k 0 = n eff 2π λ 0 (3.1) Using 1.43 as the effective index, n eff, and the free-space wavelength λ 0 = 1550 nm, which the mode is solved at, k SP P is determined to be 5.80 micron 1. This 19

40 Chapter 3. Coupler Design 20 (a) Cross-section model (b) E x component (c) Electric-field intensity (d) Magnetic-field intensity Figure 3.1: Mode solution of 50 nm wide and 340 nm tall PSW at λ = 1550 nm. The images are generated with Lumerical MODE Solutions. It is clear that the slot mode is highly confined to within the bounds of the metal sidewalls.

41 Chapter 3. Coupler Design 21 value is critical in designing how light would be coupled into the PSW as the momentum matching, or phase-matching, would determine the coupling efficiency. Another important parameter to consider is the propagation length, L p, that would give a good estimate of how long we can design the PSWs to make detection of the output possible. This propagation length can be derived from α using Equation 3.2. L p = 1 α = α [in db] (3.2) The derived L p of microns mean the PSWs should be designed shorter than this length to ensure the output power, from propagation losses, would not be below e 1 of the input power. 3.2 Silicon Wire Coupling A Si wire-based coupling platform is envisioned as it would avoid having to locate and align the characterization setup with a sub-100 nm plasmonic slot. The fabrication process would take care of the fine alignments, and Si wires on the scale of 500 nm would be used to bridge the macroscopic and the nanoscopic worlds. For the Si wires to go from fiber to plasmonics, a taper would need to gradually focus the light. To begin the analysis, we also need to understand the mode properties, so both ends of the taper are modelled as shown in Figure 3.2 and 3.3. The nominally 400 nm wide Si wire is single-moded with effective index of 2.48, while the nominally 2500 nm end is multi-moded with effective index of Note that the TE modes, with E x field components, at 1550 nm are used as the TM modes would not couple to the PSW.

42 Chapter 3. Coupler Design 22 (a) Cross-section model (b) E x component (c) Electric-field intensity (d) Magnetic-field intensity Figure 3.2: Mode solution of nominally 400 nm wide and 340 nm tall PSW at λ = 1550 nm. Note that the slanted sidewalls are due to fabrication constraints documented in Section 5.3. (a) Cross-section model (b) Electric-field intensity Figure 3.3: Fundamental mode solution of nominally 2500 nm wide and 340 nm tall PSW at λ = 1550 nm. Note that the slanted sidewalls are due to fabrication constraints documented in Section 5.3.

43 Chapter 3. Coupler Design 23 Equation 3.1 can also be applied to Si wires, and plugging in the n eff calculated at the single-moded end gives a propagation constant of 10.1 micron 1. In a parallel coupling scheme [4], this 10.1 micron 1 momentum would need to be matched to the SPP momentum, k SP P, of 5.80 micron 1 using tapers or stubbed designs. There are also other problems associated with this end-fire coupling scheme, where the Si wire and PSW are aligned in the same direction, with their ends attached to one another. It is found from 3D FDTD simulations that for a 50 nm wide plasmonic slot, the coupling spectrum using a parallel configuration reside in the shorter wavelength regions below 1550 nm. This is especially a problem because Si absorbs wavelengths less than 1 micron, leaving a narrow band for coupling. The second issue is the strong resonances created by the cavity when a PSW is sandwiched between two Si wire ends [4]. For waveguiding applications, the PSWs need to carry high-bandwidth signals and the coupling must not be strongly resonant, as that would create wavelength-dependent attenuations that vary with the lengths of the PSWs. The limited coupling bandwidth along with the strong resonances effectively make the parallel coupling scheme unsuitable for waveguiding applications. In addition, to the author s knowledge, there has yet to be published experimental work coupling into a 50 nm wide plasmonic slot from a Si wire. In addition to fabrication challenges, the spatial mode mismatch between the Si wire cross-section and the PSW create an upper limit for the ratio between the size of two components. It is apparent that a new coupling scheme is needed that would not be subject to the same constraints, so the orthogonal coupling scheme is conceptualized and it would overcome all of these challenges.

44 Chapter 3. Coupler Design Orthogonal Configuration Glass Prism vs. Silicon Wire (a) Prism coupling to SPP mode. (b) Si wire waveguide coupling to SPP mode. Figure 3.4: Phase-matching conditions for coupling into a SPP mode from a glass prism or a Si wire waveguide. The red lines indicate the input light with the coupling beam broken down into its wave vector components in blue, where the k x component is matched to the SPP propagation vector, k SP P. The inspiration for the orthogonal coupling scheme came from prism coupling, which is used to excite a SPP at a single metal-dielectric interface, as depicted in Figure 3.4 (a). The MIM structure of a PSW can be considered as two such interfaces placed back-to-back with their air regions joining, so we can draw parallels with SPP coupling that occurs at a single interface. Specifically, a SPP can be excited at one of the two halves of a MIM structure via evanescent coupling. However, in practice, it would be impossible to align the bottom of a glass prism with the 340 nm thick Ag sidewall, so we must seek another method to provide the evanescent coupling mechanism. The Si wire can serve this purpose, as shown in Figure 3.4 (b). Note that the figure depicts the top view of the coupler structure, where the light would be guided along the

45 Chapter 3. Coupler Design 25 length of the Si wire, emerging from the end facet and evanescently coupled into the plasmonic interface. The wave vector of the Si wire can be broken down into two components, and the k x component would be phase-matched to the SPP momentum, k SP P. In contrast, the parallel end-fire coupling scheme requires phase-matching between k SP P and the k z component. Figure 3.5: Top view of orthogonal junction and phase-matching condition for coupling into a plasmonic slot mode from a Si wire waveguide. The full orthogonal junction design is shown in Figure 3.5, where the Ag patches on two sides of a 50 nm air gap create the PSW, and the Si wire guides input light from one of the sides. The light is transmitted through this 90 -angled junction, and the coupling efficiencies can be analytically studied from the phase-matching conditions.

46 Chapter 3. Coupler Design Analytical Theory for Orthogonal Coupling In a conventional parallel coupling scheme, the phase-matching is achieved by ensuring the Si wire propagation constant, the k z component of the wave vector, to match up with k SP P of the PSW. However, the two momenta usually have a large mismatch as shown in the dispersion relation in Figure 3.6 because the Si wire mode has an effective index near 3 while the 50 nm PSW has an effective index of 1.43, as the mode primarily resides in an air-filled region. To bridge this natural momentum gap, parallel coupler designs have used methods such as tapering down the Si wire dimensions and filling the plasmonic slot with a higher index material, which decreases the Si wire effective index and increases the PSW effective index, respectively [38, 42]. These methods are unfortunately problematic, as tapering down the Si wire width would induce high propagation losses beyond a certain point, and pre-filling the plasmonic slot with a material would prevent it from being used for sensing applications. Resonance-based techniques [4] would also make the design optimized only for specific frequencies, unsuitable for wideband coupling. It is clear from Figure 3.6 that the mismatch between k z and k SP P is quite large across the 800 nm to 2800 nm wavelength range, and there is no straightforward way to circumvent this problem. In contrast, the k x component of the Si wire wave vector match up very well with the k SP P. In the orthogonal configuration, the phase-matching condition is based on these two vectors, so wideband coupling is naturally achieved by rotating the Si wire by 90. Coupling to the PSW from the side also eliminates the problem of dimension mismatch between the two components as the Si wire can be made as wide as necessary since the PSW can always be designed longer to accommodate the extra width of the Si wire. Another interesting observation is

47 Chapter 3. Coupler Design 27 Figure 3.6: Momentum mismatch between a Si wire waveguide mode and a PSW mode in the wavelength range from 800 nm to 2800 nm. The Si wire is 500 nm wide by 340 nm tall on silica, while the PSW consists of a 50 nm wide air-filled slot in a 340 nm thick Ag layer on silica [generated by and courtesy of Mohamed Swillam].

48 Chapter 3. Coupler Design 28 the weak resonant effects when the PSW is sandwiched between two Si wires in the orthogonal configuration. The underlying reason is suspected to be that the coupling occurs over a few hundred nanometers where the Si wire cross-section overlaps the length of the PSW, as compared to a well-defined interface in the parallel configuration. The intrinsically distributed nature of the orthogonal junction coupling scheme smooths out the resonance effects since it lacks a well-defined cavity. The effects of Si wire width and depths of the resonances will be discussed in more detail with FDTD simulation results in Chapter Conceptual Design of the Coupling Platform Figure 3.7: Top view of the orthogonal coupling platform. The PSW cavity length, L, is defined as labeled in the diagram. The coupling platform shown in Figure 3.7 consists of two Si wire-psw orthogonal junctions, with the two Si wires serving as input and output waveguides to the PSW. The edge of each Ag patch adjacent to the Si wire is angled

49 Chapter 3. Coupler Design 29 to prevent it from attenuating the Si wire mode. However, a small overlap is necessary to prevent light from escaping off the gap during coupling. This overlaping surface is designed to be 50 nm long in simulations, but is unfortunately difficult to control during fabrication, as explained in Section The concept of a cavity length is not well-defined since light is coupled over a section along the length of the PSW, but in this report, it will refer to L as labeled in the figure. Using this platform, we can optically access the PSW and experimentally test the proposed orthogonal coupling scheme. Success with this platform would allow efficient wideband coupling into a 50 nm PSW via an on-chip platform with potentially very weak resonant effects. In addition, the plasmonic slot is unoccupied and easily accessible, and therefore can be filled with liquids with dissolved particles or quantum dots to investigate other plasmonic effects and applications. 3.4 Plan for a Prototype After conducting the preliminary work, the basic conceptual design of an orthogonal coupling platform is formed. Some of the design parameters are determined through FDTD simulations discussed in the next chapter. The FDTD simulation chapter will investigate properties of both a single junction and the full coupling platform, in 2D and 3D, and correlate the results to the analytical results. Specifically, the models will investigate effects from varying Si wire widths and plasmonic slot index. Sweeping over a range of Si wire widths as a parameter would allow us to observed changes in the coupling spectrum and the improved coupling efficiencies at higher wavelengths enabled by overcoming dimensional constraints. The effects of filling the plasmonic slot with a higher index material is also studied as it would be

50 Chapter 3. Coupler Design 30 important for sensing applications, which may require filling the slot with a liquid with dissolved particles. Then the full coupling platform is modelled to investigate resonance effects, and the results are compared to the parallel configuration. Figure 3.8: SEM of fabricated orthogonal coupling platform. FDTD overlay shows input light pulse flowing from Si wire to PSW. Utilizing the various design parameters such as the Si wire width devised from simulations, Chapter 5 will document the steps taken to create the physical device, obtaining a recipe for the process. Figure 3.8 shows the fabricated device with a FDTD simulation overlay on part of the structure. Proof-of-concept level testing is then conducted with this device to provide experimental confirmation about the orthogonal coupling scheme. The optical characterization methods are discussed in Chapter 6 and measured values will be contrasted with analytical and simulated results.

51 Chapter 4 Finite-Difference Time-Domain Simulations 4.1 Computational Domain Setup The goal of this chapter is to use computation methods, specifically FDTD, to confirm the analytical results and determine optimal design parameters for the device. Characteristics of the orthogonal couplers are compared to parallel coupling models. The parallel coupling design is based on 2D singlewavelength studies in literature [4]; but in this study, the models are extended to 3D and the transmissions are simulated across a broad spectral range. For the orthogonal coupler, two types of models are constructed; one with a single junction, and secondly the coupling platform which has both input and output couplers. Their properties are studied via parameter sweeps, in which design parameters are varied for each short pulse-excited (broadband) simulation. The results will demonstrate that for our applications, the orthogonal coupler design is superior to the end-fire configuration in many aspects. 31

52 Chapter 4. Finite-Difference Time-Domain Simulations 32 To simulate the properties of the orthogonal junction and the full coupling platform across a large wavelength range, the time-domain method is needed to simulate a guided light pulse as it travels through the device. 2D and 3D models are created using the commercial software Lumerical FDTD and parameters are varied to observe effects on the transmission spectrum. The sweep parameters include Si wire width, PSW cavity length and the slot index, and their effects will be discussed in the following sections. Table 4.1: Fine-meshing parameters for PSW region. Note that the number of cells are estimates derived from feature size and cell size. Slot dimension Feature size (nm) Cell size (nm) No. of cells Cross-sectional width Cross-secttional height Propagation direction (length) up to FDTD models for a plasmonic structure requires special attention in defining the computational domain and meshing parameters because of deep subwavelength features. The trade-off to a very fine mesh is the run-time of the simulations, so a balance is needed both at the prototyping stage and for more precise simulations with the final design. Initial FDTD simulations are run in 2D, which is effective for observing effects such as resonances and are useful for prototyping as they can often be completed within minutes. However, the physical structure consists of many layers and the PSW has different guiding mechanisms in the two cross-sectional dimensions [38], so the 3D simulations show results that are not evident in their 2D counterparts. In both 2D and 3D, the non-uniform meshing allows significantly reduced run-time as only the smallest features are meshed with a fine grid. The smallest features in this

53 Chapter 4. Finite-Difference Time-Domain Simulations 33 design, which is also where the largest field gradients occur in the structure, would obviously be the PSW region including where the coupling junctions are located. Therefore, a mesh override region with cell sizes shown in Table 4.1 is defined to form the mesh for that region. The approximate number of cells required to cover the PSW regions are also shown in the table. The Si wire, silica and air regions are meshed with various sizes of larger cells determined by the automatic algorithm. The entire computational domain is terminated with perfectly matched layers (PMLs), which is important for plasmonic simulations because they more closely emulate continuous space by absorbing the fields as they hit the boundaries even when placed very close to strong field regions [46, 62]. A mode source is launched into the input Si wire one micron away from the junction position in the form of a short pulse that spans wavelengths from the 800 nm to 2800 nm. Three detectors are placed 10 nm, 100 nm and 1000 nm deep into the waveguide being coupled into, and the transmission is obtain by applying Equation 4.1 onto the dataset [63]. Re{P monitor (f)} ds T (f) = Re{P source (f)} ds (4.1) The spectrally-resolved power through each detector is integrated over the monitor surface and normalized with respect to the source power, allowing us to plot the transmissions at specific wavelengths as the sweep parameter is varied or entire transmission spectrums. The first 10 nm deep detector is used to generate the results presented and it is placed as close as possible to the coupling junction to minimize the propagation loss effects. The two detectors placed deeper into the waveguides are included to verify that the

54 Chapter 4. Finite-Difference Time-Domain Simulations 34 power is actually coupled into and propagates along the waveguide, and is not due to the scattered fields at the junction. 4.2 The Orthogonal Junction and Effects of Silicon Wire Widths Figure 4.1: Light coupling from Si wire to PSW upon continuous wave excitation at λ = 1550 nm. Bright spots generated by 2D FDTD simulation depict electric field intensities across the junction. 2D and 3D versions of the junction model shown in Figure 4.1 are created in Lumerical to prototype effects of various parameters and a particularly interesting parameter is the spectrum position shift resulting from different Si wire widths. The figure shown is illuminated with electric field intensities

55 Chapter 4. Finite-Difference Time-Domain Simulations 35 from a continuous wave at λ = 1550 nm to depict the coupling from Si wire to PSW, while other simulation results presented are obtained from a short pulse input spanning the 800 nm to 2800 nm wavelength range. The Si wire width is varied across the 100 nm to 500 nm range using a Lumerical script that would run the FDTD simulation at each parameter value, outputting results that can be post-processed in Matlab. A sample parameter-sweeping script is shown in Appendix A. Figure 4.2: Analytically calculated phase mismatch between k SP P of an air-filled slot and k x of Si wires with width w [generated by and courtesy of Mohamed Swillam]. The intersection point that indicates the maximum coupling efficiency red-shifts as w is increased. To predict what may be expected from the Si wire width variations, we can extend the previous analytical results by plotting the k x for Si wires with

56 Chapter 4. Finite-Difference Time-Domain Simulations 36 widths in the 300 nm to 600 nm range. The wavelength where phase-matching with the PSW occurs can be found by locating the intersection point between k x and k SP P, and that point should translate to the peak in the transmission spectrum. Note that the junction is more complex than a perfect interface between a pure Si wire and a pure PSW, as the proximity of the two sections affect the effective indices of each other in where they converge. Therefore, the analytical model may not perfectly locate the transmission peaks, but is nonetheless expected to forecast the general trend of how the transmission would respond to varying Si wire widths. Table 4.2: Transmission spectrum peak locations derived from analytical and simulated results for different values of Si wire width. Si wire width (nm) Analytical peak position (nm) Simulated peak position (nm) In Figure 4.2, we find that as the Si wire is made wider, the intersection point between k x and k SP P red-shifts. This observation is consistent with the FDTD-generated transmission spectra shown in Figure 4.3. The intersection points in the dispersion plots as well as spectral peaks in the simulated results are summarized in Table 4.2. The values are in good agreement, especially for the 500 nm wide Si wire. Figure 4.3 also shows that the orthogonal junction features an extremely wide transmission band with its full width at half maximum spanning approximately 1 micron.

57 Chapter 4. Finite-Difference Time-Domain Simulations 37 Figure 4.3: 3D FDTD simulated transmission spectra red-shifting with increasing Si wire widths. A 996 nm wide FWHM spectrum is recorded for a 400 nm Si wire.

58 Chapter 4. Finite-Difference Time-Domain Simulations 38 Figure 4.4: 3D FDTD simulated transmission at λ = 1550 nm for different Si wire widths. Peak coupling efficiency occurs for a Si wire width slightly above 400 nm at this specific wavelength.

59 Chapter 4. Finite-Difference Time-Domain Simulations 39 To determine the optimal width for coupling at the telecom wavelength, the λ = 1550 nm results are plotted versus Si wire widths in steps of 25 nm, as shown in Figure 4.4. The results show that the peak coupling efficiency of 68% occurs when the Si wire is 425 nm wide. Based on this observation, the coupling platform is designed with 400 nm wide input and output waveguides that targets a micron-wide coupling spectrum centred around the telecom wavelength. 4.3 The Orthogonal Coupling Platform and Resonance Effects The orthogonal coupling platform consists of a PSW with its input and output ends attached to Si wires through the orthogonal junctions described in the previous section. The basic model is shown in Figure 4.5, where a 340 nm thick layer of Ag and Si wires sit on top of a silica substrate. The cover layer is filled with air and the PSW is filled with a material with a configurable refractive index, but is currently set to n = 1. P 1 and P 2 indicate the positions of the mode source and power monitor, respectively. Figure 4.5 describes a simplistic view resembling the physical device. However, in the actual simulation model, additional details are added to handle the fact that a finite volume, or the computational domain, is simulated and that the PML boundaries do have small reflections. Figure 4.6 (a) shows two slabs of Ag on the two ends of the Ag layer used to block scattered and reflected light, preventing it from bouncing off the boundaries and entering the power monitors. These slabs are sufficiently far from the coupling region and should not interfere with the coupling, and they terminate at the end of

60 Chapter 4. Finite-Difference Time-Domain Simulations 40 Figure 4.5: 3D FDTD model for the orthogonal coupling platform. The P1 and P2 surfaces indicate positions of the source and detector, respectively. the computational domain, as depicted in (b). Also shown in the figure are the extra power monitors at 100 nm and 1000 nm, in addition to the one 10 nm deep in the Si wire, included for reasons discussed in Section 4.1. The mesh override region and a movie monitor slicing the structure in its height to generate frames like Figure 4.1 are also shown. The objective in modeling the coupling platform is to investigate the coupling spectrum and resonance effects, and contrast it with the parallel coupling configuration. Figure 4.6 (c) and (d) are created as an extension to the 2D design by Fan et al. [4]. The resonances presented in the paper, generated using a finite-difference frequency-domain (FDFD) method, is reproduced in Figure 4.7, where the inset shows the 2D model based on a 300 nm wide Si wire and a 50 nm wide PSW. Strong resonances at λ = 1550 nm are observed as the

61 Chapter 4. Finite-Difference Time-Domain Simulations 41 (a) Orthogonal coupling platform model (b) Orthogonal coupling platform model, with computational domain, fine-meshing region and power detectors (c) Parallel coupling platform model (d) Parallel coupling platform model, with computational domain, fine-meshing region and power detectors Figure 4.6: 3D models constructed in Lumerical FDTD to compute transmissions of the orthogonal and parallel coupling schemes over wavelengths from 800 to 2800 nm.

62 Chapter 4. Finite-Difference Time-Domain Simulations 42 Figure 4.7: Transmissions at λ = 1550 nm generated from a 2D FDFD method by Fan et al. Inset shows the model and its parameters w d, w p and l. The first two parameters are set to 300 nm and 50 nm, respectively, while the cavity length is swept from 0 to 2000 nm [4].

63 Chapter 4. Finite-Difference Time-Domain Simulations 43 Figure 4.8: 2D FDTD simulated transmissions for the orthogonal and parallel coupling schemes, contrasting the resonance effects of both configurations. Inset shows how the cavity length, L, is defined in the orthogonal case, as described in Section

64 Chapter 4. Finite-Difference Time-Domain Simulations 44 cavity length is varied over a range from 0 to 2000 nm, making this platform unsuitable for general optical interconnect applications as the transmission depends heavily on the lengths of the PSWs. To compare this parallel coupling scheme with the orthogonal configuration, both models are created in 2D with 400 nm wide Si wires and simulated in Lumerical FDTD, sweeping over cavity lengths. The transmission of the 1550 nm spectral component is picked out from the broadband simulation and results from both models are shown in Figure 4.8. The matching resonance features produced in FDTD compared to FDFD results by Fan et al. also serve as a check of employing the FDTD method. The orthogonal platform results show very shallow resonance peaks as expected due to the Si wire coupling into the PSW over a 400 nm region. The lack of a well-defined coupling interface smoothes out the resonance effects, and the peak locations are also slightly shifted with respect to the parallel configuration. The 2D results seem very promising for using the orthogonal platform to prototype optical interconnect applications, but resonances is only half of the picture. To carry a high bit rate signal, the transmission must be broadband, and the computed bandwidth would only be reliable when simulated in 3D. The 3D versions of these coupling platforms, as shown in Figure 4.6, are simulated to generate realistic coupling spectra. It is observed that the coupling spectrum for the parallel model actually resides in the short wavelength range, overlapping the Si absorption band and cutting off below the telecom wavelength. Although varying the Si wire width would likely change the location and bandwidth of the coupling spectrum, it would be limited by the dimension mismatch between the Si wire and the plasmonic slot, so slot dimensions would also have to scale accordingly.

65 Chapter 4. Finite-Difference Time-Domain Simulations 45 Figure 4.9: 3D FDTD simulated transmission spectrum for a 2 micron long cavity accessed via 400 nm wide Si wires on the orthogonal coupling platform. The resonance peaks can be observed from this plot. The coupling spectrum at FWHM is 733 nm wide.

66 Chapter 4. Finite-Difference Time-Domain Simulations 46 Figure 4.10: 3D FDTD simulated transmissions at λ = 1550 nm for different cavity lengths accessed via 400 nm wide Si wires on the orthogonal coupling platform. The resonance peaks can be observed on top of the decay that corresponds to the increasing propagation losses as the plasmonic cavity length is increased.

67 Chapter 4. Finite-Difference Time-Domain Simulations 47 In the case of the orthogonal coupling platform, the 3D FDTD simulated spectrum for a 2000 nm long cavity is shown in Figure 4.9. The transmission spectrum, including propagation losses, peak at 36% at λ = 1590 nm. Resonance peaks can be seen over the spectrum and its full width half maximum bandwidth is 733 nm. To observe these resonance peaks with respect to spatial dimensions, a 3D FDTD version of Figure 4.8 is shown in Figure We see that the resonances are smoothed out as before and the coupling efficiencies at shorter cavity lengths, where propagation losses are minimal, are in excess of 50%. The efficient wideband coupling along with the smooth transmission spectrum that can be controlled by analytically-deduced parameters make the orthogonal coupling platform very suitable for prototyping signal transmissions through a PSW. 4.4 High-index Plasmonic Slots With certain applications such as sensing, the air slot may be filled with materials with a high refractive index, n. We once again look at the analytically derived momentum mismatch to predict the effects on transmission. In Figure 4.11, k SP P for values of plasmonic slot index, n, from 1.0 to 2.0 are plotted. The range of n is chosen based on practical refractive indices of liquids and polymers, which are the likely candidates for a filler material. The results show increasing momentum mismatch as n is increased, which translates to weaker coupling as demonstrated by the FDTD simulation results in Figure It is also apparent that the coupling efficiency drops primarily at the short wavelength edge of the spectrum, corresponding to where the momentum mismatch increases the most as n is increased. It is suspected that the effect can be counterbalanced by using narrower Si wires, which would shift

68 Chapter 4. Finite-Difference Time-Domain Simulations 48 Figure 4.11: Analytically calculated phase mismatch between k x of a 500 nm wide Si wire and k SP P of PSWs filled with materials of refractive index n [generated by and courtesy of Mohamed Swillam]. As n is increased, the momentum gap between k x and k SP P widens, especially for the short wavelengths.

69 Chapter 4. Finite-Difference Time-Domain Simulations 49 Figure 4.12: 3D FDTD simulated transmission spectra showing weaker coupling as n is increased from 1.0 to 2.0. The simulation is based on a junction with a 400 nm Si wire. The coupling efficiency drop is more significant for the short wavelengths, as expected from analytical results.

70 Chapter 4. Finite-Difference Time-Domain Simulations 50 the k x curve higher in momentum to minimize the mismatch with k SP P of a polymer-filled slot. There is though, of course, a limit to how narrow the Si wires can be made. The design based on the 400 nm wide Si wire in Figure 4.11 should provide sufficient coupling efficiency for most sensing applications.

71 Chapter 5 Fabrication of the Orthogonal Coupling Platform 5.1 Substrate and Fabrication Process Overview Fabrication of the device involves the Si wire coupling platform with the PSW on a single substrate. Like many other Si wire waveguides, the substrate of choice is a silicon-on-insulator (SOI) wafer. In particular, the wafers are 100 mm diameter SOI Unibond wafers manufactured by SOITEC. The 340 nm thick Si top-layer is chosen based on single-moded waveguiding requirements and limitations due to the focused ion beam (FIB) process, which will be explained in later sections. The Si dielectric waveguide and Ag plasmonic waveguide require layers of different materials, so multiple lithography steps are necessary. The design requires nanometer-precise alignment of the lithography layers and rapid prototyping where designs can be modified and optimized with a quick turnaround time. Therefore, electron beam lithography (EBL) is the patterning method of choice since it is a direct-write method without the need for a photomask. 51

72 Chapter 5. Fabrication of the Orthogonal Coupling Platform 52 In addition, the Vistec EBPG is particularly powerful for aligning multi-layered structures. The smallest features in the design are sub-100 nm, and access to a photolithography system with that resolution is not available. After the electron resists are patterned with the EBL system, these patterns are transferred to their respective layers using various methods. To create the Si wires, regions of the Si top-layer are fully etched until the buried oxide layer is exposed. The leftover regions of Si form the dielectric wires used to guide light to the area of interest, the PSW. To create the patch of Ag that would later form the walls of the PSW, a new layer of electron resist is spun onto the Si wire-patterned samples and a micron-scale window is opened at the desire region. The patch of Ag is deposited through this resist window, and not anywhere else via metal deposition followed by a lift-off process. The actual PSW, because of its tiny width and high height-to-width aspect ratio of 340:50, is unsuitable for lift-off. Therefore, the LEO (Zeiss) 1540XB FIB/SEM system at the University of Western Ontario Nanofabrication Facility is employed to mill the PSW across the Ag patch [64]. Figure 5.1 gives an overview of the micro- and nano-fabrication process, and the details for each step are documented in the following sections. Section 5.2 discusses topics relevant to creating patterns with the EBL tool, from the pattern design and electron resist coating to the marker system necessary for this multi-step processes. Section 5.3 discusses Si etching using the Phantom Reactive Ion Etcher, its limitations and how the consequences must be compensated for in the EBL pattern design. Section 5.4 details how metallic films are coated onto selected regions on the sample, including both Au alignment markers and the Ag film creating the PSW. The choice of metal evaporation technique and the lift-off process to dispose of metals covering film-free

73 Chapter 5. Fabrication of the Orthogonal Coupling Platform 53 (a) SOI substrate (b) 500 nm thick ZEP patterned (c) 50 nm thick Au deposited (d) Au markers formed by lift-off (e) 350 nm thick ZEP patterned (f) Si top-layer etched (g) ZEP removed (h) 500 nm thick ZEP patterned (i) 340 nm thick Ag deposited (j) Ag patches formed by lift-off (k) PSWs milled using FIB Figure 5.1: Schematics depicting the device fabrication process flow.

74 Chapter 5. Fabrication of the Orthogonal Coupling Platform 54 regions are discussed in this section. Section 5.5 describes the FIB process where the PSWs are created, followed by Section 5.6 on post-processing of the samples for optical characterization. Future steps for optimization from a fabrication perspective are suggested at the end of each section and a summary of the device fabrication recipe is include in Appendix B. 5.2 Patterning with Electron Beam Lithography Pattern Design Figure 5.2: Different sections of the Si wire-psw coupling platform. Light is coupled through a 2.5 micron wide Si wire section, tapered to a single-moded section and orthogonally coupled to the PSW, then back out into a wide Si wire. The device, excluding alignment markers, can be grouped into four sections: cleave sections, adiabatic tapers, single-moded waveguide sections and the PSW. The first three are part of the Si wire layer and are mirrored across the PSW, as shown in Figure 5.2. The 2 mm long cleave section is designed to couple light from a lensed fiber during optical characterization, and the sample is to be cleaved somewhere along this 2 mm length from both sides. The cross-sectional dimensions for this cleave section are 2500 nm wide by 340 nm thick throughout, leading to a 2 mm long adiabatic taper that would gradually drop the Si wire width to 400 nm as the mode becomes singlemoded. Then this 400 nm by 340 nm cross-sectional profile will continue

75 Chapter 5. Fabrication of the Orthogonal Coupling Platform 55 through the single-moded waveguide section for approximately 0.5 mm before entering into the PSW at the centre. The light is then coupled out through the mirrored structure. The first three sections described above make up the Si wire system used to bring input light from a lensed fiber with a micron-scale spot size to submicron dimensions through tapering and high index contrast guiding. The orthogonal junction between the Si wire and the PSW, along with the plasmonic effects are responsible for focusing the light down to sub-100 nm dimensions, another order of magnitude smaller, into the PSW. The orthogonal coupling scheme is implemented by offsetting the Si wires as shown in Figure 5.3 and the Ag patch for the PSW is later created between those Si wires as shown in Figure 5.4. The multiple layers of lithography patterns are created using the L-edit software, generating pattern files in GDSII format, which are then fractured into regions of specified electron dosages. Excluding the alignment marker layer, the device is created in two EBL steps one for the Si wires and the other for the Ag patches. Because the Si wires are etched and the Ag films require a lift-off process, the electron beam resist requirements are different for each layer as well Coating and Patterning the Electron Resist The electron resist ZEP520A (undiluted) is used for all EBL layers in the fabrication process, although with varying thicknesses. ZEP is chosen for its good resolution and sensitivity, allowing patterns small and large to be quickly written with an electron beam. ZEP also serves as a good mask

76 Chapter 5. Fabrication of the Orthogonal Coupling Platform 56 (a) Coupling platform in Figure 5.2 alongside markers and continuous Si wires. Circled regions in SEM below. (b) Offset Si wires for 200 nm PSW (c) Offset Si wires for 800 nm PSW (d) Offset Si wires for 1400 nm PSW (e) Offset Si wires for 2000 nm PSW Figure 5.3: Offset Si wires that would later be bridged with PSWs.

77 Chapter 5. Fabrication of the Orthogonal Coupling Platform 57 (a) Resist window aligned with the gap bridging the offset Si wires, through which the Ag to have the PSW patterned through FIB milling. (b) Ag patch created between offset Si wires, ready layer forming the PSW is deposited. Figure 5.4: Ag patches deposited between offset Si wires. Precise alignment is achieved by the EBL tool using the square markers shown. for Si etching and its ease of removal is favourable for the lift-off processes. Because ZEP is a positive resist, which means exposed regions are washed away during development, the Si wires are actually formed from unexposed regions. However, using the electron beam to write everywhere across the sample surface would be impractical, hence 2 micron trenches are defined on both sides of the Si wires, leaving those regions air-filled after etching and thus defining the waveguide structure in between. To pattern the Si wires, room-temperature ZEP is spun at 6000 rpm to coat a 350 nm thick uniform film across the sample surface. The sample is then baked on a 180 C hot plate for 3 minutes. The Si wire pattern fractured at 10 nm resolution is then written with a 230 µc/cm 2 dose with a 10 na electron beam current. The dose is determined through a dose test, which steps the desired pattern over a range of doses and the resulting patterns are inspected

78 Chapter 5. Fabrication of the Orthogonal Coupling Platform 58 under scanning electron microscopy (SEM) to find the optimal dose. The precise dose depends on the resist thickness and the specific pattern, which becomes increasingly critical with smaller features in the pattern. For the Si wires in this layer, anywhere within the dose range from 230 to 260 µc/cm 2 would be sufficient. Electron beam exposure is followed by a development step which involves immersing the sample for 60 s in ZED-N50, after which the electron-exposed areas will be washed away and the patterns will appear. To bring the development to a stop and prevent over-development, the sample is immediately immersed into a 9:1 mix of MIBK:IPA for 30 s and then dried with nitrogen gas for at least 40 s. After development, the sample is ready for the next step of the fabrication process where the resist pattern is to be transferred to the substrate. For the Si wire layer, the method is etching, and for the Ag patch it is metal deposition and lift-off. In a lift-off process, a thicker resist is desired for reasons that will be discussed later, so that resist layer is spun at 2000 rpm for a 500 nm thick film, which requires a 270 µc/cm 2 dose for exposure and 70 s in ZED-N50 during development Marker System for Alignment of Layers To align the Si wire layer with the Ag layer, a marker system is needed to form a common grid that the EBL tool can automatically identify as a reference. Various sizes and marker materials, as well as their placement are tested to achieve the nanometer-precision required in this design. The first type of markers tested are 5 micron by 5 micron boxes of etch markers, which

79 Chapter 5. Fabrication of the Orthogonal Coupling Platform 59 (a) Misalignment in two dimensions (b) Misalignment in one dimension Figure 5.5: Misaligned lithography layers. can be patterned alongside the Si wires in the same lithography step. They are placed as shown in Figure 5.5 near where the Ag patch is to be placed. This system is found to cause several problems. First of all, the 5 micron by 5 micron boxes are difficult to locate on an optical microscope, and the contrast between the Si top-layer and the etched-in silica layer under the SEM is a challenge for the EBL tool to find. The imperfection of the Si etching process causes slanted sidewalls, which makes the box edges blurry and misalignments such as those found in Figure 5.5 are common. Because this is one of the first alignment processes with this EBL tool, there are unforeseen problems and limitations that require workarounds, one such problem is the large region of resist exposed during the search for the markers. As shown in Figure 5.6, the long time taken to identify markers (especially in the case of etch markers), would expose a large nearby area, causing those resists to be removed during development. To solve all these problems, the etch markers are replaced by 20 micron by 20 micron Au markers, and they also adopt a new arrangement as shown in Figure 5.6 (e).

80 Chapter 5. Fabrication of the Orthogonal Coupling Platform 60 (a) (b) (c) (d) Excess exposed areas filled with Ag (e) New marker placement. The top continuous Si wire is damaged from marker-searching, but the device in the middle line is untouched. Figure 5.6: Excess areas exposed in the resist during the marker-searching process of the EBL tool.

81 Chapter 5. Fabrication of the Orthogonal Coupling Platform 61 (a) 200 nm offset Si wires after etch (b) 2000 nm offset Si wires after etch (c) 200 nm offset Si wires with resist window (d) 800 nm offset Si wires with resist window (e) 1400 nm offset Si wires with resist window (f) 2000 nm offset Si wires with resist window (g) 200 nm PSW (h) 2000 nm PSW Figure 5.7: Properly aligned resist window / Ag patch with Si wire layer. The optical and SEM images show the device at various stages in the fabrication process.

82 Chapter 5. Fabrication of the Orthogonal Coupling Platform 62 (a) Large alignment offsets that occur in a small (b) Small tilt offset occurring in many samples number of samples Figure 5.8: Two types of misalignments that occur in the batch of samples. These imperfections greatly affect the coupling mechanism and would make the device unuseable. The migration from an etch marker system to Au markers also mean addition of an extra EBL step. Before patterning the Si wires, a grid of Au markers are patterned onto the Si surface. The process to form this layer is similar to how the Ag patches are created, through metal deposition and lift-off, but because the Au is coated on top of Si while the Ag is on silica, the adhesion properties are very different. As a result, the lift-off recipes are completely different as well, and the details would be discussed in later sections. It is however important to point out that a small percentage of Au markers are lost in the lift-off process as they peel off the Si surface, and an imperfect marker system with missing grid points prevent us from running more sophisticated alignment procedures. The current Au marker system with sharp vertical sidewalls and good imaging contrast, placed sufficiently far away from device regions have achieved excellent nanometer-scale precision, as shown in Figure 5.7. Although there are occasional misalignments we cannot explain, and smaller scale tilt aligns that decrease the yield of the process, it allowed the

83 Chapter 5. Fabrication of the Orthogonal Coupling Platform 63 fabrication of one final device that we can optically characterize. Figure 5.7 shows the properly aligned layers, and Figure 5.8 (a) shows the occasional sample that fails in the alignment for unknown reasons, and one with tilt offset on the order of 10 nm under SEM inspection is shown in 5.8 (b) Suggestions for Future Optimizations (a) Coarse global alignment currently in use (b) Fine local alignment. (c) Missing grid point that would halt stepping algorithm Figure 5.9: Schematics of various alignment methods of the EBL tool. (a) is the currently used method, but adding (b) to the alignment process would achieve more precise alignment and is recommended for future revisions of the device. The alignment method relies on the search algorithm to identify four grid points on all four corners of a rectangular box to overlay two patterns. The current method is depicted in Figure 5.9 (a), where only the outermost markers in a set are used. However, the alignment accuracy can potentially be improved by employing a two-step alignment process. First, the outermost markers are to be used to do a coarse global alignment, then the four markers nearest to the area for exposure would be used for a fine alignment, as shown in Figure 5.9 (b). Then the process is repeated for each device by stepping rightward along the grid. However, the algorithm cannot tolerate a grid with missing grid points along the stepping process, as depicted in Figure 5.9 (c), so this more complex method cannot be employed until the Au lift-off process

84 Chapter 5. Fabrication of the Orthogonal Coupling Platform 64 is optimized to form a perfect grid. 5.3 Etching Silicon Wire Waveguides Silicon Etching Recipe Optimization The Phantom Etcher used for Si etching at the Emerging Communications Technology Institute (ECTI) facilities [65] allow control over 8 variables: ICP, RIE, SF 6, CHF 3, O 2, pressure, time, and He for backside sample cooling. The plasma is created through the inductively-coupled plasma (ICP) power and the capacitively-coupled reactive ion etching (RIE) power. The RIE power generates a plasma from the gas mixture and accelerate the ions toward the bottom plate holding the sample, resulting in an anisotropic etch through the physical bombardment in addition to the chemical reactions [5]. On the other hand, the ICP generates a dense plasma that enhances the etch rate, but without a specific directionality, resulting in a more isotropic etch that relies on the chemical processes. These chemical reactions that convert Si into volatile molecules are explained in Appendix C. The various gas components are specified in sccm (standard cc/min), the pressure is the chamber pressure to maintain with the gases injected, and the He flows underneath the sample for cooling during the etching process. Initial etch tests were based on ICP or a mixture of ICP and RIE powers. As shown in Figure 5.10 (a) to (d), the etches are very isotropic and no physical damage is done to the ZEP layer at all. From Figure 5.10 (a) it is clear that the full 350 nm of ZEP remain unchanged in thickness and shape on top of the 340 nm thick Si wire. In Figure 5.10 (b) and (c), the ZEP dropped to the silica surface because the ZEP-Si interface has been destroyed from the high-

85 Chapter 5. Fabrication of the Orthogonal Coupling Platform 65 power prolonged ICP etching. The etch rates of Si are in the range of 1 nm/s and is highly selective between Si and silica, as the silica layer is not etched at all. To obtain a reproducible recipe, it is desirable to have longer etch times, or slow etch rate, because the chamber conditions fluctuate during the first few seconds of the etch. Most of the power is reflected and it is difficult to predict the etch rate during those few seconds. It is clear that a more anisotropic process is needed, ideally with lower etch rates as well. Recipe 4, with its corresponding etch profile shown in Figure 5.10 (d), is a lower power mixture of ICP and RIE powers with a much lower SF 6 flow rate. This effectively decreased the etch rate, as 127 nm of the 340 nm Si top-layer remain after the 90 s etch. The RIE, however, etched the 350 nm ZEP down to 159 nm as well, but with physical ion bombardment towards the sample plane, anisotropy is also enhanced. The ICP power in Recipe 5-9 are completely dropped as a high density plasma generated by the inductively-coupled coils are no longer necessary because a high etch rate is not only unnecessary, but undesirable. A 100 W RIE power process is adopted and the gas mixture and pressures are tuned to investigate a chemical process that would provide passivation effects to the surfaces [5]. A comparison between Recipe 5 and 7, results shown in Figure 5.10 (e) and (g) respectively, show that a higher O 2 flow rate can tune this passivation, effectively reducing the etch rates. Details about the passivation chemistry is discussed in Appendix C. In Recipe 8 and 9, shown in Figure 5.10 (h) and (i) respectively, higher O 2 levels are maintained in the gas mixture. Together with a higher chamber pressure, we can control the amount of resist damage at the edges of the

86 Chapter 5. Fabrication of the Orthogonal Coupling Platform 66 Table 5.1: Representative recipes of the Si etching optimization process. Recipe ICP RIE SF 6 CHF 3 O 2 Pressure Time W 0 W 20 sccm 0 sccm 1.5 sccm 30 mtorr 40 s Table 5.2: Optimized recipes for silicon wire etching. Recipe ICP RIE SF 6 CHF 3 O 2 Pressure He Time A 0 W 100 W 30 sccm 12 sccm 18 sccm 100 mtorr 10 sccm 60 s B C D

87 Chapter 5. Fabrication of the Orthogonal Coupling Platform 67 (a) Recipe 1 (b) Recipe 2 (c) Recipe 3 (d) Recipe 4 (e) Recipe 5 (f) Recipe 6 (g) Recipe 7 (h) Recipe 8 (i) Recipe 9 Figure 5.10: Representative SEMs of the Si etching optimization process. The earlier recipes lead to isotropic etches that produce narrow Si wires with very slanted sidewalls.

88 Chapter 5. Fabrication of the Orthogonal Coupling Platform 68 (a) Recipe A (b) Recipe B (c) Recipe C (d) Recipe D (resist removed) Figure 5.11: Optimized recipes for Si wire etching. The Si wires have relatively vertical sidewalls compared to the earlier recipes and their dimensions are much more controllable.

89 Chapter 5. Fabrication of the Orthogonal Coupling Platform 69 pattern, thus the widths of the transferred Si wires and the amount of undercutting. With control over the etch rates and resist width, we proceeded to increase the RIE power to add anisotropy to the etch, resulting in Recipe A-D that were used to fabricate the final devices. He gas is also added for backside cooling of the samples, and the results are shown in Figure Compensation for Undercut and Slanted Sidewalls (a) Recipe C (b) Design targeting 400 nm wide Si wire. Inset shows top-view of actual Si wire waveguide fabricated with this design. Figure 5.12: Si wire waveguide cross-section and resist pattern design. Because the Si etching process does not perfectly transfer the resist pattern to the Si layer, the pattern must be modified to target a nominal width of 400 nm at the middle of the midpoint of the waveguide cross-section. The waveguide created using a 700 nm wide resist pattern and Recipe C is depicted in Figure 5.12 (a), with the measurements corresponding to the Figure 5.11 (c) SEM image. The nominal width of the Si wire is 576 nm and the RIE process has etched the resist edges, leaving only 556 nm of the 700 nm wide

90 Chapter 5. Fabrication of the Orthogonal Coupling Platform 70 resist. To design for a 400 nm nominal width waveguide, we need a 524 nm wide resist, as shown in Figure 5.12 (b). The inset shows the fabricated structure with measurements of the waveguide top and bottom. While the dimensions do not completely agree as the sidewalls are more angled than expected, the nominal width is 381 nm, close enough to the targeted 400 nm and the waveguide will remain single-moded near the telecom wavelength Suggestions for Future Optimizations Figure 5.13: Gap between Si wire and PSW leading to significant light leakage. Due to undercutting in the etching process, the Si wires have slanted sidewalls that creates a gap with the Ag patch, which should have been in direct

91 Chapter 5. Fabrication of the Orthogonal Coupling Platform 71 contact, as shown in Simulations have shown that this small gap would lead to significant losses tens of percents at each coupler. The Si wires are also slightly shortened at the ends with a slanted sidewall facing the PSW. These problems can be solved if the Si etching recipe can create 90 sidewalls, making the cross-sectional profile rectangular rather than trapezoidal. The current process with the Phantom etcher is already optimized for anisotropic etching to create the most vertical sidewalls possible. To improve this process further, it is recommended that the deep reactive ion etching (DRIE) tool at the University of Western Ontario Nanofabrication Facility be used. The Alcatel 601E Deep Silicon Etch System can create high aspect ratio silicon structures using a cryogenic process or a patented Bosch process, where undercut is limited using controlled passivation effects of the sidewalls [64]. 5.4 Metal Deposition and the Lift-off Process Metal Evaporation An electron beam metal evaporator was initially used to deposit Ag films onto the sample, but it was later discovered that the heat generated in the process effectively bakes the ZEP electron resist, making it extremely difficult to remove afterwards. The hard-baked ZEP, coated with Ag, becomes inert to the ZD-MAC resist remover even under elevated temperatures for extended periods of time. It would take physical contact with a ZD-MAC dipped cotton swab to scratch off the resist, which also causes damage to the device. As a result, the thermal evaporator is employed, which comes at the expense of film quality and thickness control as low deposition rates with this tool are unstable. Figure 5.14 shows the Ag film on silica, alongside the Si top-

92 Chapter 5. Fabrication of the Orthogonal Coupling Platform 72 Figure 5.14: 350 nm thick Ag film deposited onto the silica surface alongside Si top-layer of the SOI wafer.

93 Chapter 5. Fabrication of the Orthogonal Coupling Platform 73 layer. Large grains on the Ag surface resulting from the high deposition rates are easily identifiable. For deposition of the Au markers, the same thermal evaporation system is used to create 50 nm thick square markers on the Si top-layer. After each of these metal deposition processes, the excess metals are removed via a lift-off process Lift-off Figure 5.15: Continuous film on one side of the step from Ag deposition process. The bridging of the films is undesirable for lift-off as it may peel off the film that should have stayed on the substrate. The lift-off process involves removal of the ZEP, which would also lift the excess metal deposited on top while leaving the metallic patterns deposited

94 Chapter 5. Fabrication of the Orthogonal Coupling Platform 74 through the resist windows. It is important that the deposition does not form a conformal metallic film covering the sidewalls of the resist, otherwise the continuous film may peel off from the substrate bringing the patterns with it. In physical vapour deposition processes, as compared to chemical coating processes, the film is usually non-conformal. However, as Figure 5.15 shows with a test sample, one side of the bump has a thin layer of Ag bridging the step. This is due to the misalignment between the metal source and the sample. When the metal source is not aligned directly overhead of the sample, one of the sidewalls is exposed to the metal vapour beam at an angle. (a) 200 nm Si wire offset (b) 800 nm Si wire offset (c) 1400 nm Si wire offset (d) 2000 nm Si wire offset Figure 5.16: Ag patch on samples after lift-off. To alleviate the lift-off problem that a continuous film may cause, the ZEP layer is made as thick as possible. The 500 nm thick resist for lift-off is about 5 times thicker than the one shown in Figure 5.15, positioned on top of the 340 nm Si top-layer, a 840 nm step is effectively created for 340 nm of Ag

95 Chapter 5. Fabrication of the Orthogonal Coupling Platform 75 deposition. The adhesion between a Ag-silica interface is quite strong so the lift-off process is not a big challenge. The process involves heating the ZEP remover, ZD-MAC, to 80 C on a hot plate and immersing the sample in for 10 minutes with occasional agitation. Then placing the beaker in the ultrasonic bath for 8 s and rinsing with acetone and IPA. If there is residual resist or metals left on the sample surface, it is placed back into the ZD-MAC for an extra 30 s, followed by the ultrasonic treatment for a few seconds and then rinsed with acetone and IPA. This is repeated until the surface is free of residual resist. Results from the Ag deposition through the ZEP windows after the lift-off is shown in Figure The Au lift-off process is a much bigger challenge due to two reasons. 50 nm of Au is deposited on top of Si rather than silica, and the Au-Si interface has very weak adhesive forces. To enhance the adhesion, the marker size is increased to 20 micron by 20 micron, the maximum allowed for the EBL alignment algorithm. The second reason is that the Au markers are deposited level with the ZEP, whereas in the Ag case, the patches rest in a trench created by previous Si etching and are level with the Si layer. Application of the Ag lift-off recipe completely removes all the Au including the markers. Therefore, a separate recipe is developed for Au lift-off. The Au lift-off recipe does not rely on elevated temperatures. Instead, the sample is soaked in ZD-MAC at room temperature and then left in the ultrasonic bath until all the resist and excess Au is shaken off the sample surface. This method, however, is not a perfect solution as about 5% of the markers are detached from the Si top-layer. These missing grid points prevented us from using more sophisticated alignment procedures, as mentioned in Section

96 Chapter 5. Fabrication of the Orthogonal Coupling Platform Ag Particles Scattered Across Sample Surface (a) Ag particles near device region (b) Zoomed in image of Ag particle showing grains Figure 5.17: Ag particles scattered across sample surface leading to significant attenuation of light. They must be removed with a post-processing step before optical characterization. It was later discovered that there are micron-scale particles of Ag consisting of a few crystal grains resulting from the lift-off. These grains shown in Figure 5.17 are found throughout the surface, but primarily concentrated near the Ag patches. Some of them also stick to the sidewalls of the Si wire as they become trapped in the etched-in trenches, causing high losses when light is coupled in. Initial optical characterizations show that the losses would attenuate the mode completely and no mode can be found on the output facet of the Si wires. Therefore, these Ag particles must be cleaned with the post-processing steps described in Section Suggestions for Future Optimizations The Ag particles scattered across the surface may be eliminated by adopting a bilayer lift-off process to avoid any contact between the metal and the resist.

97 Chapter 5. Fabrication of the Orthogonal Coupling Platform 77 It is also suggested that a slower rate of deposition be used to obtain smaller grain sizes in the Ag, then the PSW sidewalls can be made smoother. It is also discovered in subsequent tests that the thickness monitor of the thermal evaporator often display incorrect thickness readings. The thickness displayed may be as much as 50% thinner or thicker than the actual film thickness, so verification with an atomic force microscope (AFM) or profilometer is recommended. As for the Au markers, a thin layer of Cr adhesion layer is recommended prior to depositing the Au. This would allow the markers to adhere better to the Si surface, and the lift-off may transfer all grid points to the sample; thus allowing the algorithm to perform both global and local alignment. 5.5 Focused Ion Beam Milling of Plasmonic Slots Testing for Fabrication Limits At first, some preliminary tests are carried out to investigate the capability of the FIB tool to mill 50 nm wide lines. This proved to be a relatively simple task once the optimal dose is obtained and the amount of milling into the silica is minimal, as shown in Figure To image the cross-sections, the FIB first uses a small spot size to draw the lines, then switch to a larger spot size and dose to open up a trench perpendicularly across. SEM images are obtained in the same chamber and the tool at the University of Western Ontario Nanofabrication Facility [64] is capable of imaging while the sample is being milled Plasmonic Slot Milling Process

98 Chapter 5. Fabrication of the Orthogonal Coupling Platform 78 (a) FIB dose test lines (b) FIB dose test lines (zoomed) (c) Lines milled at fixed optimal dose (d) Measuring milling depth into substrate Figure 5.18: Preliminary testing of the FIB tool to mill out 50 nm wide slots on Ag.

99 Chapter 5. Fabrication of the Orthogonal Coupling Platform 79 (a) Dose test on 340 nm thick Ag (b) Ag patch alongside Si wires (c) Surface ready for three-pass milling (d) Surface after three-pass milling Figure 5.19: The FIB process flow for milling out the PSWs.

100 Chapter 5. Fabrication of the Orthogonal Coupling Platform 80 After confirming the feasibility of fabricating PSWs on a flat Ag surface, the device samples are brought in. These PSWs need to be milled in very specific locations with nanometer-scale precision. The very first step is to figure out the necessary dose to mill through the 340 nm thick Ag film, as shown in Figure 5.19 (a). The tapering of the trench is also evident in the figure and it puts a limit on the aspect ratio, setting an upper-bound to the thickness of the Ag layer and hence the thickness of the Si top-layer of the SOI wafer as well. Next in Figure 5.19 (b), the region of interest is inspected and left in the chamber until temperature equilibrium is reached, and the image no longer drifts. Then a three-pass milling step is employed to ensure no residual Ag is sputtered onto the Si wire facets. The three lines are drawn across the image, representing the paths to be milled at the optimal dose. These lines can be seen in Figure 5.19 (c) and (d), but they are moved to one side for imaging purposes Final Device with Plasmonic Slot Waveguides Figure 5.20 shows the 200 nm and 2000 nm PSWs aligned perfectly across the Ag patch, imaged at various angles and zoom levels. Undesired Ag particles resulting from the lift-off are also evident in these SEM images. Figure 5.21 shows all ten PSWs on the sample where optical characterization is carried out on. The PSWs range from 200 nm to 2000 nm in steps of 200 nm. 5.6 Post-Processing for Optical Characterization As mentioned in Section 5.4.3, the sample surface is covered with Ag particles that make the waveguides unusable. The solution was to immerse the samples in ZD-MAC and provide agitation with the ultrasonic bath for 5 min. The

101 Chapter 5. Fabrication of the Orthogonal Coupling Platform 81 (a) 200 nm PSW angled view (b) 200 nm PSW close-up angled view (c) 2000 nm PSW angled view (d) 2000 nm PSW close-up angled view (e) 2000 nm PSW top view (f) 2000 nm PSW close-up top view Figure 5.20: 200 nm and 2000 nm PSWs imaged at different angles and zoom.

102 Chapter 5. Fabrication of the Orthogonal Coupling Platform 82 (a) 200 nm PSW (b) 400 nm PSW (c) 600 nm PSW (d) 800 nm PSW (e) 1000 nm PSW (f) 1200 nm PSW (g) 1400 nm PSW (h) 1600 nm PSW (i) 1800 nm PSW (j) 2000 nm PSW Figure 5.21: All devices used for optical characterization. PSW lengths range from 200 nm to 2000 nm in steps of 200 nm.

103 Chapter 5. Fabrication of the Orthogonal Coupling Platform 83 samples then need to be cleaved within the 2 mm Si wire cleave section on both ends so they can be optically tested via end-fire coupling from a lensed fiber. It is recommended that future designs should have longer cleave sections to make this step easier to perform.

104 Chapter 6 Optical Characterization 6.1 Optical Characterization Setup The objective of the optical characterization is to show that light can be coupled into and out of the PSW from the Si wires, and to back up our theory with experimentally measured data. Optical characterization experiments are setup to image the mode profile at the output waveguide and power measurements are conducted to gauge the efficiency of the Si wire-psw couplers. The prototype sample contains the Si wire-psw systems shown in Figure 5.2, with the various lengths of PSWs corresponding to Figure Full Si wires with the cleave and taper sections, but with no PSW section and zero offset between the two ends, are placed on both sides of each Si wire-psw system, as depicted in Figure 5.9 (a). A reference sample with offset Si wires and no Ag plasmonic section, as shown in Figure 5.3, is tested to ensure that no coupling occurs without the PSW. Any mode profile and output power we detect would be due to the presence of the plasmonic waveguide and not leakage from the offset Si wires. 84

105 Chapter 6. Optical Characterization 85 Figure 6.1: The experimental setup for optical characterization of the Si wire-psw coupling platform.

106 Chapter 6. Optical Characterization 86 The actual setup begins with the tunable laser outputting wavelengths near 1550 nm. The light is coupled to the sample on a stage through a lensed fiber that focuses the light down to a 2.5 micron spot size. As mentioned previously, the coupling mechanism requires that the light be TE-polarize, which is also what the simulations have been based on. So the fiber is passed through two pedals in a fiber polarization controller before reaching the sample. The first pedal acts as a quarter-wave plate to convert the light into a linear polarization, and the second pedal acts as a half-wave plate that rotates the linear polarization to become TE-polarized, with the electric field vector parallel to the sample surface. Through the lense-polished fiber end, the light is coupled into the cleaved facet of the 340 nm tall and 2.5 micron wide Si wire. The on-chip taper then delivers the light to the PSW through a single-moded section, and couples the light out with the mirrored geometry on the other end of the PSW. A 60x objective is used to gather the output light from the 2.5 micron wide facet of the output Si wire. The light is passed through an iris positioned directly in front of the camera or power detector, which is closed to block off unwanted light when taking power measurements. The camera is used to image the mode profiles discussed in Section 6.2 and the power detector would take its place for power measurements in Section 6.3 and Imaging the Mode Profile The mode profiles of the waveguides are imaged with an infrared camera behind the 60x objective. Two samples are under test: 1. the reference sample, with offset Si wires and no Ag layer

107 Chapter 6. Optical Characterization the prototype sample, with varying lengths of PSW bridging the offset Si wires (a) Si wire (b) 200 nm PSW (c) 400 nm PSW (d) 600 nm PSW (e) 800 nm PSW (f) 1000 nm PSW (g) 1200 nm PSW (h) 2000 nm PSW Figure 6.2: Mode profile of Si wire after passing through PSWs of various lengths. (b) to (h) are imaged with a higher gain compared to the full Si wire reference in (a). This is evident in the amount of background light collected in each image. Each of the two samples is also patterned with full Si wires that are continuous without any offset, and without any Ag section, arranged as shown in Figure 5.9 (a). It is expected that the PSW-loaded waveguides would produce a dimmer spot in comparison to the Si wires that should have low propagation losses. The presence of a detectable single-mode profile in the PSW-loaded sample, in addition to observing no transmission through the broken Si wires in the reference sample, would confirm that the orthogonal coupler is indeed functional. Imaging of the modes is aimed towards a qualitative confirmation, as quantitative comparisons are left to the next two sections. In both the reference and the prototype samples, the mode for the full Si wires are bright and easily located. In the reference sample, no mode can

108 Chapter 6. Optical Characterization 88 be found at the output facet of the offset Si wires. In the prototype sample, most offset Si wires with the PSW section show a dimmer, but still easily distinguishable mode, as shown in Figure 6.2. The waveguides containing 1400 nm, 1600 nm, and 1800 nm PSWs, however, do not output a detectable mode. A check at Figure 5.21 (g) to (i) do not show anything suspicious in the coupling region, so the reason for the coupling failure remains unknown. These waveguides are located adjacent to each other on the prototype sample and some of the full Si wires in the region also do not transmit light, so the problem is expected to be specific to this sample and is not a result of the coupling mechanism or design of the coupling platform. This can be verified when more samples are put under test in the future. Figure 6.2 therefore does not show those three PSW lengths. Note that the mode profiles are taken at different camera sensitivity settings, with the iris wide open. Even though Figure 6.2 (b) to (h) appear to have similar intensities as (a) in the images, the output powers are not on the same order of magnitude. This is evident when comparing the mode from each waveguide against the background light; more specifically, the horizontal line across the middle of each image that consists of the light guided through the Si top-layer. The layer is most distinct in (e) and can be seen throughout (b) to (h). However, the background of the Si wire image in (a) is completely dark because the camera is on a low sensitivity setting, and the strong power coupled through the Si wire waveguide overshadows any light coupled through the Si top-layer. This qualitatively confirms the PSW section adds additional losses as compare to a full Si wire, which of course is as expected. The magnitude of the losses would require careful power measurements discussed in the next two sections.

109 Chapter 6. Optical Characterization Power Measurements In the characterization setup, there are various loss mechanisms that contribute to the overall power loss between the laser power, P in, and the measured output power, P out. The system loss that encompasses the losses from the tunable laser to the output facet of the lensed fiber, as well as the freespace path through the objective to the detector, can be lumped into a transmission factor, T system, which can be measured using Equation 6.1. P out = T system P in (6.1) This measurement is independent of the specific sample as it is unique to the setup. To obtain T system, the objective is focused onto the output facet of the lensed fiber, giving a P out measurement of 0.59 mw. The laser output, P in is set to 1.58 mw, or 2 dbm. Applying Equation 6.1 gives a T system value of 37%. With a full Si wire waveguide of length L inserted into the path, new mechanisms for losses are added: coupling efficiency from the fiber mode to the Si wire input mode, C reflectivity off the Si-air interfaces at both the input and output Si wire facets, R propagation losses along the Si wire, α These mechanisms are inserted into the loss equation to determine the total power loss, in the fashion shown in Equation 6.2. P out = T system [ C (1 R) 2 e αl] P in (6.2)

110 Chapter 6. Optical Characterization 90 Similarly, Equation 6.3 can be written for offset Si wires with a PSW section of length L. P out = T system [ C (1 R) 2 e αl] [ C C (1 R) 2 e α L ] P in (6.3) The tilda on the variables denotes that those variables are parameters of the PSW section. The loss mechanism associated with each parameter is as follow: coupling efficiency from the Si wire mode to PSW mode, C coupling efficiency from the PSW mode to Si wire mode, C reflectivity between the Si wire facet and the Ag-surrounded air slot, R propagation losses along the PSW, α Equations 6.2 and 6.3 can be rewritten into Equations 6.4 and 6.5, respectively. P out = T system T 1 P in (6.4) P out = T system T 1 T 2 P in (6.5) T 1 and T 2 are associated with the loss mechanisms from the Si wire and the PSW, respectively, as grouped in Equation 6.3. With knowledge of T system, measuring P out from full Si wires on the sample would give us T 1 through Equation 6.2. Mode overlap analysis show that the expected coupling from a 2.5 micron spot to the Si wire taper should be 23%, and typical Si wire losses are on the order of 3 db/cm [7, 59]. With these loss mechanisms combined, T 1 is expected to be about 10%.

111 Chapter 6. Optical Characterization 91 The five full Si wires measured have P out values lying in the range of 299 to 2882 nw, giving an average of 1315 ± 1062 nw. The large variation amongst supposedly identical Si wires mean more Si wires than available in this single prototype sample would be required to carry out a statistically valid analysis. This section therefore, will serve as a preliminary quantitative analysis, with more precise experiments suggested for future work in the next section. Inserting the 1315 nw P out value into Equation 6.2 gives a T 1 of 0.22%. The unexpected high loss of the Si wire suggests that this is in particular a poor sample, potentially due to residual Ag particles scattered along the lengths of the Si wires from the lift-off process. The particles initially attenuated the mode to make light detection impossible on this same sample, until it was cleaned with the process described in Section 5.6. Residual Ag particles that were not washed away in the cleaning process may be responsible for the huge loss through the Si wires. Table 6.1: P out values measured for offset Si wires bridged by PSWs of various lengths, and their corresponding transmission factors. PSW length (nm) P out (nw) experimental T 2 FDTD simulated T % 50% % 46% % 45% % 42% % 35% Measurements of T 2 values are carried out in a similar fashion, but for Si wires bridged by PSWs of various lengths. With knowledge of both T system

112 Chapter 6. Optical Characterization 92 and T 1, Equation 6.5 is applied to obtain the T 2 values listed in Table 6.1. Note that the calculations assume all Si wire sections have the same T 1 of 0.22% characterizing their losses. This assumption would be valid if many samples are tested and the variation is small, but according to the discussion above, this is clearly not the case. The analysis, however, would give us a good order-of-magnitude estimate of the additional losses induced by the PSW section. The experimental T 2 values listed in Table 6.1 indicate that the PSWs transmit a few percent of the light from the input Si wire to the output Si wire. These values can be compared to simulated values from Figure 4.10 also included in the table. The one order of magnitude difference may be attributed to fabrication imperfections such as the Si wire-ag gap discussed in Section It is expected that the transmission may be improved significantly if the Si wire-ag film interface at the coupling junction is fixed. The T 2 values were also expected to drop with increasing PSW lengths due to strong propagation losses within the slot, as evident in the column containing the simulated values. This trend seems to be broken in the experimentally measured T 2 for the 2000 nm PSW. In fact, the trend cannot be expected in the experimental results as the small percentage differences would be overshadowed by the large variations in the Si wire losses on this sample. It is clear that many of the fabrication imperfections are reflected in the optical power measurements. These include the scattered Ag particles from lift-off and slanted Si wire sidewalls which led to the gap at the coupling junction. Images depicting these two issues are reproduced in Figure 6.3. These fabrication issues would need to be resolved in order to get quantitatively relevant optical characterization results.

113 Chapter 6. Optical Characterization 93 (a) Ag particles scattered across sample surface (b) Coupling junction gap due to slanted sidewalls Figure 6.3: Fabrication issues that are reflected in optical characterization measurements. 6.4 Fabry-Perot Loss Measurements While absolute power measurements allow us to obtain total losses, such as T 1 and T 2, it does not give us insight into how much loss is attributed to each loss mechanism. Our previous analysis on the output power of Si wires with the PSW section relative to full Si wires tell us the magnitude of additional losses introduced by PSW section. However, different types of losses are convoluted into a single value and there would be no way to determine where the losses actually come from within the PSW section. To fully characterize the structure, it would be suitable to employ the Fabry-Perot (FP) loss measurement method, by sweeping through wavelengths and studying the FP fringes [66]. The method has been tested with the prototype sample, but more samples are required to obtain experimentally sound results. The method and preliminary results are presented in this section. The power of the FP method is that it allows the propagation losses of a waveguide, α, to be obtained independent of the coupling efficiency, C. Equation 6.6 is applied on the wavelength sweep data, where r is the ratio of the

114 Chapter 6. Optical Characterization 94 FP resonance depths [66]. α = 1 L ln ( 1 R ) r 1, r = P max (6.6) r + 1 P min With knowledge of α, we can then decouple the propagation losses from the coupling efficiency, and C can be obtained from Equation 6.7. C = e αl T system (1 R) 2 P out P in (6.7) Before we can do the wavelength scan, we must first determine the wavelength range to sweep and what spectral resolution is necessary to capture the resonance peaks. Equation 6.8 is used to calculate the spacing between FP peaks, which would dictate the necessary FP scan parameters [20]. λ = λ2 2nL (6.8) The Si wires are about 8.5 mm in length after cleaving, and using n = 3 as the average effective index throughout the various sections of the Si wire, λ is estimated to be around 47 pm for wavelengths near 1550 nm. This means a 1 nm scan range would contain about 21 FP peaks and a 2 pm scan step would provide enough resolution to capture the peaks. One such scan of a full Si wire is shown in Figure 6.4 (a), where 22 resonance peaks are captured. In (b), offset Si wires bridged by a 800 nm PSW is scanned and λ doubled, only 11 FP peaks are counted within the 1 nm scan range. This is because the full Si wire length is split into two halves of approximately 4.25 mm. To calculate the FP fringe spacing for the PSW, a similar analysis can be carried out with n = 1.43 determined from mode solvers and lengths on the order of 1 micron. Applying Equation 6.8 with these parameters gives a λ value of 0.84 micron, which means the scan range would have to be a

115 Chapter 6. Optical Characterization 95 (a) FP scan of full Si wire (b) FP scan of offset Si wires bridged by a 800 nm PSW Figure 6.4: Plots of FP scans over a 1 nm range at 2 pm spectral resolution.

116 Chapter 6. Optical Characterization 96 few microns to capture the FP resonances due to the PSW cavity. This result is expected from simulations as well, as shown in Figure 4.9, but the large scan range required would prevent us from using a tunable laser for this experiment. A broadband source may be used instead, provided that a suitable optical spectrum analyzer can cover the required range. With PSWs of different lengths, we can employ an alternative method to decouple the propagation losses, α, from T 2. We can group the terms in Equation 6.3 using A and B from Equations 6.10 and 6.11, resulting in the form in Equation 6.9. P out = A(Be α L) (6.9) A = T system C (1 R) 2 e αl P in (6.10) B = C C (1 R) 2 (6.11) The equation can be manipulated into the form shown in Equation 6.12, where plotting ln P out vs. L would result in a linear relation with slope m and y-intercept b as shown in Equation 6.13 and The propagation loss is just the negative of the slope and B can also be easily determined from Equation ln P out = α L + ln A + ln B (6.12) m = α (6.13) b = ln A + ln B (6.14) Unfortunately, the FP loss measurement results could only serve to further confirm some of the suspected problems with the prototype sample. Analysis

117 Chapter 6. Optical Characterization 97 Figure 6.5: Plot of FP loss measurement data from PSWs of various lengths. The variables for the plot are selected according to Equation 6.12.

118 Chapter 6. Optical Characterization 98 of full Si wire scans, such as that shown in Figure 6.4 (a), show that the Si wires have propagation losses, α, between 1.9 to 3.1 db/cm, and that the coupling efficiencies between the fiber and the Si wires, C, are all less than 1%. These two values are responsible for the the low T 1 of 0.22% in the previous section, as can be calculated using Equation 6.2. While the range of Si wire losses are slightly lower than the typically 3 db/cm Si wire losses [7, 59], the coupling efficiency figures are much lower than expected. It is believed that particles of Ag on the sample surface are responsible for much of the losses, but are not taken into account in Equation 6.7 and losses via that mechanism is incorrectly lumped into C. Because of the random distribution of these particles, their effects are not associated with specific resonance frequencies and therefore do not have significant effects on the FP resonance depths. Carrying out the analysis further onto the PSW-loaded waveguides, based on the very small value of C, we obtain the plot of Equation 6.12 shown in Figure 6.5. The randomly-distributed data points deviate from the expected linear plot with a downward slope of α. This plot demonstrates how the propagation loss differences for various lengths of PSWs are overshadowed by the variations in other loss mechanisms, as discussed in the previous section. Due to the limited number of devices on the prototype sample, and the scattered Ag particle issue, it is suggested that the FP measurement be carried out on a larger batch with a refined fabrication recipe. With sufficient number of samples and reproducibility from one waveguide to another, the FP method can sort out losses due to each component in the device. However, the method also has its limitations. The FP method still does not offer a way to decouple the various loss mechanisms lumped into B in Equation To fully characterize the coupling platform, it is suggested that an NSOM be

119 Chapter 6. Optical Characterization 99 employed to scan over the PSW region [45], then an accurate map of power at each point can be determined.

120 Chapter 7 Summary and Conclusion 7.1 Summary In an early stage of this thesis, we have set out to explore the potential of photonics and plasmonics at the sub-100 nm scale, where guided light can interface with the smallest interconnects of current day ICs. Through contrasting various designs in the literature based on functional requirements such as strong modal confinement, as well as practical considerations such as compatibility with CMOS processes, we have concluded that the PSW is the most suitable candidate. The plasmonic slot structure has been studied extensively in literature and its properties promise great potential for waveguiding and on-chip integrated sensing applications. These studies, however, have largely been theoretical analysis and computational simulations; only recently have experimental studies begin to emerge in the literature. Plasmonic slots, with narrow slot dimensions in particular, have much fewer experimentally-backed reports compared to the plasmonic slab. This is largely due to fabrication complexities and the difficulty in coupling light into the slot structure, which becomes a great challenge for optical characterization. This thesis described a 100

121 Chapter 7. Summary and Conclusion 101 solution to the coupling problem by proposing an orthogonal junction coupler design from a Si wire to a 50 nm wide by 340 nm tall PSW. Through FDTD simulations backed by a phase-matching-based analytical theory, the orthogonal coupling platform features many desirable properties that would make the PSW accessible with characterization optics, enabling experimental testing of the narrow plasmonic waveguide. These features include: Naturally phase-matched Si wire and plasmonic sections Wideband coupling that is weakly resonant Efficient coupling even at large ratios of Si wire width to plasmonic slot width Spectral-shifting of the transmission spectrum controlled by Si wire width These four properties enabled by the orthogonal junction makes the PSW especially suitable for waveguiding and sensing applications. By utilizing the k x component of the Si wire wave vector, the high-index guiding section becomes naturally phase-matched to the plasmonic-guided section. Without the need of pre-filling the plasmonic slot with a higher index material, the slot is available for sensing applications that take advantage of the large field densities within the slot. It also eliminates the need for tapering or stubbing in attempt to bridge the momentum gap, which usually makes the coupling tailored for specific wavelengths. In addition, the 90 configuration makes coupling occur over a wide region along the PSW length, resulting in wideband coupling across a smooth spectrum. This is in contrast to a narrow transmission spectrum contaminated with large resonance peaks that would shift with variation in the PSW lengths, a nightmare for waveguiding applications. The junction design also allows us to use Si wires that are wider than

122 Chapter 7. Summary and Conclusion 102 the ones used with the parallel coupling scheme without compromising the spatial mode mismatch. The FDTD results also showed red-shifting of the coupling spectrum with increasing Si wire widths, which is critical since we can now shift the coupling spectrum away from the Si absorption band into a wavelength range centred around 1550 nm. Together, these properties make the SOI-based orthogonal coupling platform very attractive and flexible in testing various applications for the PSW. In designing the platform, practical fabrication constraints were also taken into consideration. The hybrid device involves a Si layer and a Ag layer, which requires multi-step patterning processes and nanometer-precise alignments are necessary as the plasmonic slot itself is only 50 nm wide. The complete fabrication process is not straightforward, it involves etching, lift-offs and FIB in addition to the EBL patterning steps. Each step has its own complexities and they are documented in the fabrication chapter. While some challenges have been overcome to arrive at a sample that can be optically characterized, certain areas still need improvements and suggestions for future optimizations are included in each section of the chapter. Although the coupling platform is not the easiest to fabricate, Appendix B provides a reproducible recipe that can be followed to produce large number of samples in one batch. Most steps involved are parallel, and the serial EBL process does not require much electron beam exposure time. The more time-consuming step is the marker alignment procedures, but it can be automated for processing large batches. The only serial step where the time required would scale linearly with the number of samples is the FIB, where each slot is manually aligned to the region of interest and then milled into the Ag layer.

123 Chapter 7. Summary and Conclusion 103 The final part of the thesis is concerned with optical characterization of the prototype device. Images of mode profiles from offset Si wires coupled through PSWs along with power measurements give us reasonable confidence that the orthogonal coupling platform does indeed work. The measured coupling efficiencies are an order of magnitude off of the simulated values, and the discrepancies are attributed to fabrication imperfections explained in the characterization chapter. The optical characterization chapter also suggests more accurate characterization plans for the future; specifically, FP loss measurements and employment of NSOM techniques. 7.2 Suggestions for Future Steps and Potential Applications With a proof-of-concept platform and a fabrication recipe in place, the next step is to first optimize the fabrication processes and characterize the device properties over a large number of samples to ensure reproducibility. Chapter 5 lists the outstanding fabrication challenges that need to be overcome, and suggestions for more extensive characterization methods are described in Chapter 6. Once an optimized recipe is devised, the SOI-based platform can be easily produced in large batches and can be utilized to test the two potential applications for the PSW waveguiding and sensing. The waveguiding properties of the PSW can be investigated using this coupling platform, which allows short pulses of light to be sent in via an optical fiber and detected at the output. Because the orthogonal junctions feature wideband Si wire-psw coupling, it can potentially achieve high bandwidth signal transmissions that are comparable to those achieved in fiber optics,

124 Chapter 7. Summary and Conclusion 104 but have never been demonstrated at the sub-100 nm scale using an on-chip system. Through this, we can experimentally demonstrate the feasibility of 50 nm wide PSWs as optical interconnects transmitting terahertz bit rate signals. The project can then be integrated with recent developments in localized plasmon generation and amplification [67], electro-optic modulation [68] and near-field detection of terahertz plasmons [69]. These nanoscale components may be added to the coupling platform one a time to construct an integrated system capable of converting electrical signals to SPPs, sent via a slot waveguide and converted back into electrical signals. This nanoscopic plasmonic interconnect system may eventually be migrated to an IC to replace high-traffic buses at the local interconnect level. A second application for the coupling platform involves filling of the plasmonic slot with a gain medium or a liquid with dissolved particles under test. These experiments take advantage of the open-slot design. The filler materials can simply be deposited onto the sample surface, filling the slot where the high power density mode resides. In the case of detecting dissolved particles, the highly-focused mode and sensitivity to refractive index changes may lead to a very sensitive on-chip detector. In the case of filling the gap with a gain medium, we can investigate the potential for gain-assisted SPP propagation, which has been proposed to alleviate the high propagation losses associated with plasmonic structures. With its resonant cavity, the platform can also serve to investigate PSW in plasmon laser applications.

125 Appendix A Sample Lumerical Script # Clear all variables in memory clear; closeall; # Set number of data points (for sweep parameter and frequency) p = 17; freq p = 500; # Define matrices to hold spectrally-resolved transmission data for the three monitors T1 = matrix(p,freq p); T2 = matrix(p,freq p); T3 = matrix(p,freq p); # Set range for simulation run time (related to parameter) sim time start = 56e-15; sim time end = 65e-15; 105

126 Appendix A. Sample Lumerical Script 106 sim time step = (sim time end-sim time start)/p; # Set range for sweep parameter param min = 100e-9; param max = 500e-9; param = linspace(param min,param max,p); # Save the current simulation file as another name save("param sweep temp.fsp"); # Set current tab to structures structures; # Switch to layout editor switchtolayout; # Loop through the parameter range in p number of steps for (i=1:p) { # Print progress update?"simulation " + num2str(i) + " of " + num2str(p); # Set Si wire width structures; setnamed("si wire","z span",param(i)); setnamed("ag coupler","z",250e-9+param(i)/2); setnamed("ag left","z min",500e-9+param(i)/2); setnamed("polymer","z min",-param(i)/2);

127 Appendix A. Sample Lumerical Script 107 setnamed("ag right","z min",-param(i)/2); # Set monitor positions monitors; setnamed("t1","z min",10e-9+param(i)/2); setnamed("t2","z min",100e-9+param(i)/2); setnamed("t3","z min",1000e-9+param(i)/2); # Set simulation run time simulation; setnamed("fdtd","simulation time",i*sim time step+sim time start); # Run simulation run; # Calculate spectrally-resolved transmission at each monitor f = getdata("t1","f"); T1(i,1:freq p) = transmission("t1"); T2(i,1:freq p) = transmission("t2"); T3(i,1:freq p) = transmission("t3"); } # Switch back to layout editor to run next simulation switchtolayout; # Save variables to a Lumerical datafile filename="lau Si wire width sweep.ldf";

128 Appendix A. Sample Lumerical Script 108 savedata(filename,p,freq p,f,t1,t2,t3,param); # Convert the Lumerical datafile to a Matlab datafile lum2mat(filename,1);

129 Appendix B Device Fabrication Recipe B.1 Layer I: Au Alignment Markers B.1.1 ZEP Spin Coating and Patterning 1. Spin coat a 500 nm layer of ZEP Leave bottle of undiluted ZEP520A for >10 RT Spin coat with parameters: 2000 rpm, 584 accel, 1 min Bake sample for 3 min on hot 180 C 2. Fracture GDSII pattern file into GPF file format Fracture with parameters: layer 1, res Electron beam exposure Expose with parameters: 10 nm resolution, 10 µm critical dimensions, 100 kv HT voltage, 10 na beam current, 270 µc/cm 2 dose 4. ZEP development Immerse and manually agitate sample in ZEP developer ZED-N50 for 70 s 109

130 Appendix B. Device Fabrication Recipe 110 Immediately transfer sample to a 9:1 solution of MIBK:IPA, immerse and manually agitate for 30 s Dry sample with N 2 for 40 s B.1.2 Au Deposition and Lift-off 1. Au deposition Deposit 50 nm of Au with the Thermal Evaporator, place a scrap piece of Si or glass close to sample Optional: Verify film thickness with AFM or SEM on the scrap sample 2. Au-on-Si lift-off Immerse sample in ZEP remover ZD-MAC for 5 RT After the 5 min soak, provide agitation to the ZD-MAC container with the ultrasonic bath until all excess ZEP and Au is removed from the sample Rinse with IPA and dry with N 2 Check under optical microscope, repeat ultrasonic agitation and rinse steps if necessary B.2 Layer II: Silicon Wires B.2.1 ZEP Spin Coating and Patterning 1. Spin coat a 350 nm layer of ZEP Leave bottle of undiluted ZEP520A for >10 RT Spin coat with parameters: 6000 rpm, 584 accel, 1 min Bake sample for 3 min on hot 180 C

131 Appendix B. Device Fabrication Recipe Fracture GDSII pattern file into GPF file format Fracture with parameters: layer 4, res Electron beam exposure Expose with parameters: 10 nm resolution, 500 nm critical dimensions, 100 kv HT voltage, 10 na beam current, 230 µc/cm 2 dose 4. ZEP development Immerse and manually agitate sample in ZEP developer ZED-N50 for 60 s Immediately transfer sample to a 9:1 solution of MIBK:IPA, immerse and manually agitate for 30 s Dry sample with N 2 for 40 s B.2.2 Silicon Etching 1. Clean sample (IPA rinse, N2) Rinse with IPA and dry with N 2 Optional: Dry sample on hot 100 C for 5 min 2. Etch 340 nm Si layer using Phantom Etcher Run the standard cleaning recipe with an empty chamber for at least 10 min Load parameters from Recipe C in Table 5.2: 0 W ICP, 130 W RIE, 30 sccm SF 6, 12 sccm CHF 3, 20 sccm O 2, 100 mtorr pressure, 10 sccm He, 45 s etch time Run the recipe with an empty chamber until RIE reflections stabilize at a single-digit value Load sample into chamber and execute the automated etching process

132 Appendix B. Device Fabrication Recipe Optional: Verify etch profile with cross-sectional SEM (destructive) Sputter coat a thin conformal layer of Au for 45 s Cleave to expose the waveguide cross-section by holding down the sample with tweezers, use a diamond scriber to damage the edge, then apply pressure onto the indentation to crack the substrate and the crack will propagate along a line perpendicular to the Si wires Carbon tape sample on a tilted holder and set holder parameters to: 51 mm wide, +14 in height Image at 10 kv, apply stage tilt until sample cross-section is visible and gradually move sample towards electron beam column B.2.3 ZEP removal 1. Remove ZEP from Si surface Immerse sample in ZEP remover ZD-MAC and provide occasional agitation manually until ZEP is fully removed Rinse with acetone, then IPA and dry with N 2 B.3 Layer III: Plasmonic Slot Waveguides B.3.1 ZEP Spin Coating and Patterning 1. Spin coat a 500 nm layer of ZEP Leave bottle of undiluted ZEP520A for >10 RT Spin coat with parameters: 2000 rpm, 584 accel, 1 min Bake sample for 3 min on hot 180 C

133 Appendix B. Device Fabrication Recipe Fracture GDSII pattern file into GPF file format Fracture with parameters: layer 10, res Electron beam exposure Expose with parameters: 10 nm resolution, 50 nm critical dimensions, 100 kv HT voltage, 10 na beam current, 280 µc/cm 2 dose 4. ZEP development Immerse and manually agitate sample in ZEP developer ZED-N50 for 70 s Immediately transfer sample to a 9:1 solution of MIBK:IPA, immerse and manually agitate for 30 s Dry sample with N 2 for 40 s B.3.2 Ag Deposition and Lift-off 1. Ag deposition Deposit 340 nm of Ag with the Thermal Evaporator, place a scrap piece of Si or glass close to sample Optional: Verify film thickness with AFM or SEM on the scrap sample 2. Ag-on-silica lift-off Pre-heat hot plate to 80 C Immerse sample in ZEP remover ZD-MAC, then place container onto hot plate, soak for 10 min and provide occasional agitation manually After the 10 min soak, provide agitation to the ZD-MAC container with the ultrasonic bath for approximately 8 s Rinse with acetone, then IPA and dry with N 2

134 Appendix B. Device Fabrication Recipe 114 Check under optical microscope, repeat 80 C soak, ultrasonic agitation and rinse steps if necessary B.3.3 Plasmonic Slot Waveguide Milling 1. FIB dose test Let sample sit in FIB chamber until thermal equilibrium is reached and there is no drift in the SEM image Move stage to Ag test patch included in the pattern, away from device region Determine optimal ion dose based on a 3-pass milling process 2. FIB alignment and PSW milling Move stage to Ag patch location for each device Align direct-write lines to intended location of the PSW Execute the milling process at the optimal dose B.4 Post-Processing 1. Clean scattered Ag particles described in Section from sample surface Immerse sample in ZEP remover ZD-MAC and provide ultrasonic agitation for 5 min Rinse with acetone, then IPA and dry with N 2

135 Appendix C Silicon Etching Chemistry This section is a summary of the detailed experimental study of Si etching by Legtenberg et al. [5]. Only the information most relevant for this thesis is highlighted, and the reader is encouraged to refer to the original document for more details on RIE etching of Si. The RIE etching of Si relies on the chemical reaction where solid Si is converted into volatile SiF 4 species and removed from the chamber. The reaction is shown in Equation C.1. Si (s) + 4F (g) SiF 4 (g) (C.1) The fluorine atoms in Equation C.1 are provided by the dissociation of SF 6 resulting from electron impact, as shown in Equation C.2. e + SF x (g) SF x 1 (g) + F (g) + e, x = 3 6 (C.2) At high O 2 flow rates, the oxygen atoms compete with F atoms for active sites, decreasing the etch rate. These oxygen atoms also serve another important purpose. They form a passivation film about 1 nm thick with compositions of SiO x F y at around 100 mtorr chamber pressure. The formation of this film 115

136 Appendix C. Silicon Etching Chemistry 116 depends on the balance between the SF 6 and O 2 flow rates and is critical in achieving an anisotropic etch. Because the SF + x ion bombardment by the plasma clears out the film on the horizontal surfaces, the passivation effect occurs primarily on the vertical sidewalls, allowing the reaction in Equation C.1 to proceed in a preferential direction. Figure C.1: Schematic of the SF 6, O 2 and CHF 3 process for Si etching [5]. In this anisotropic regime, micromasking due to redeposition of silicon oxide species and variation in thickness of the oxyfluoride layer lead to very rough horizontal etch surfaces. The addition of CHF 3 species is necessary to ensure smooth etch surfaces by suppressing the formation of the above layers through injecting CF + x ions that would bombard the horizontal surfaces, in addition to the SF + x ions. The overall Si etching chemistry therefore depends on the fine balance between the gas flow rates, as well as the chamber pressure and the RF power driving the ion species. A visual representation of the processes taking place is shown in Figure C.1.