Distributed Voting for Fault-Tolerant Nanoscale Systems

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1 Distributed Voting for Fault-Tolerant Nanoscale Systems Ali Namazi and Mehrdad Nourani Center for Integrated Circuits & Systems The University of Texas at Dallas, Richardson, Texas Abstract In this paper, we propose a distributed voting strategy to design a robust NMR system. We show that using inexpensive current-based drivers and buffers, we can completely eliminate the centralized voter unit and do the majority voting among N modules in a distributed fashion. Our strategy achieves high reliability that is vital for future nano systems in which high defect rate is expected. Experimental results are also reported to verify the concept, clarify the design procedure and measure the system s reliability. Introduction. Motivation As the feature size continues to scale down toward 32nm and beyond, manufacturing tools have much less confidence in their control of design parameters. The behavior of VLSI components (e.g. transistors and interconnects) can no longer be evaluated as faulty or fault-free. Rather, there will be some level of uncertainty associated with each component fabricated on silicon []. Various reasons contribute to this uncertainty including the fact that in nanometer VLSI technology, the feature sizes (dimension of devices) are approaching the fundamental physical limit of the existing equipments. Equally challenging, emerging nano-devices such as Carbon nano-tubes (CNT) [2], Quantum-dot cellular automata (QCA) [3] and single electron transistor (SET) [] suffer from unreliability issues as well. As CMOS reaches its physical limits, these new nanoscale devices are proposed as future replacements of the current CMOS technology. Unfortunately, they don t promise any better controllability in the manufacturing process [5]. In the 2005 update, ITRS explicitly calls for a fresh look on nano-architecture with emphasis on defect tolerance [6]. The defect-tolerance philosophy employs the notion of redundancy to create chips that produce correct results in the presence of defects, errors or faulty components. Almost all of redundancy strategies rely on a voting mechanism to extract the final result out of the redundant modules. Therefore, the voter is a critical block in a redundant system and has widely been recognized as a major bottleneck (in terms of reliability) by the industry [7] [8]. However, the voter has usually been excluded from the reliability analysis of a redundant system. One reason is that so far in microscale VLSI the defect rate of transistors/interconnects has been very low. Thus, in an N-tuple Modular Redundant (NMR) system, the voter unit could be ignored since its size (and thus the probability of failure) was significantly lower than that of the modular blocks..2 Prior Work In 956 von Neumann introduced the concept of using redundant components to obtain reliable systems, known as the NAND-Multiplexing technique [9]. Since then, redundancy has been considered as one of the most powerful strategies in designing highly reliable systems. Reliabilitybased approaches usually exploit one of three forms of redundancy, i.e. (i) temporal (time), (ii) spatial (hardware) and (iii) data (information). Methods that employ redundancies in VLSI are sometimes called design for reliability (DFR) techniques [0]. The time redundancy technique repeats the computation at a slightly later time assuming that the source of error (e.g. radiation strike) will not exist during the later operations. An example of hardware redundancy is the famous triple module redundancy (TMR) where we replicate the main hardware unit three times and whose outputs are constantly compared against each other by a majority voter []. If at least two out of three results are identical, they would be considered as the correct result of the system. Error correcting codes (ECC) [2], such as the Hamming code, are good fault-tolerant mechanisms using information redundancy. In ECC, extra bits are added to the raw data to protect it against transient errors. Various ECC mechanisms have been integrated within VLSI chips with large internal memories and cache units [3]. Among the three types of redundancy, the hardware redundancy is the most attractive one for the semiconductor industry because of its simplicity and effectiveness. This is specifically important in nanoscale VLSI where high defect rates are expected. Many researchers are now working on NMR-based strategies adding hardware redundancy to design reliable components out of unreliable nano-devices [] [5].In almost all these works, the overall system reliability has been evaluated or improved without considering the effect of voter unit..3 Main Contribution The main contribution of this paper is twofold. First, we show how current-based drivers/buffers mechanism can be employed for distributed bit voting. The centralized /07/$ IEEE 568

2 (voltage-based, i.e. digital) bit voter can thus be removed leading to a highly reliable and scalable NMR system. Our distributed mechanism achieves lower latency and lower implementation cost compared to conventional voters. Second, we present an accurate reliability analysis of NMR systems that takes voter into account. Such analysis is quite important in fault-tolerant nanoscale systems in which the defect rates are high and the size of the voter is comparable to modular blocks. 2 Centralized vs. Distributed Voting Figure shows the configuration of a conventional NMR system. When Core A sends data to Core B, N replicas of Core A send their data to the voter block. Then, for each output bit the voter decides what the correct data is based on the majority of its inputs. It is clear that the voter plays a critical role here, i.e. if it fails due to any kind of defects, the whole system would fail. By contrast, our proposed distributed voting is sketched in Figure 2 where the centralized voter block in an NMR system is completely eliminated. Instead, simple drivers/buffers are added to the inputs/outputs of each communicating modules. To do this, first, we need to collect the output data of N modular blocks without using a centralized voter unit. Second, we have to deliver the majority of this collected data to its designated destinations. As the collection mechanism, we use current-based drivers (one per bit) to convert the voltage-based outputs of cores into currentbased signals. By using current instead of voltage, we can easily combine all the outputs by just hard-wiring them together. Naturally, the final current value will be the sum of individual currents. In the receiving side, we use a buffer (as a current-tovoltage converter) to re-generate the voltage-based signal for the next stage. The voltage value (high or low) will be based on the majority of the inputs. The buffer can use a resistor to sense the current value and then, use a simple amplifier/inverter combination to convert the resistor s voltage to the logic values. In essence, the conversion-back to voltage implicitly performs the majority decision. Since every core uses such adapter, we call it distributed voting. Note carefully that in the distributed system if less than half of drivers and/or buffers fail due to fabrication defects, the whole system would still work correctly. This implies that the notion of redundancy (NMR) has been expanded to include the voter unit as well. To the best of our knowledge, no other existing NMR has this capability. The interconnect reliability is beyond the scope of this paper. However, we would like to comment that highlyreliable interconnects, such as grid [6] (i.e. a mesh structure providing multi-path delivery) benefit from our distributed voting mechanism. Core A () Core A (2) Core A (N) Voter Core B () Core B (2) Core B (N) Figure. Conventional voter-based NMR Core A () Core B () Core A (2) Core A (N) Current-Based Driver Buffer Core B (2) Core B (N) Figure 2. Distributed voting mechanism. 2. Current-Based Driver Figure 3(a) shows the current-based driver schematic which is composed of a bootstrap current source (T, T2 and T3) and an output NMOS switch (T5); a total of seven transistors. When the switch is on (input = ), the current is injected out through T5. When it is turned off, the current will flow to ground through the opposite switch T. The alternative path is needed to avoid dead-starting a current source [7]. Now, suppose the current source produces I. In an NMR system, the maximum output current is N I which should be within allowed limits of the buffer input at the receiver site. This criteria should be carefully used to design and tune the current source, which is explained in the next subsection. Assuming k cores (k N) function correctly, the output produce k I and (N k) I when fault free value is and 0, respectively. The buffer unit is responsible to convert back the current value to or 0 again. As long as k N/2, i.e. the majority of the cores function correctly, the final system s output will be correct. 2.2 Buffer Figure 3(b) shows the buffer schematic which is composed of a common-source amplifier followed by an inverter; a total of three transistors. Resistor R 2 converts the sum of output currents into voltage. The resulting voltage should not exceed the small-signal threshold of the amplifier for linear operation. Therefore, NIR 2 should stay in the maximum input boundary of the common-source amplifier allowed. Assuming A v as the amplifier gain, which can be tuned by R,wehave: V ampmax = A v N I R 2. () So, the voltage swing is increased from NIR 2 to V ampmax. To reach the full swing (V DD ) and also remove the inversion effect of the common source amplifier, a low-skewed inverter (with a threshold set at V thr = V ampmax 2 ) converts this 569

3 Input Current Source VDD VDD T T2 (a) T3 T R T5 Output Iin Vin Vamp R2 VDD (b) T R Vout Figure 3. Distributed voting: (a) currentbased driver, (b) buffer (amplifier/inverter). voltage to logic values. The inverter needs to be low-skewed since V thr < V DD 2. Without loss of generality, let s assume N is odd which is often the case in practice. The threshold value of this inverter is doing the majority voting, i.e.: { Iin < N 2 I V in < N 2 I R 2 V amp > V thr (V out = 0) I in N 2 I V in N 2 I R 2 V amp V thr (V out = V DD ) (2) Note that variabilities may cause the current of driver to change form its nominal value I. If, for example, all currentbased drivers inject a value less than I, then for large N the N 2 threshold may need to be slightly adjusted to create a safe decision margin. More specifically, when large current variation is expected, thresholds of N 2 + or N can be used (instead of N 2 ) to compensate such variations. 3 Reliability Analysis of NMR System In this section, we first analyze the NMR system reliability without considering the voter. Then, we take into account the voter s effect and show why the voter is a reliability bottleneck in fault-tolerant systems and especially in nanoscale VLSI. Finally, we show how distributed voting removes the voting bottleneck problem and improves the reliability of NMR systems. As mentioned earlier, the interconnect reliability is beyond the scope of this paper and will not be considered in this analysis. In our analysis, we define the reliability of a component (gate, module, core, system, etc.) to be the probability that the component works correctly: R comp = Prob(works)= Prob( fails)= P comp. (3) 3. Ignoring the Voter In a low defect rate technology, the module sizes of an NMR system could be very large and still have low probability of failure. Therefore, the voter size (and its probability of its failure) could be ignored compared to modules. This is the main reason why in previous works on NMR system analysis, such as [7], the reliability of the voter block is not considered at all. System Reliability (Rnmr) Minimum Voter Reliability (Rvmin) Non-Redundant TMR 0.2 5MR 7MR Module Reliability (Rm) Figure. NMR reliability (R NMR ) vs. reliability (R m ) module (0.75,9) 8 6 TMR 5MR 2 7MR Module Reliability (Rm) Figure 5. Minimum voter reliability (R vmin ) vs. module reliability (R m ) Ignoring the voter, the reliability of the NMR system is defined as the probability of having the majority of the modules (i.e. N/2 ) to provide the correct output. This probability obeys the following Binomial distribution: R NMR = N i= N/2 ( N i ) R i m ( R m ) N i, () where R m is the reliability of a single module. The above equation comes from the fact that the NMR system works correctly when at least N/2 (the majority of) modules provide correct results. Note that the redundant system is useful only when the system reliability is more than the non-redundant case, i.e. R NMR > R m. Figure shows the relation between R NMR and R m. Clearly, only for R m > the redundant systems is more reliable compared to the nonredundant one. 3.2 Centralized Bit Voter High defect rates are expected for future nanoscale chips [] [5]. This implies that large individual modules would 570

4 System Reliability (Rnmr) Module Reliability (Rm) Voter Reliability (Rv) Figure 6. NMR reliability (R NMRC ) vs. voter (R v ) and module (R m ) reliability most likely fail. Consequently, each module in an NMR system cannot be too large. Hence, the voter cannot be ignored when high defect rate are expected. If we add the reliability of the voter, say R v, to Equation (), then: [ N ( ) ] N R NMRC = R v R im ( R m ) N i. (5) i i= N/2 To get benefit from the redundant system, we need R NMRV > R m that results in: R vmin = N ( N ). (6) i= N/2 i R i m ( R m ) N i Figure 5 shows R vmin for various N and R m values. It is clear that the voter s reliability plays an important role in the overall system reliability. The parabola-like curves indicate that to get R NMRC > R m, we need large R vmin (close to ) for both large and small R m values. For example, for TMR (the top curve), even at the valley-point R vmin = 9; which means a highly reliable voter is required to get benefit out of the NMR system. Figure 6 gives us a better picture of the relation between the system reliability vs. module and voter reliability for a 5MR system. The green flat plane and the blue surface show the reliability of the non-redundant system and NMR system, respectively. The intersection of these two is R vmin, already shown in Figure Effect of the Voter Size Like any other module, the more gates needed to build the voter, the lower is its reliability. Let s assume the logic gate reliability (probability that it works correctly) is R g for a specific technology. The voter reliability, therefore, is: R v = R N v g, (7) where N v is the voter size in terms of number of gates. A study on different voter implementations and costs was conducted in [8]. The author classified various implementations into different categories, in which the two extremes are: (i) selection-based and (ii) gate-based. As the redundancy factor N grows, the cost of voter increases linearly and exponentially for (i) and (ii), respectively. Regardless of the implementation type, large N implies large N v and small R v (see equation (7)). At some point, R v will go below required R vmin and the redundant system won t serve the purpose anymore. Effectively, R vmin limits the maximum redundancy allowed. This is a huge drawback of the conventional voter-based NMR systems because in nanometer VLSI, defect rates are expected to be high and therefore, high redundancy factor is required for a reliable system. 3. Distributed Bit Voter For the distributed system, every module has a current driver in its output. So: R NMRD = N i= N/2 ( ) N (R i m) i ( R m) N i, (8) where R m is the reliability of the overall module and current driver together. Assuming each module has N m gates and R g is the gate reliability, we have: R m = R N m g. (9) In a distributed voting system, we have a 7-transistor driver and a 3-transistor buffer per output and input bit, respectively (see Figure 3). Therefore: R m = R N m+0 g. (0) Figure 7 compares the reliability of NMR system for both centralized and distributed voting strategies. Note that in the figure we used the gate failure probability P g (i.e. P g = R g ). In this figure, N v = 25 for 7MR centralized system, N v = 0 for 9MR and N m = 00. Both 7MR and 9MR distributed systems are more reliable than centralized voting mechanism. For example, at failure rate equal to 02 the reliability of centralized 9MR system is while for the distributed system this value is 832 which is a significant improvement. Simulation Results. System Simulation We have performed simulations on a simplified version of the centralized and distributed TMR shown in Figure 8. The cores are -bit adders operating on the same inputs. Suppose we have total of N NMR components in our TMR system that might be defective (N NMRC = 67 and N NMRD = = 05). The simulation procedure estimates the reliability of the TMR system (R) as follows:. For a given component reliability R g, randomly inject ( R g ) N NMR defects to the circuit. We assume a defective gate will invert its output. 57

5 Reliability of NMR System Centralized 7MR Distributed 7MR Centralized 9MR Distributed 9MR Gate Failure Probability Pg=-Rg Figure 7. NMR system reliability vs. gate failure probability (P g = R g ) for centralized (conventional) and distributed voting 2. Apply all possible input patterns (N pat = 2 8 = 256 in our case) and check the TMR outputs. If the answer is wrong then increase the failure count N f ail. 3. Compute the reliability of the circuit in that round: R = (N f ail /N pat ).. Repeat the above steps in a Monte-Carlo process until the average reliability over large number of iterations converges, i.e. to R TMR. Figure 9 shows the simulation results for TMR and 5MR cases. The four curves converge at very high R g > 99 (i.e. failure rate under 0) and very low R g <. This is because at a very high gate reliability (low defect rates) any redundant system could perform well. So, the difference between various defect-tolerant strategies will not be visible. Also, for a very low gate reliability (high defect rates) any system would fail with a high probability. So, again the differences are small (though the distributed voter still performs better in both cases). In < R g < 9 range, which is a more practical case for nanometer VLSI, the distributed systems is much more reliable than the centralized one. For example, at R g = 5 the reliability of centralized TMR system is 0. while the reliability of distributed TMR and 5MR systems are 0.69 and 0.73, respectively. This implies that the distributed 5MR will be at least 32% more reliable than the centralized TMR. Conventional fault-tolerant approaches were found effective only for systems and technologies in which the failure rate is very small, i.e. P g < 0 (R g > 99) [9]. In future nanoscale VLSI where we expect presence of massive number of gates with reliability in < R g < 9 range. In this range, our distributed voting strategy provides much higher reliability as pictured in Figure 9. When the extra cost is acceptable, using large redundancy factor Reliability of NMR System -bit -bit Voter 8 Receiver -bit (a) -bit Current Driver Current Driver 8 -bit Buffer Receiver (b) -bit Current Driver Figure 8. TMR systems with a: (a) centralized voter, (b) distributed voter Centralized TMR Distributed TMR Centralized 5MR Distributed 5MR Gate/Segment Reliability (Rg) Figure 9. Simulation results (reliability) of TMR and 5MR systems. N (e.g. 9, or even larger) can further push the overall reliability to almost any desired level. According to Equation 8, for a given R m, by choosing N, we can reach any desired level of R NMRD. As discussed in Subsection 3.3, this is not possible when a centralized voter is used due to its bounded reliability (see also Equation 5)..2 SPICE Simulation We designed and implemented, using Synopsys toolset [8], a small distributed voting system for experimentation. In our simulation, we used five current-based drivers and buffers using 5nm library [9]. In all experiments tried so far, we have observed a strong match between the results of HSPICE (practical implementation) and theoretical analysis. Figure 0 is a part of the simulation result, in which the five current drivers are turned on one-by-one with 2ns delay to trace the effect of majority voting. When all are turned off, or only one or two are turned on, the output is low (0) since still the majority of them are off. When the third current driver is added, the majority goes above the threshold and the output goes high. Finally, when the fourth or fifth current driver are added, the output is fully V DD. 572

6 Graph n 2n 3n n 5n 6n 7n 8n 9n 0n n t(s) Figure 0. Simulation results of a 5MR with distributed voter. Top five curves show current driver outputs through 5. The last two curves show the buffer s input and output signals, respectively..3 Effect on Cost and Delay In [8], the author concluded that the best voter is the one whose implementation cost increases linearly with the redundancy factor N. This is exactly the case in our distributed voting mechanism where 0 transistors (see Figure 3) will be added per bit per module. The distributed voting system has also an edge for its speed. In all realizations of the centralized voter, the latency increases linearly with N, whereas, in the distributed voting the voting latency is fixed (one current driver and buffer delay) and independent of N. This is another important improvement, specially when N is large. Accurate reading of the last curve in Figure 0 shows that the voting latency is less than 00ps which is much better than ns delay of the centralized voter in 5MR. More importantly, as N becomes larger the latency in distributed voter remains unchanged (around 00ps) while it linearly grows to several nanoseconds in the centralized voting. References [] M. Breuer, S. Gupta and T. Mak, Defect and Error Tolerance in the Presence of Massive Numbers of Defects, IEEE Design & Test of Computers, vol. 2, no. 3, pp , May-June 200. [2] J. Appenzeller, J. Knoch, R. Martel, V. Derycke, S. Wind and P. Avouris, Carbon Nanotube Electronics, IEEE Transactions on Nanotechnology, vol., no., pp. 8-89, Dec [3] C. Lent and P. Tougaw, A Device Architecture for Computing with Quantum Dots, Proceedings of the IEEE, vol. 85, no., pp , April 997. [] K. Likharev, Single-Electron Devices and Their Applications, Proceedings of the IEEE, vol. 87, pp , 999. [5] T. Raja, V. Agrawal and M. Bushnell, A Tutorial on the Emerging Nanotechnology Devices, Proceedings of the 7th International Conference on VLSI Design, pp , 200. [6] Semiconductor Industry Association, The International Technology Roadmap for Semiconductors: 2005 Update, [7] S. Mitra and E. McCluskey, Word-Voter: A New Voter Design for Triple Modular Redundant Systems, Proceedings of the IEEE VLSI Test Symposium, pp , May [8] B. Parhami, Voting Networks, IEEE Transactions on Reliability, vol. 0, no. 3, pp , Aug. 99 [9] J. von Neumann, Probabilistic Logics and the Synthesis of Reliable Organisms from Unreliable Components, in Automata Studies, C.E. Shannon and J. McCarthy (eds.) Princeton, NJ: Princeton Univ. Press, pp. 3-98, 956. [0] P. Yang and J. Chern, Design for Reliability: The Major Challenge for VLSI, Proceedings of IEEE, vol. 8, no. 5, pp , May 993. [] J. Sklaroff, Redundancy Management Technique for Space Shuttle Computers, IBM J. Res. Dev. 20():20-28, Jan [2] W. Peterson and E. Weldon, Error-Correcting Codes, Second Edition, MIT Press, Cambridge, Mass., 972. [3] A. Agarwal, B. Paul, S. Mukhopadhyay and K. Roy, Process Variation in Embedded Memories: Failure Analysis and Variation Aware Architecture, IEEE Journal of Solid-State Circuits, vol. 0, no. 9, pp. 80-8, Sept [] S. Roy, V. Beiu, Majority Multiplexing-Economical Redundant Fault-Tolerant Designs for Nanoarchitectures, IEEE Transactions on Nanotechnology, Volume, Issue, pp. -5, July [5] J. Han, J. Gao, P. Jonker, Y. Qi, J. Fortes, Toward Hardware-Redundant, Fault-Tolerant Logic for Nanoelectronics, IEEE Design & Test of Computers, Volume 22, Issue, pp , July-Aug [6] A. Namazi, M. Nourani and M. Saquib, A Robust Interconnect Mechanism for Nanometer VLSI, International Test Synthesis Workshop (ITSW), (San Antonio, TX), March [7] P. Gray, P. Hurst, S. Lewis, and R. Meyer, Analysis and Design of Analog Integrated Circuit, John Wiley & Sons, Inc., th edition, [8] Synopsys Inc., User Manuals for Synopsys Tools v , Synopsys, Inc., [9] Texas Instruments, Inc., 5nm Spice Models, Texas Instruments, Inc.,