Digital Power: Definition

Transcription

1 Digital Power: New Solutions and New Problems Texas Instruments Dave Freeman Digital Power Forum Digital Power: Definition Digital Power is digitally controlled power products that provide configuration, monitoring, and supervisory functions which extends to full loop control Other definitions include digital methods that address efficiency of the power conversion and are mostly focused on switching loss, for example Predictive Gate Delay. 2 1

2 Analog versus Digital Power The principal difference is the format of the parameters that are used in operating the power supply Analog components typically consist of comparators and amplifiers Signals are kept analog as long as practical Configuration values are usually set using passive analog components such as resistors and capacitors Digital components typical consist of data converters and timers Signals are typically converted to digital data as soon as practical Configuration values are usually set using data memory and may be non-volatile or volatile 3 What drives the digital decision? Communication is a very important driver when deciding to go Digital Providing a digital communication interface allows a host or system level processor to control and monitor the power supply This digital interface helps raise the hood and provides entry of other digital task to be added Complex control algorithms make digital methods attractive Complex phase relationships between power stages Non-linear control Adaptive control law schemes 4 2

3 Digital Configuration Digital Configuration uses a digital memory to retain the power supply configuration parameters The parameters consists of thresholds, calibration values, control values and may also include specialized manufacturing information These values may be loaded during manufacture or during system startup The initialization for these parameters are typically stored in nonvolatile memory such as EPROM or FLASH The parameters are typically communicated over a communication bus, such as I2C 5 Digital Monitoring Power supply monitoring has a wide performance range. Temperature monitoring is perhaps the least demanding as far as speed. < 10 SPS is ok. The resolution resulting in 1 C measurement is typical fine for threshold detection. Higher resolution may be needed if thermal modeling is required Voltage monitoring may be either for average voltage reporting or voltage threshold detection. Average voltage values can be determined by integrating converters Conversion speed of <100KSPS is adequate for most application including typical loop control. 10 bit resolution is satisfactory for many applications and in general has a small dynamic range for DC/DC converters Measurement system calibration may be required to minimize errors due to the ADC reference and signal offset Current is the most demanding monitoring. Average values for current monitoring can be determined by integrating converters Average current mode loop control may require 1us conversion time and a wide dynamic range 6 3

4 Types of High Speed Analog Data Converters SAR DELTA SIGMA Pipelined 7 Analog Data Converters Resolution (Bits) Delta Sigma SAR Pipeline E+00 1.E+01 1.E+02 1.E+03 1.E+04 1.E+05 1.E+06 1.E+07 1.E+08 1.E+09 Maximum Sample Rate (Samples/Second) 8 4

5 Analog Converter Speed versus Power Delta Sigma SAR Pipeline E E E E+03 1.E E E E+07 1.E E E+10 Speed (Samples/Second * Resolution) 9 Digital PWM The digital PWM found on most controllers or processors consists of clock driven counters and digital comparators The digital PWM provides finite resolution of one clock cycle 1 MHz clock provides 1 us duty cycle resolution Higher duty cycle resolution on digital PWM requires a faster clock and more power, ~FCV^2 F is the base clock frequency C is related to the number of gates the clock must propagate through V is the supply voltage for the clock logic 10 5

6 Voltage Mode Control Law Voltage Mode Control Computation Flow: Vref Vout DC/DC Dprd ( n) = Vref ( n) Vout( n) e dsat( n) = min d( n) max (2 Pole / 2 Zero) Dprd = dsat( n) PWMPRD ( n 2) + a1 d( n 1) + b2 e( n 2) + b1 e( n 1) + b e( n) d ( n) = a2 d 0 11 Control Law Implementation 32 Bit DSP Delay Buffer y(n-2) y(n-1) e(n) e(n-1) e(n-2) 32 bit math 2 pole / 2 zero Saturation control Coefficients a2 a1 b0 b1 b2 ; e(n)=vref-vout MOVU ACC,@Vref SUBU ACC,*XAR2++ LSL ACC,#8 ; ACC=e(n) (Q24) ZAPA ; Voltage control law MOVL XT,@VCNTL_DBUFF+8 ; XT=e(n-2) QMPYAL P,XT,*XAR7++ ; b2*e(n-2) MOVDL XT,@VCNTL_DBUFF+6 ; XT=e(n-1), e(n-2)=e(n-1) MPYAL P,XT,*XAR7++ ; ACC=b2*e(n-2) P=b1*e(n-1) MOVDL XT,@VCNTL_DBUFF+4 QMPYAL P,XT,*XAR7++ MOVL XT,@VCNTL_DBUFF+2 ; XT=u(n-2) QMPYAL P,XT,*XAR7++ ; P=a2*u(n-2) MOVDL XT,@VCNTL_DBUFF ; XT=u(n-1), u(n-2)=u(n-1) QMPYAL P,XT,*XAR7++ ; ACC=a2*u(n-2) ADDL ACC,P ; ACC=a2*u(n-2)+ a1*u(n-1) LSL ACC,#(23-VCNTL_QFMAT+8) ; (Q23) ADDL ACC,ACC ; ACC=u(n) (Q24) ; Saturate the result [min,max] MINL ACC,*XAR7++ MAXL ACC,*XAR7++ ; Duty Cycle Modulation MOVL XT,ACC QMPYL P,XT,*XAR7++ MOV *XAR3++,P ;(Q0) 12 6

7 Microcontroller 8 Bit multiply: y(n-2) y(n-1) e(n) e(n-1) e(n-2) a2 a1 b0 b1 b2 MUL a,r3,r0 ;BH * AL MOVE r3,a MUL a,r2,r1 ;BL * AH ADD r1,r3,a MUL r2,r0 ;BL * AL MOVE r0,a ADD r1,r2 RET ; en = Vref - Vout; MOVE r0,vref+1 ;<Vout-1> SUBS r0,vout+1 ;<Vout+1> MOVE r1,vref ;<Vref> SUBSC r1,vref+1 ;<Vref+1> ; yn += b0*en, en1 = en; MOVE r2,b0+1 ;<b0+1> MOVE r3,b0 ;<b0> MOVE en1+1,r0 ;<en1+1> MOVE en1,r1 ;<en1> CALL multiply ;multiply ADD i0l,r0 ;<yn+1> ADDC i0h,r1 ;<yn> ; yn = yn>=0? yn : 0; TSTPAT i0h,#0x80 JZS ctl1 MOVE i0l,#0x0 ; <yn+1> MOVE i0h,#0x0 ; yn = yn<=100? yn : 100; ctl1: CMPA i0h,#0 JNE ctl2 CMP i0l,#100 ctl2: JLE ctl3 MOVE i0l,#0x100 ; <yn+1> MOVE i0h,#0 ; <yn>; yn1 = yn MOVE yn+1,i0l ;<yn+1> MOVE yn,i0h ;<yn> RETS Total 103 cycles if no clipping takes place, if clipping then 105 cycles (at 8MHZ, this is 12.3 us) 13 Microcontroller 16 Bit mov.w &vref,r4 ;r4 = e(n) rla.w r4 rla.w r4 rla.w r4 ;Q15 ;voltage control law y(n-2) y(n-1) e(n) e(n-1) e(n-2) a2 a1 b0 b1 b2 Total time estimate is about 28us with multiplier, without the multiplier the 82us. mov.w &vcntl_dbuff+8,&mpys ;e(n-2) to multiplier ;*b2 mov.w &vcntl_dbuff+6,r7 ;e(n-1) mov.w r7,&macs ;e(n-1) to multiplier with accumulate mov.w r7,&vcntl_dbuff+8 ;e(n-2) = e(n-1) ;*b1 mov.w r4,&macs ;e(n) to multiplier with accumulate ;was left in r4, remember? mov.w r4,&vcntl_dbuff+6 ;e(n-1) = e(n) ;*b0 mov.w &vcntl_dbuff+2,&macs ;y(n-2) ;*a2 mov.w &vcntl_dbuff,r7 ;y(n-1) mov.w r7,&macs ;y(n-1) to multiplier mov.w r7,&vcntl_dbuff+2 ;y(n-2) = y(n-1) ;*a1 mov.w &RESHI,r4 ;y(n) rla.w r4 ;Q15 mov.w r4,&vcntl_dbuff ;y(n-1) = y(n) ;compare to maximum jl check_minimum ;if less than maximum, jump ;above maximum, convert to jmp control_law_done ;done check_minimum incd.w r6 ;point r6 at minimum ;compare to minimum jge control_law_done ;if greater than minimum, jump ;below minimum, convert to minimum control_law_done ;duty cycle modulation mov.w r4,mpys ;y(n) mov.w modulation_factor,op2 ;use absolute addressing, r6 unpredictable at this point mov.w RESHI,0(r8) ;store modulation factor. incd.w r8 ;point to next word 14 7

8 32Bit DSP Example 1.8V, IDDIO IDD3VFL, 3.3V 15 Low Power Microcontroller Example 16 8

9 System Interface: Software Derived There are three popular system physical interface protocols Type Dallas One-Wire I2C SMBus Connections 1 Bidirectional line 2 Bidirectional lines 2 Bidirectional lines Code Requirement (relative number of instructions) For I2C, if there is no clock stretch by the slave device then there is 1 bidirectional line and 1 unidirectional line For SMBus, if there is no clock stretch and no multi-master then there is 1 bidirectional line and 1 unidirectional line 17 Isolated Interface Bidirectional Isolated Interface Unidirectional Isolated Interface Single wire communication provides for simple routing but bidirectional requirements need dual optocouplers. 18 9

10 Multiple Power Stage Control It is desirable to control multiple power stages from a single processor if the processor resources allow The power stages will most likely be located away from the controller Feedback signal may require isolation Ground elevation may require differential sense PWM output to the driver may require careful routing to noise on the analog signals Routing high speed digital signals are everyday requirements Driver input impedance needs to be considered Routing of the feedback signals using digital information may be the best choice 19 Summary Communication with power supplies open up the possibilities for digital power Complex control algorithms can be implemented digitally but the digital resources need to be available ADC needs the bandwidth and the resolution Power may become an issue Differential measurements may be required PWM resolution may require high speed clocks Power can also become an issue Practical digital designs with high degrees of flexibility may require power application specific solutions 20 10