32Mbit, 1MX32, 5V CMOS S-RAM MODULE
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1 32Mbit, 1MX32, 5V CMOS S-RAM MODULE Features Module Access Times: 20, 35 & 45ns Package: 66-Pin Ceramic PGA 1.385" SQ Package Height 0.215"/ Single 5V (±10%) Power Supply Industrial and Military Screening Organized as two banks of 512Kx32 User Configurable as : 1Mx32, 2Mx16 or 4Mx8 TTL Compatible Input/Output Product Description The MES1M32 is a 32 megabit High Speed Static Ram MCM. Each MCM is constructed from 8-512KX8 SRam assembled in a multilayered cofired ceramic package, designed with power and ground planes for lower noise and better ground bounce. These MCMs are available in 20 to 45ns versions. Block Diagram October 2003 Rev. C 1 OF 11
2 Pin Names Truth Table (H=VIH, L=VIL, X=Don't Care) Pin Name Pin Function OE# WE# CS# I/O Mode A0 A19 Address Inputs X X H Hi-Z Standby DQ0 DQ31 Data Inputs/Outputs L H L DOUT Read CS1# CS4# Chip Selects X L L DIN Write WE1# WE4# Write Enables H H L Hi-Z Out Disable OE# Output Enable GND Ground Vcc Power (+5V ±10%) NC No Connection Note: # Symbol means Active Low Signal Pin Configuration for 66-Pin PGA (G1,G2) (Top View) A B C F G H 1 DQ8 WE2# DQ15 DQ24 VCC DQ31 2 DQ9 CS2# DQ14 DQ25 CS4# DQ30 3 DQ10 GND DQ13 DQ26 WE4# DQ29 4 A13 DQ11 DQ12 A6 DQ27 DQ28 5 A14 A10 OE# A7 A3 A0 6 A15 A11 A18 NC A4 A1 7 A16 A12 WE1# A8 A5 A2 8 A17 VCC DQ7 A9 WE3# DQ23 9 DQ0 CS1# DQ6 DQ16 CS3# DQ22 10 DQ1 A19 DQ5 DQ17 GND DQ21 11 DQ2 DQ3 DQ4 DQ18 DQ19 DQ20 October 2003 Rev. C 2 OF 11
3 Absolute Maximum Ratings Item Supply Voltage Relative to GND Voltage on Any Pin Relative to GND Operating Temperature Storage Temperature Rating -0.5V to +7.0V -0.5V to VCC +0.5V -55 C to +125 C -65 C to +150 C Recommended Operating Conditions Parameter Symbol Min Max Unit Supply Voltage VCC V Input High Voltage VIH 2.2 VCC +0.3 V Input Low Voltage VIL V Operating (Military) TA C Temperature (Industrial) C Capacitance (TA = +25 C, VIN = 0V, f = 1.0 MHz) Description Symbol Limits Unit Min Max OE# Capacitance COE 20 pf WE1# to WE4# Capacitance CWE 20 pf CS1# to CS4# Capacitance CCS 20 pf DQ0 to DQ31 Capacitance CI/O 30 pf A0 to A19 Capacitance CAD 20 pf These parameters are guaranteed, but not tested. October 2003 Rev. C 3 OF 11
4 DC Characteristics (Vcc = 5V) MES1M32XXXXX Parameter Symbol Min Max Units Input Leakage Current ILI (1) µa Output Leakage Current ILO (2) µa Output Low Voltage VOL (3) 0.4 V Output High Voltage VOH (4) 2.4 V Standby Supply Current ISB (5) 20ns 80 ma 45ns 60 Dynamic Operating Current ICC (6) 20ns 300 ma (32 bit operation mode) 45ns 260 Notes: (1) VCC = Max, VI/O = VCC to GND (2) VI/O = VCC to GND, CS# VIH, OE# VIH (3) VCC = Min, IOL = +8mA (4) VCC = Min, IOH = -4mA (5) CS # = VIH, OE # = VIH, VCC = Max, f = 5.0 MHz (6) VCC = Max, CS# = VIL, OE# = VIH, f = 5.0 MHz October 2003 Rev. C 4 OF 11
5 AC Characteristics Write Cycle Parameter Symbol 20ns 35ns 45ns Limits Units Write Cycle Time TAVAV min ns Address Set-up Time TAVWL min ns Address Valid to End of Write TAVWH min ns Data Valid to End of Write TDVWH min ns Chip Select Low to End of Write TELWH min ns Write Pulse Width TWLWH min ns Address Hold from Write End TWHAX min ns Data Hold Time TWHDX min ns Write Low to High Z TWLQZ * max ns Output Active from End of Write TWHQX * min ns Read Cycle Parameter Symbol 20ns 35ns 45ns Limits Units Read Cycle Time TAVAV min ns Address Access Time TAVQV max ns Output Hold from Address Change TAVQX min ns Chip Select Access Time TELQV max ns Output Enable to Output Valid TGLQV max ns Chip Select to Output in Low Z TELQX* min ns Chip Disable to Output in High Z TEHQZ* max ns Output Enable to Output in Low Z TGLQX* min ns Output Disable to Output in High Z TGHQZ* max ns (*) - Parameter is guaranteed, but not tested. October 2003 Rev. C 5 OF 11
6 Timing Waveforms of Write Cycle October 2003 Rev. C 6 OF 11
7 Timing Waveforms of Read Cycle October 2003 Rev. C 7 OF 11
8 AC Test Conditions Item Conditions Input Pulse Levels GND to 3.0V Input Rise and Fall Times 5ns Input Timing Reference Level 1.5V Output Timing Reference Level 1.5V Output Load: 17ns to 70ns 1 TTL Load, CL=30pF 85ns and up 1 TTL Load, CL=100pF Note: For TWHQX, TWLQZ, TELQX, TEHQZ, TGLQX and TGHQZ CL = 5pF October 2003 Rev. C 8 OF 11
9 Outline Drawing for 66-Pin Ceramic PGA (G1) October 2003 Rev. C 9 OF 11
10 Outline Drawing for 66-Pin Thin Ceramic PGA (G2) October 2003 Rev. C 10 OF 11
11 Ordering Information (Standard Military Screened Products*) Model Number Speed Package MES1M32G120M 20ns CPGA MES1M32G135M 35ns CPGA MES1M32G145M 45ns CPGA MES1M32G220M 20ns CPGA MES1M32G235M 35ns CPGA MES1M32G245M 45ns CPGA (*) - Contact Elisra for additional designs Part Number Breakdown October 2003 Rev. C 11 OF 11
HM K 8 High Speed CMOS SRAM. Description. Features. Interface MATRA MHS. Block Diagram
8K 8 High Speed CMOS SRAM Description The is a high speed CMOS static RAM organized as 8192x8 bits. It is manufactured using MHS high performance CMOS technology. Access times as fast as 15 ns are available
White Electronic Designs
* 1Mx32 SRAM 3.3V MODULE FEATURES Access Times of 17, 20, 25ns 4 lead, 2mm CQFP, (Package 511) Organized as two banks of 512Kx32, User Configurable as 2Mx16 or 4Mx Commercial, Industrial and Military Temperature
Rad. Tolerant 128Kx8, 5-Volt Very Low Power CMOS SRAM M65608E
Features Operating Voltage: 5V Access Time: 30, 45 ns Very Low Power Consumption Active: 600 mw (Max) Standby: 1 µw (Typ) Wide Temperature Range: -55 C to +125 C 400 Mils Width Packages: FP32 and SB32
Rad. Tolerant 8K x 8-5 volts Very Low Power CMOS SRAM AT65609EHW
Features Operating Voltage: 5V Access Time: 40ns Very Low Power Consumption Active: 440mW (Max) Standby: 10mW (Typ) Wide Temperature Range: -55 C to +125 C 600 Mils Width Package: SB28 TTL Compatible Inputs
Rev. No. History Issue Date Remark
8K X 8 BIT CMOS SRAM Document Title 8K X 8 BIT CMOS SRAM Revision History Rev. No. History Issue Date Remark 0.0 Initial issue November 9, 2004 Preliminary 1.0 Remove non-pb-free package type July 3, 2006
2Mx32 5V NOR FLASH MODULE
2Mx32 5V NOR FLASH MODULE WF2M32-XXX5 FEATURES Access Time of 90, 120, 150ns Packaging: 66 pin, PGA Type, 1.15" square, Hermetic Ceramic HIP (Package 401). 6 lead, Hermetic CQFP (G2U), 22.4mm (0.0") square
Rev. No. History Issue Date Remark
32K X 8 BIT CMOS SRAM Document Title 32K X 8 BIT CMOS SRAM Revision History Rev. No. History Issue Date Remark 0.0 Initial issue February 2, 2001 Preliminary 0.1 Add ultra temp grade and 28-pin DIP package
Revision No History Draft Date Remark. 10 Initial Revision History Insert Jul Final
128Kx8bit CMOS SRAM Document Title 128K x8 bit 5.0V Low Power CMOS slow SRAM Revision History Revision No History Draft Date Remark 10 Initial Revision History Insert Jul.14.2000 Final 11 Marking Information
LY62L K X 8 BIT LOW POWER CMOS SRAM
REVISION HISTORY Revision Description Issue Date Rev. 1.0 Initial Issue Jul.25.2004 Rev. 1.1 Adding PKG type : 32 SOP Mar.3.2006 Adding PKG type : 32 P-DIP Revised Test Condition of ISB1/IDR May.14.2007
HY62WT08081E Series 32Kx8bit CMOS SRAM
32Kx8bit CMOS SRAM Document Title 32K x8 bit 2.7~5.5V Low Power Slow SRAM Revision History Revision No History Draft Date Remark 00 Initial Feb.05.2001 Preliminary 01 Revised Feb.13.2001 Final - Change
DECODER I/O DATA CIRCUIT CONTROL CIRCUIT
IS62C64 8K x 8 LOW POR CMOS STATIC RAM FEATURES CMOS low power operation 400 mw (max.) operating 25 mw (max.) standby Automatic power-down when chip is deselected TTL compatible interface levels Single
power and 32,786 x 8-bits and outputs -2.0V(min.) data fabricated using
查询 HY62256A 供应商 Data Sheet-sram/62256ald1 http://www.hea.com/hean2/sram/62256ald1.htm HY62256A-(I) Series 32Kx8bit CMOS SRAM Description Features The Fully static operation and HY62256A/HY62256A-I Tri-state
HY62256A Series 32Kx8bit CMOS SRAM
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LY K X 8 BIT LOW POWER CMOS SRAM
REVISION HISTORY Revision Description Issue Date Rev. 1.0. Initial Issue Jul.25.2004 Rev. 2.0. Revised Vcc Range(Vcc=4.5~5.5V => 2.7~5.5V) May.4.2005 Rev. 2.1. Revised ISB1 May.13.2005 Rev. 2.2 Adding
LY K X 8 BIT LOW POWER CMOS SRAM
REVISION HISTORY Revision Description Issue Date Rev. 1.0. Initial Issue Jul.25.2004 Rev. 2.0. Revised Vcc Range(Vcc=4.5~5.5V => 2.7~5.5V) May.4.2005 Rev. 2.1. Revised ISB1 May.13.2005 Rev. 2.2 Adding
10/February/07, v.1.0 Alliance Memory Inc. Page 1 of 13
FEATURES Access time : 55ns Low power consumption: Operating current :20mA (TYP.) Standby current : 20mA(TYP.)L Version 1µ A (TYP.) LL-version Single 2.7V ~ 3.6V power supply Fully static operation Tri-state
IS62WV102416ALL IS62WV102416BLL IS65WV102416BLL
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LY62L K X 8 BIT LOW POWER CMOS SRAM
REVISION HISTORY Revision Description Issue Date Rev. 1.0 Initial Issue Feb.24.2010 Rev. 1.1 Revised PACKAGE OUTLINE DIMENSION in page 10 May.7.2010 Deleted WRITE CYCLE Notes : 1. WE#, CE# must be high
Rad Hard 16 MegaBit SRAM Multi Chip Module AT68166F AT68166FT. Preliminary
Features Can be used as either 1 off 512k x 32, 2 off 512k x 16 4 off 512k x 8 Operating Voltage: 3.3V + 0.3V Access Time: AT68166FT (5V Tolerant). 25 ns (preliminary infmation). 17 ns (advanced infmation)
DECODER I/O DATA CIRCUIT CONTROL CIRCUIT
32K x 8 LOW POR CMOS STATIC RAM FEATURES Access time: 45, 70 ns Low active power: 200 mw (typical) Low standby power 250 µw (typical) CMOS standby 28 mw (typical) TTL standby Fully static operation: no
IS62WV20488ALL IS62WV20488BLL
2M x 8 HIGH-SPEED LOW POWER CMOS STATIC RAM JANUARY 2008 FEATURES High-speed access times: 25, 35 ns High-performance, low-power CMOS process Multiple center power and ground pins for greater noise immunity
IS62WV20488FALL/BLL IS65WV20488FALL/BLL. 2Mx8 LOW VOLTAGE, ULTRA LOW POWER CMOS STATIC RAM FUNCTIONAL BLOCK DIAGRAM NOVEMBER 2018
/BLL IS65WV20488FALL/BLL 2Mx8 LOW VOLTAGE, ULTRA LOW POWER CMOS STATIC RAM KEY FEATURES High-speed access time: 45ns, 55ns CMOS low power operation Operating Current: 35mA (max.) CMOS standby Current:
DECODER I/O DATA CIRCUIT CONTROL CIRCUIT
128K x 8 LOW POR CMOS STATIC RAM DECEMBER 2003 FEATURES High-speed access time: 35, 70 ns Low active power: 450 mw (typical) Low standby power: 150 µw (typical) CMOS standby Output Enable (OE) and two
DECODER I/O DATA CIRCUIT CONTROL CIRCUIT
32K x 8 HIGH-SPEED CMOS STATIC RAM AUGUST 2009 FEATURES High-speed access time: 10, 12, 15, 20 ns Low active power: 400 mw (typical) Low standby power 250 µw (typical) CMOS standby 55 mw (typical) TTL
IS62WV5128EALL/EBLL/ECLL IS65WV5128EBLL/ECLL. 512Kx8 LOW VOLTAGE, ULTRA LOW POWER CMOS STATIC RAM FUNCTIONAL BLOCK DIAGRAM APRIL 2017
512Kx8 LOW VOLTAGE, ULTRA LOW POWER CMOS STATIC RAM KEY FEATURES High-speed access time: 35ns, 45ns, 55ns CMOS low power operation Operating Current: 22 ma (max) at 85 C CMOS Standby Current: 3.7uA (typ)
UM61512A Series 64K X 8 BIT HIGH SPEED CMOS SRAM. Features. General Description. Pin Configurations UM61512AV UM61512A
Series 64K X 8 BIT HIGH SPEE CMOS SRAM Features Single +5V power supply Access times: 15/20/25ns (max.) Current: Operating: 160mA (max.) Standby: 10mA (max.) Full static operation, no clock or refreshing
A23W9308. Document Title 524,288 X 8 BIT CMOS MASK ROM. Revision History. Rev. No. History Issue Date Remark
Preliminary 524,288 X 8 BIT CMOS MASK ROM Document Title 524,288 X 8 BIT CMOS MASK ROM Revision History Rev. No. History Issue Date Remark 0.0 Initial issue November 2, 1999 Preliminary PRELIMINARY (November,
DESCRIPTION DECODER I/O DATA CIRCUIT CONTROL CIRCUIT
IS62C1024 128K x 8 HIGH-SPEED CMOS STATIC RAM FEATURES High-speed access time: 35, 45, 55, 70 ns Low active power: 450 mw (typical) Low standby power: 500 µw (typical) CMOS standby Output Enable () and
CMOS STATIC RAM 1 MEG (128K x 8-BIT)
CMOS STATIC RAM 1 MEG (12K x -BIT) IDT71024 Integrated Device Technology, Inc. FEATURES: 12K x advanced high-speed CMOS static RAM Commercial (0 to 70 C), Industrial (-40 to 5 C) and Military (-55 to 125
IS61WV20488FALL IS61/64WV20488FBLL. 2Mx8 HIGH-SPEED ASYNCHRONOUS CMOS STATIC RAM WITH 3.3V/1.8V SUPPLY FUNCTIONAL BLOCK DIAGRAM
2Mx8 HIGH-SPEED ASYHRONOUS CMOS STATIC RAM WITH 3.3V/1.8V SUPPLY PRELIMINARY INFORMATION DECEMBER 2016 FEATURES High-speed access time: 8ns, 10ns, 20ns High- performance, low power CMOS process Multiple
IS62WV20488ALL IS62WV20488BLL
2M x 8 HIGH-SPEED LOW POWER CMOS STATIC RAM August 2016 FEATURES High-speed access times: 25, 35 ns High-performance, low-power CMOS process Multiple center power and ground pins for greater noise immunity
IS61/64WV5128EFALL IS61/64WV5128EFBLL. 512Kx8 HIGH SPEED AYNCHRONOUS CMOS STATIC RAM with ECC FUNCTIONAL BLOCK DIAGRAM APRIL 2018 KEY FEATURES
512Kx8 HIGH SPEED AYHRONOUS CMOS STATIC RAM with ECC APRIL 2018 KEY FEATURES A0 A17 A18 High-speed access time: 8ns, 10ns, 12ns Single power supply 1.65V-2.2V (IS61/64WV5128EFALL) 2.4V-3.6V () Error Detection
IS62WV5128EHALL/BLL IS65WV5128EHALL/BLL. 512Kx8 LOW VOLTAGE, ULTRA LOW POWER CMOS STATIC RAM JULY 2018 DESCRIPTION
512Kx8 LOW VOLTAGE, ULTRA LOW POWER CMOS STATIC RAM KEY FEATURES High-speed access time: 45ns, 55ns CMOS low power operation Operating Current: 25 ma (max.) CMOS Standby Current: 3.2 ua (typ., 25 C) TTL
JANUARY/2008, V 1.0 Alliance Memory Inc. Page 1 of 11
1024K X 8 BIT SUPER 512K LOW POWER X8BITCMOS LOW SRAM FEATURES Fast access time : 55ns Low power consumption: Operating current : 30mA (TYP.) Standby current : 6µA (TYP.) LL-version Single 2.7V ~ 5.5V
DECODER I/O DATA CONTROL CIRCUIT
1M x 8 LOW VOLTAGE, ULTRA LOW POWER CMOS STATIC RAM MARCH 2006 FEATURES High-speed access time: 55ns, 70ns CMOS low power operation: 36 mw (typical) operating 12 µw (typical) CMOS standby TTL compatible
IS61WV102416FALL IS61/64WV102416FBLL. 1Mx16 HIGH-SPEED ASYNCHRONOUS CMOS STATIC RAM WITH 3.3V/1.8V SUPPLY FUNCTIONAL BLOCK DIAGRAM
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DECODER I/O DATA CIRCUIT CONTROL CIRCUIT
256K x 8 HIGH-SPEED CMOS STATIC RAM APRIL 2008 FEATURES High-speed access time: 8, 10 ns Operating Current: 50mA (typ.) Standby Current: 700µA (typ.) Multiple center power and ground pins for greater noise
IS62WV102416FALL/BLL IS65WV102416FALL/BLL. 1Mx16 LOW VOLTAGE, ULTRA LOW POWER CMOS STATIC RAM FUNCTIONAL BLOCK DIAGRAM MARCH 2018
1Mx16 LOW VOLTAGE, ULTRA LOW POWER CMOS STATIC RAM MARCH 2018 KEY FEATURES High-speed access time: 45ns, 55ns CMOS low power operation Operating Current: 35mA (max.) CMOS standby Current: 5.5uA (typ.)
IS62WV102416GALL/BLL IS65WV102416GALL/BLL. 1024Kx16 LOW VOLTAGE, ULTRA LOW POWER CMOS STATIC RAM. FUNCTIONAL Block Diagram NOVEMBER 2017
1024Kx16 LOW VOLTAGE, ULTRA LOW POWER CMOS STATIC RAM NOVEMBER 2017 KEY FEATURES High-speed access time: 45ns, 55ns CMOS low power operation Operating Current: 35mA (max.) CMOS standby Current: 5.5uA (typ.)
IS61/64WV12816EFALL IS61/64WV12816EFBLL. 128Kx16 HIGH SPEED AYNCHRONOUS CMOS STATIC RAM with ECC FUNCTIONAL BLOCK DIAGRAM APRIL 2018 KEY FEATURES
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IDT CMOS Static RAM 1 Meg (256K x 4-Bit)
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IS65C256AL IS62C256AL
32K x 8 LOW POR CMOS STATIC RAM MAY 2012 FEATURES Access time: 25 ns, 45 ns Low active power: 200 mw (typical) Low standby power 150 µw (typical) CMOS standby 15 mw (typical) operating Fully static operation:
CMOS Static RAM 1 Meg (128K x 8-Bit) IDT71024S
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IS62WV25616EALL/EBLL/ECLL IS65WV25616EBLL/ECLL. 256Kx16 LOW VOLTAGE, ULTRA LOW POWER CMOS STATIC RAM FUNCTIONAL BLOCK DIAGRAM JANUARY 2018
256Kx16 LOW VOLTAGE, ULTRA LOW POWER CMOS STATIC RAM JANUARY 2018 KEY FEATURES High-speed access time: 35ns, 45ns, 55ns CMOS low power operation Operating Current: 22 ma (max) at 85 C CMOS Standby Current:
IS61WV10248EEALL IS61/64WV10248EEBLL. 1Mx8 HIGH SPEED AYNCHRONOUS CMOS STATIC RAM with ECC FUNCTIONAL BLOCK DIAGRAM OCTOBER 2018
1Mx8 HIGH SPEED AYHRONOUS CMOS STATIC RAM with ECC OCTOBER 2018 KEY FEATURES High-speed access time: 8ns, 10ns, 20ns Single power supply 1.65V-2.2V (IS61WV10248EEALL) 2.4V-3.6V () Error Detection and Correction
IS62C10248AL IS65C10248AL
IS62C10248AL IS65C10248AL 1M x 8 LOW VOLTAGE, ULTRA LOW POWER CMOS STATIC RAM FEATURES High-speed access time: 45ns, 55ns CMOS low power operation 36 mw (typical) operating 12 µw (typical) CMOS standby
IS62C25616EL, IS65C25616EL
256Kx16 LOW VOLTAGE, ULTRA LOW POWER CMOS STATIC RAM AUGUST 2018 KEY FEATURES High-speed access time: 45ns, 55ns CMOS low power operation Operating Current: 22 ma (max) at 85 C CMOS Standby Current: 5.0uA
MCM M x 4 Bit Static Random Access Memory SEMICONDUCTOR TECHNICAL DATA MCM6949 MOTOROLA FAST SRAM
SEMICONDUCTOR TECHNICL DT Order this document by /D 1M x 4 Bit Static Random ccess Memory The is a 4,194,304 bit static random access memory organized as 1,048,576 words of 4 bits. Static design eliminates
IS61/64WV25616FALL IS61/64WV25616FBLL. 256Kx16 HIGH SPEED AYNCHRONOUS CMOS STATIC RAM FUNCTIONAL BLOCK DIAGRAM APRIL 2018 KEY FEATURES DESCRIPTION
256Kx16 HIGH SPEED AYNCHRONOUS CMOS STATIC RAM APRIL 2018 KEY FEATURES High-speed access time: 8, 10ns, 12ns Low Active Current: 35mA (Max., 10ns, I-temp) Low Standby Current: 10 ma (Max., I-temp) Single
IS62WV2568ALL IS62WV2568BLL
IS62WV2568ALL IS62WV2568BLL 256K x 8 LOW VOLTAGE, ULTRA LOW POWER CMOS STATIC RAM Long-term Support NOVEMBER 2016 FEATURES High-speed access time: 45ns, 55ns, 70ns CMOS low power operation 36 mw (typical)
MCM6206BB. Product Preview 32K x 8 Bit Fast Static RAM SEMICONDUCTOR TECHNICAL DATA MCM6206BB MOTOROLA FAST SRAM
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DECODER I/O DATA CIRCUIT CONTROL CIRCUIT
32K x 8 LOW VOLTAGE CMOS STATIC RAM June 2005 FEATURES High-speed access times: -- 8, 10, 12, 15 ns Automatic power-down when chip is deselected CMOS low power operation -- 345 mw (max.) operating -- 7
IS62C51216AL IS65C51216AL
IS62C51216AL IS65C51216AL 512K x 16 LOW VOLTAGE, ULTRA LOW POWER CMOS STATIC RAM FEATURES High-speed access time: 45ns, 55ns CMOS low power operation 36 mw (typical) operating 12 µw (typical) CMOS standby
MCM M x 4 Bit Static Random Access Memory. Freescale Semiconductor, I SEMICONDUCTOR TECHNICAL DATA MCM6949
nc. SEMICONDUCTOR TECHNICL DT Order this document by /D 1M x 4 Bit Static Random ccess Memory The is a 4,194,304 bit static random access memory organized as 1,048,576 words of 4 bits. Static design eliminates
Freescale Semiconductor, I VDD VSS
nc. SEMICONDUCTOR TECHNICL DT Order this document by MCM6926/D dvance Information 128K x 8 Bit Fast Static Random ccess Memory The MCM6926 is a 1,048,576 bit static random access memory organized as 131,072
IS62WV51216EFALL/BLL IS65WV51216EFALL/BLL. 512Kx16 LOW VOLTAGE, ULTRA LOW POWER CMOS STATIC RAM with ECC FUNCTIONAL BLOCK DIAGRAM AUGUST 2017
512Kx16 LOW VOLTAGE, ULTRA LOW POWER CMOS STATIC RAM with ECC AUGUST 2017 KEY FEATURES High-speed access time: 45ns, 55ns CMOS low power operation Operating Current: 35mA (max.) CMOS standby Current: 5.5uA
IS64WV3216BLL IS61WV3216BLL
32K x 16 HIGH-SPEED CMOS STATIC RAM NOVEMBER 2005 FEATURES High-speed access time: 12 ns: 3.3V + 10% 15 ns: 2.5V-3.6V CMOS low power operation: 50 mw (typical) operating 25 µw (typical) standby TTL compatible
IS61WV25632ALL/ALS IS61WV25632BLL/BLS IS64WV25632BLL/BLS
256K x 32 HIGH-SPEED ASYNCHRONOUS CMOS STATIC RAM WITH 3.3V SUPPLY PRELIMINARY INFORMATION APRIL 2008 FEATURES High-speed access times: 8, 10, 20 ns High-performance, low-power CMOS process Multiple center
IS65C256AL IS62C256AL
32K x 8 LOW POR CMOS STATIC RAM JULY 2007 FEATURES Access time: 25 ns, 45 ns Low active power: 200 mw (typical) Low standby power 150 µw (typical) CMOS standby 15 mw (typical) operating Fully static operation:
DESCRIPTION DECODER I/O DATA CIRCUIT CONTROL CIRCUIT
28K x 24 HIGH-SPEED CMOS STATIC RAM WITH 3.3V SUPPLY JUNE 2005 FEATURES High-speed access time: 8, 0 ns CMOS low power operation 756 mw (max.) operating @ 8 ns 36 mw (max.) standby @ 8 ns TTL compatible
DECODER I/O DATA CIRCUIT CONTROL CIRCUIT
32K x 8 HIGH-SPEED CMOS STATIC RAM OCTOBER 2006 FEATURES High-speed access time: 10, 12 ns CMOS Low Power Operation 1 mw (typical) CMOS standby 125 mw (typical) operating Fully static operation: no clock
DECODER I/O DATA CIRCUIT CONTROL CIRCUIT
64K x 16 HIGH-SPEED CMOS STATIC RAM OCTOBER 2006 FEATURES High-speed access time: 12 ns: 3.3V + 10% 15 ns: 2.5V-3.6V CMOS low power operation: 50 mw (typical) operating 25 µw (typical) standby TTL compatible
DECODER I/O DATA CIRCUIT CONTROL CIRCUIT
8K x 8 HIGH-SPEED CMOS STATIC RAM OCTOBER 2006 FEATURES High-speed access time: 0 ns CMOS low power operation mw (typical) CMOS standby 25 mw (typical) operating TTL compatible interface levels Single
IS62/65WV2568DALL IS62/65WV2568DBLL
IS62/65WV2568DALL IS62/65WV2568DBLL 256K x 8 LOW VOLTAGE, ULTRA LOW POWER CMOS STATIC RAM JANUARY 2013 FEATURES High-speed access time: 35ns, 45ns, 55ns CMOS low power operation 36 mw (typical) operating
Rev. No. History Issue Date Remark
256K X 8 BIT LOW VOLTAGE CMOS SRAM ocument Title 256K X 8 BIT LOW VOLTAGE CMOS SRAM Revision History Rev. No. History Issue ate Remark 0.0 Initial issue June 24, 2002 Preliminary 0.1 Change VCC range from
IS65LV256AL IS62LV256AL
32K x 8 LOW VOLTAGE CMOS STATIC RAM MAY 2012 FEATURES High-speed access time: 20, 45 ns Automatic power-down when chip is deselected CMOS low power operation 17 µw (typical) CMOS standby 50 mw (typical)
Very Low Power/Voltage CMOS SRAM 1M X 16 bit DESCRIPTION. SPEED (ns) 55ns : 3.0~3.6V 70ns : 2.7~3.6V BLOCK DIAGRAM
Very Low Power/Voltage CMOS SRAM 1M X 16 bit (Dual CE Pins) FEATURES operation voltage : 27~36V Very low power consumption : = 30V C-grade: 45mA (@55ns) operating current I -grade: 46mA (@55ns) operating
DECODER I/O DATA CIRCUIT CONTROL CIRCUIT
256K x 16 HIGH SPEED ASYNCHRONOUS CMOS STATIC RAM WITH 3.3V SUPPLY JULY 2006 FEATURES High-speed access time: 10, 12 ns CMOS low power operation Low stand-by power: Less than 5 ma (typ.) CMOS stand-by
IS61WV51216ALL IS61WV51216BLL IS64WV51216BLL
512K x 16 HIGH-SPEED ASYNCHRONOUS CMOS STATIC RAM WITH 3.3V SUPPLY OCTOBER 2009 FEATURES High-speed access times: 8, 10, 20 ns High-performance, low-power CMOS process Multiple center power and ground
IS62WV2568ALL IS62WV2568BLL
IS62WV2568ALL IS62WV2568BLL 256K x 8 LOW VOLTAGE, ULTRA LOW POWER CMOS STATIC RAM DECEMBER 2008 FEATURES High-speed access time: 55ns, 70ns CMOS low power operation 36 mw (typical) operating 9 µw (typical)
DECODER I/O DATA CIRCUIT CONTROL CIRCUIT
512K x 8 HIGH-SPEED CMOS STATIC RAM APRIL 2005 FEATURES High-speed access times: 10, 12 ns High-performance, low-power CMOS process Multiple center power and ground pins for greater noise immunity Easy
PRELIMINARY PRELIMINARY
Document Title 256Kx4 Bit (with ) High-Speed CMOS Static RAM(5.0V Operating). Revision History Rev. No. History Draft Data Remark Rev. 0.0 Rev. 0.1 Rev. 0.2 Initial release with Preliminary. Current modify
64K x 16 HIGH-SPEED CMOS STATIC RAM JUNE 2005
64K x 16 HIGH-SPEED CMOS STATIC RAM JUNE 2005 FEATURES IS61C6416AL and High-speed access time: 12 ns, 15ns Low Active Power: 175 mw (typical) Low Standby Power: 1 mw (typical) CMOS standby and High-speed
IS63LV1024 IS63LV1024L 128K x 8 HIGH-SPEED CMOS STATIC RAM 3.3V REVOLUTIONARY PINOUT
128K x 8 HIGH-SPEED CMOS STATIC RAM 3.3V REVOLUTIONARY PINOUT FEATURES High-speed access times: 8, 10, 12 ns High-performance, low-power CMOS process Multiple center power and ground pins for greater noise
Document Title. Revision History. 32Kx8 bit Low Power CMOS Static RAM. Remark. History. Revision No. Draft Data. Design target. Initial draft 0.
Document Title 32Kx8 bit Low Power CMOS Static RAM Revision History Revision No History Draft Data Remark 0.0 Initial draft May 18, 1997 Design target 0.1 First revision - KM62256DL/DLI ISB1 = 100 50µA
I/O1 ~ I/O8 I/O9 ~ I/O16 I/O9 ~ I/O16 I/O1 ~ I/O8
Document Title 64Kx16 Bit High-Speed CMOS Static RAM(5.0V Operating). Operated at Commercial and Industrial Temperature Ranges. Revision History Rev. No. History Draft Data Remark Rev. 0.0 Initial release
IS62WV25616EHALL/BLL IS65WV25616EHALL/BLL. 256Kx16 LOW VOLTAGE, ULTRA LOW POWER CMOS STATIC RAM with ECC FUNCTIONAL BLOCK DIAGRAM
256Kx16 LOW VOLTAGE, ULTRA LOW POWER CMOS STATIC RAM with ECC PRELIMINARY INFORMATION AUGUST 2017 KEY FEATURES High-speed access time: 45ns, 55ns CMOS low power operation Operating Current: 25 ma (max.)
UTRON UT K X 8 BIT LOW POWER CMOS SRAM
FEATURES GENERAL DESCRIPTION Access time : 35/70ns (max) Low power consumption: Operating : 60/40 ma (typical) Standby : 3mA (typical) normal ua (typical) L-version 1uA (typical) LL-version Single 5V power
IS66WV51216DALL IS66/67WV51216DBLL
8Mb LOW VOLTAGE, ULTRA LOW POWER PSEUDO CMOS STATIC RAM FEATURES High-speed access time: 70ns (IS66WV51216DALL, ) 55ns () CMOS low power operation Single power supply Vdd = 1.7V-1.95V (IS66WV51216DALL)
DESCRIPTION DECODER I/O DATA CIRCUIT CONTROL CIRCUIT
128K x 24 HIGH-SPEED CMOS STATIC RAM WITH 3.3V SUPPLY FEATURES High-speed access time: 8, 10 ns High-performance, low-power CMOS process TTL compatible interface levels Single power supply VDD 3.3V ± 5%
IS62WV25616DALL/DBLL, IS65WV25616DBLL 256K x 16 LOW VOLTAGE, ULTRA LOW POWER CMOS STATIC SRAM
256K x 16 LOW VOLTAGE, ULTRA LOW POWER CMOS STATIC SRAM FEATURES High-speed access time: 35, 45, 55 ns CMOS low power operation 30 mw (typical) operating 6 µw (typical) CMOS standby TTL compatible interface
Very Low Power/Voltage CMOS SRAM 512K X 16 bit DESCRIPTION. SPEED ( ns ) STANDBY. ( ICCSB1, Max ) 55ns : 3.0~5.5V 70ns : 2.7~5.5V
FEATURES Wide operation voltage : 24~55V Very low power consumption : = 30V C-grade: 30mA (@55ns) operating current I -grade: 31mA (@55ns) operating current C-grade: 24mA (@70ns) operating current I -grade:
IS62WV6416ALL IS62WV6416BLL
IS62WV6416ALL IS62WV6416BLL 64K x 16 LOW VOLTAGE, ULTRA LOW POWER CMOS STATIC RAM JANUARY 2008 FEATURES High-speed access time: 45ns, 55ns CMOS low power operation: 30 mw (typical) operating 15 µw (typical)
IS61WV10248ALL IS61WV10248BLL IS64WV10248BLL
1M x 8 HIGH-SPEED CMOS STATIC RAM MARCH 2017 FEATURES High-speed access times: 8, 10, 20 ns High-performance, low-power CMOS process Multiple center power and ground pins for greater noise immunity Easy
A0-A16. February /42
M28F210 M28F220 2 Megabit (x8 or x16, Block FLASH MEMORY PRELIMINARY DATA DUAL x8 and x16 ORGANIZATION SMALL SIZE PLASTIC PACKAGES TSOP48 and SO44 MEMORY ERASE in BLOCKS One 16K Byte or 8K Word Boot Block
IS61WV102416ALL IS61WV102416BLL IS64WV102416BLL
1M x 16 HIGH-SPEED ASYNCHRONOUS CMOS STATIC RAM WITH 3.3V SUPPLY MAY 2012 FEATURES High-speed access times: 8, 10, 20 ns High-performance, low-power CMOS process Multiple center power and ground pins for
P4C164LL. VERY LOW POWER 8Kx8 STATIC CMOS RAM FEATURES DESCRIPTION V CC. Current (Commercial/Industrial) Operating: 55 ma CMOS Standby: 3 µa
P4C164LL VERY LOW POWER 8Kx8 STATIC CMOS RAM FEATURES Current (Commercial/Industrial) Operating: 55 ma CMOS Standby: 3 µa Access Times 80/100 (Commercial or Industrial) 90/120 (Military) Single 5 Volts
IS61C1024AL IS64C1024AL
IS61C1024AL IS64C1024AL 128K x 8 HIGH-SPEED CMOS STATIC RAM JULY 2015 FEATURES High-speed access time: 12, 15 ns Low active power: 160 mw (typical) Low standby power: 1000 µw (typical) CMOS standby Output
CMOS StaticRAM 16K (4K x 4-BIT) CACHE-TAG RAM
Integrated Device Technology, Inc. CMOS StaticRAM 16K (4K x 4-BIT) CACHE-TAG RAM IDT6178S FEATURES: High-speed Address to Valid time Military: 12/15/20/25ns Commercial: 10/12/15/20/25ns (max.) High-speed
Distributed by: www.jameco.com 1-00-31-4242 The content and copyrights of the attached material are the property of its owner. FEATURES Wide operation voltage : 2.4V ~ 5.5V Very low power consumption :
CMOS SRAM. KM684000B Family. Document Title. Revision History. 512Kx8 bit Low Power CMOS Static RAM. Revision No. History. Remark. Draft Date 0.
Document Title 512Kx8 bit Low Power CMOS Static RAM Revision History Revision No. History Draft Date Remark 0.0 Initial Draft December 7, 1996 Advance 0.1 Revise - Changed Operating current by reticle
Document Title. Revision History. 256Kx16 bit Low Power and Low Voltage CMOS Static RAM. Draft Date. Revision No. History. Remark.
Document Title 256Kx16 bit Low Power and Low Voltage CMOS Static RAM Revision History Revision No History Draft Date Remark 0.0 Initial draft July 29, 2002 Preliminary 0.1 Revised - Added Commercial product
IS61C25616AL IS61C25616AS IS64C25616AL IS64C25616AS
256K x 16 HIGH-SPEED CMOS STATIC RAM FEATURES HIGH SPEED: (IS61/64C25616AL) High-speed access time: 10ns, 12 ns Low Active Power: 150 mw (typical) Low Standby Power: 10 mw (typical) CMOS standby LOW POR:
IS61WV25616ALL/ALS IS61WV25616BLL/BLS IS64WV25616BLL/BLS
ISWVALL/ALS ISWVBLL/BLS K x HIGH SPEED ASYNCHRONOUS CMOS STATIC RAM FEATURES HIGH SPEED: (IS/WVALL/BLL) High-speed access time:,, 0 ns Low Active Power: mw (typical) Low Standby Power: mw (typical) CMOS
IS61WV25616ALL/ALS IS61WV25616BLL/BLS IS64WV25616BLL/BLS
ISWVALL/ALS ISWVBLL/BLS K x HIGH SPEED ASYNCHRONOUS CMOS STATIC RAM DEMBER 00 FEATURES HIGH SPEED: (IS/WVALL/BLL) High-speed access time:,, 0 ns Low Active Power: mw (typical) Low Standby Power: mw (typical)
IS61WV10248EDBLL IS64WV10248EDBLL
1M x 8 HIGH-SPEED ASYHRONOUS CMOS STATIC RAM WITH ECC FEBRUARY 2013 FEATURES High-speed access times: 8, 10, 20 ns High-performance, low-power CMOS process Multiple center power and ground pins for greater
IS62WV10248EALL/BLL IS65WV10248EALL/BLL. 1Mx8 LOW VOLTAGE, ULTRA LOW POWER CMOS STATIC RAM
1Mx8 LOW VOLTAGE, ULTRA LOW POWER CMOS STATIC RAM KEY FEATURES High-speed access time: 45ns, 55ns CMOS low power operation 36 mw (typical) operating TTL compatible interface levels Single power supply
P4C1041 HIGH SPEED 256K x 16 (4 MEG) STATIC CMOS RAM
HIGH SPEED 256K x 16 (4 MEG) STATIC CMOS RAM FEATURES High Speed (Equal Access and Cycle Times) 10/12/15/20 ns (Commercial) 12/15/20 ns (Industrial/Military) Low Power Single 5.0V ± 10% Power Supply 2.0V
IS61WV25616ALL/ALS IS61WV25616BLL/BLS IS64WV25616BLL/BLS
IS61WV25616ALL/ALS IS61WV25616BLL/BLS 256K x 16 HIGH SPEED ASYNCHRONOUS CMOS STATIC RAM FEATURES HIGH SPEED: (IS61/64WV25616ALL/BLL) High-speed access time: 8, 10, 20 ns Low Active Power: 85 mw (typical)